1 /* 2 * Copyright (c) 2021, Weidmueller Interface GmbH & Co. KG 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_XLNX_GEM_H_ 7 #define ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_XLNX_GEM_H_ 8 9 /* PHY auto-detection alias */ 10 #define XLNX_GEM_PHY_AUTO_DETECT 0 11 12 /* MDC divider values */ 13 #define XLNX_GEM_MDC_DIVIDER_8 0 /* LPD_LSBUS_CLK < 20 MHz */ 14 #define XLNX_GEM_MDC_DIVIDER_16 1 /* LPD_LSBUS_CLK 20 - 40 MHz */ 15 #define XLNX_GEM_MDC_DIVIDER_32 2 /* LPD_LSBUS_CLK 40 - 80 MHz */ 16 /* 17 * According to the ZynqMP's gem.network_config register documentation, 18 * divider /32 is to be used for a 100 MHz LPD LSBUS clock. 19 */ 20 #define XLNX_GEM_MDC_DIVIDER_48 3 /* LPD_LSBUS_CLK 80 - 120 MHz */ 21 22 /* Link speed values */ 23 #define XLNX_GEM_LINK_SPEED_10MBIT 1 24 #define XLNX_GEM_LINK_SPEED_100MBIT 2 25 #define XLNX_GEM_LINK_SPEED_1GBIT 3 26 27 /* AMBA AHB data bus width */ 28 #define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_32BIT 0 29 #define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_64BIT 1 30 #define XLNX_GEM_AMBA_AHB_DBUS_WIDTH_128BIT 2 31 32 /* AMBA AHB burst length */ 33 #define XLNX_GEM_AMBA_AHB_BURST_SINGLE 1 34 #define XLNX_GEM_AMBA_AHB_BURST_INCR4 4 35 #define XLNX_GEM_AMBA_AHB_BURST_INCR8 8 36 #define XLNX_GEM_AMBA_AHB_BURST_INCR16 16 37 38 /* Hardware RX buffer size */ 39 #define XLNX_GEM_HW_RX_BUFFER_SIZE_1KB 0 40 #define XLNX_GEM_HW_RX_BUFFER_SIZE_2KB 1 41 #define XLNX_GEM_HW_RX_BUFFER_SIZE_4KB 2 42 #define XLNX_GEM_HW_RX_BUFFER_SIZE_8KB 3 43 44 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ETHERNET_XLNX_GEM_H_ */ 45
