/Zephyr-Core-2.7.6/scripts/coredump/gdbstubs/arch/ |
D | x86_64.py | 38 SS = 19 variable in RegNum 101 RegNum.SS, 149 self.registers[RegNum.SS] = tu[15]
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D | x86.py | 30 SS = 11 variable in RegNum
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/Zephyr-Core-2.7.6/boards/shields/st7735r/doc/ |
D | index.rst | 23 | D10 | SPI SS | (Serial Slave Select) |
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/Zephyr-Core-2.7.6/boards/shields/st7789v_generic/doc/ |
D | index.rst | 23 | D10 | SPI SS | (Serial Slave Select) |
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/Zephyr-Core-2.7.6/boards/arm/particle_argon/dts/ |
D | mesh_feather.dtsi | 84 <14 0 &gpio0 31 0>, /* SS */ 114 <5 0 &gpio0 31 0>, /* SS */
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/Zephyr-Core-2.7.6/boards/arm/particle_boron/dts/ |
D | mesh_feather.dtsi | 84 <14 0 &gpio0 31 0>, /* SS */ 114 <5 0 &gpio0 31 0>, /* SS */
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/Zephyr-Core-2.7.6/boards/arm/particle_xenon/dts/ |
D | mesh_feather.dtsi | 84 <14 0 &gpio0 31 0>, /* SS */ 114 <5 0 &gpio0 31 0>, /* SS */
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/Zephyr-Core-2.7.6/boards/arm/atsamr21_xpro/ |
D | atsamr21_xpro.dts | 69 <12 0 &portb 3 0>, /* SPI5(SS) */
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/Zephyr-Core-2.7.6/boards/arm/sparkfun_thing_plus_nrf9160/ |
D | sparkfun_thing_plus_nrf9160_common.dts | 70 <5 0 &gpio0 18 0>, /* SS */
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/Zephyr-Core-2.7.6/boards/arm/circuitdojo_feather_nrf9160/ |
D | circuitdojo_feather_nrf9160_common.dts | 70 <5 0 &gpio0 18 0>, /* SS */
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/Zephyr-Core-2.7.6/boards/arm/adafruit_feather_stm32f405/doc/ |
D | index.rst | 91 SPI1 uses SCK (PB3), MI (PB4), MO (PB5) and SS (PA15) pins and is
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/Zephyr-Core-2.7.6/dts/arm/nxp/ |
D | nxp_lpc55S2x_common.dtsi | 237 rather than Flexcomm SS */
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D | nxp_lpc55S6x_common.dtsi | 259 rather than Flexcomm SS */
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D | nxp_rt6xx_common.dtsi | 212 rather than Flexcomm SS */
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/Zephyr-Core-2.7.6/boards/arm/bl652_dvk/doc/ |
D | bl652_dvk.rst | 189 | 3 | D10 (SS) | P0.22 |
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/Zephyr-Core-2.7.6/boards/arm/nrf52dk_nrf52832/doc/ |
D | index.rst | 314 | 3 | D10 (SS) | P0.22 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd360eval_nrf52811/doc/ |
D | index.rst | 305 | 8 | D10 (SS) | P0.22 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd330eval_nrf52810/doc/ |
D | index.rst | 307 | 8 | D10 (SS) | P0.22 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd300eval_nrf52832/doc/ |
D | index.rst | 314 | 8 | D10 (SS) | P0.22 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_evkninab3_nrf52840/doc/ |
D | index.rst | 202 | 3 | D10 (SS) | P0.14 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd340eval_nrf52840/doc/ |
D | index.rst | 370 | 8 | D10 (SS) | P1.12 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd345eval_nrf52840/doc/ |
D | index.rst | 383 | 8 | D10 (SS) | P1.12 |
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/Zephyr-Core-2.7.6/boards/arm/ubx_bmd380eval_nrf52840/doc/ |
D | index.rst | 369 | 8 | D10 (SS) | P1.12 |
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/Zephyr-Core-2.7.6/doc/releases/ |
D | release-notes-1.6.rst | 63 * Renamed board Quark SE SSS devboard to Quark SE C1000 SS devboard.
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/Zephyr-Core-2.7.6/soc/riscv/riscv-ite/common/ |
D | chip_chipregs.h | 733 #define SS BIT(2) macro
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