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Searched refs:SCR (Results 1 – 6 of 6) sorted by relevance

/Zephyr-Core-2.7.6/soc/arm/nxp_kinetis/ke1xf/
Dpower.c37 SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; in pm_power_state_set()
60 SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk); in pm_power_state_exit_post_ops()
/Zephyr-Core-2.7.6/soc/arm/microchip_mec/mec1501/
Ddevice_power.c41 SCB->SCR &= ~(1ul << 2); in soc_lite_sleep_enable()
52 SCB->SCR = (1ul << 2); /* Cortex-M4 SLEEPDEEP */ in soc_deep_sleep_enable()
65 SCB->SCR &= ~(1ul << 2); /* disable Cortex-M4 SLEEPDEEP */ in soc_deep_sleep_disable()
/Zephyr-Core-2.7.6/soc/arm/microchip_mec/common/reg/
Dmec_uart.h173 volatile uint8_t SCR; member
/Zephyr-Core-2.7.6/drivers/clock_control/
Dclock_control_mchp_xec.c116 SCB->SCR &= ~BIT(2); in pcr_slp_init()
599 SCB->SCR |= BIT(2); in mchp_xec_clk_ctrl_sys_sleep_enable()
609 SCB->SCR &= ~BIT(2); in mchp_xec_clk_ctrl_sys_sleep_disable()
/Zephyr-Core-2.7.6/drivers/i2c/
Di2c_sam4l_twim.c302 twim->SCR = ~0UL; /* Clear the status flags */ in i2c_start_xfer()
500 twim->SCR = ~0UL; in i2c_sam_twim_isr()
573 twim->SCR = ~0UL; in i2c_sam_twim_initialize()
/Zephyr-Core-2.7.6/drivers/serial/
Duart_mchp_xec.c329 regs->SCR = regs->RTXB; in uart_xec_configure()