1 /* ieee802154_rf2xx_regs.h - ATMEL RF2XX transceicer registers */ 2 3 /* 4 * Copyright (c) 2019 Gerson Fernando Budke 5 * 6 * SPDX-License-Identifier: Apache-2.0 7 */ 8 9 #ifndef ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_REGS_H_ 10 #define ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_REGS_H_ 11 12 /*- Definitions ------------------------------------------------------------*/ 13 #define RF2XX_AES_BLOCK_SIZE 16 14 #define RF2XX_AES_CORE_CYCLE_TIME 24 /* us */ 15 #define RF2XX_RANDOM_NUMBER_UPDATE_INTERVAL 1 /* us */ 16 #define RX2XX_FRAME_HEADER_SIZE 2 17 #define RX2XX_FRAME_FOOTER_SIZE 3 18 #define RX2XX_FRAME_FCS_LENGTH 2 19 #define RX2XX_FRAME_MIN_PHR_SIZE 5 20 #define RX2XX_FRAME_PHR_INDEX 1 21 #define RX2XX_FRAME_LQI_INDEX 2 22 #define RX2XX_FRAME_ED_INDEX 3 23 #define RX2XX_FRAME_TRAC_INDEX 4 24 #define RF2XX_MAX_PSDU_LENGTH 127 25 #define RX2XX_MAX_FRAME_SIZE 132 26 27 /*- Types ------------------------------------------------------------------*/ 28 #define RF2XX_TRX_STATUS_REG 0x01 29 #define RF2XX_TRX_STATE_REG 0x02 30 #define RF2XX_TRX_CTRL_0_REG 0x03 31 #define RF2XX_TRX_CTRL_1_REG 0x04 32 #define RF2XX_PHY_TX_PWR_REG 0x05 33 #define RF2XX_PHY_RSSI_REG 0x06 34 #define RF2XX_PHY_ED_LEVEL_REG 0x07 35 #define RF2XX_PHY_CC_CCA_REG 0x08 36 #define RF2XX_CCA_THRES_REG 0x09 37 #define RF2XX_RX_CTRL_REG 0x0a 38 #define RF2XX_SFD_VALUE_REG 0x0b 39 #define RF2XX_TRX_CTRL_2_REG 0x0c 40 #define RF2XX_ANT_DIV_REG 0x0d 41 #define RF2XX_IRQ_MASK_REG 0x0e 42 #define RF2XX_IRQ_STATUS_REG 0x0f 43 #define RF2XX_VREG_CTRL_REG 0x10 44 #define RF2XX_BATMON_REG 0x11 45 #define RF2XX_XOSC_CTRL_REG 0x12 46 #define RF2XX_CC_CTRL_0_REG 0x13 47 #define RF2XX_CC_CTRL_1_REG 0x14 48 #define RF2XX_RX_SYN_REG 0x15 49 #define RF2XX_TRX_RPC_REG 0x16 50 #define RF2XX_RF_CTRL_0_REG 0x16 51 #define RF2XX_XAH_CTRL_1_REG 0x17 52 #define RF2XX_FTN_CTRL_REG 0x18 53 #define RF2XX_RF_CTRL_1_REG 0x19 54 #define RF2XX_XAH_CTRL_2_REG 0x19 55 #define RF2XX_PLL_CF_REG 0x1a 56 #define RF2XX_PLL_DCU_REG 0x1b 57 #define RF2XX_PART_NUM_REG 0x1c 58 #define RF2XX_VERSION_NUM_REG 0x1d 59 #define RF2XX_MAN_ID_0_REG 0x1e 60 #define RF2XX_MAN_ID_1_REG 0x1f 61 #define RF2XX_SHORT_ADDR_0_REG 0x20 62 #define RF2XX_SHORT_ADDR_1_REG 0x21 63 #define RF2XX_PAN_ID_0_REG 0x22 64 #define RF2XX_PAN_ID_1_REG 0x23 65 #define RF2XX_IEEE_ADDR_0_REG 0x24 66 #define RF2XX_IEEE_ADDR_1_REG 0x25 67 #define RF2XX_IEEE_ADDR_2_REG 0x26 68 #define RF2XX_IEEE_ADDR_3_REG 0x27 69 #define RF2XX_IEEE_ADDR_4_REG 0x28 70 #define RF2XX_IEEE_ADDR_5_REG 0x29 71 #define RF2XX_IEEE_ADDR_6_REG 0x2a 72 #define RF2XX_IEEE_ADDR_7_REG 0x2b 73 #define RF2XX_XAH_CTRL_0_REG 0x2c 74 #define RF2XX_CSMA_SEED_0_REG 0x2d 75 #define RF2XX_CSMA_SEED_1_REG 0x2e 76 #define RF2XX_CSMA_BE_REG 0x2f 77 #define RF2XX_TST_CTRL_DIGI_REG 0x36 78 #define RF2XX_PHY_TX_TIME_REG 0x3b 79 #define RF2XX_PHY_PMU_VALUE_REG 0x3b 80 #define RF2XX_TST_AGC_REG 0x3c 81 #define RF2XX_TST_SDM_REG 0x3d 82 83 #define RF2XX_AES_STATUS_REG 0x82 84 #define RF2XX_AES_CTRL_REG 0x83 85 #define RF2XX_AES_KEY_REG 0x84 86 #define RF2XX_AES_STATE_REG 0x84 87 #define RF2XX_AES_CTRL_M_REG 0x94 88 89 /* TRX_STATUS */ 90 #define RF2XX_CCA_DONE 7 91 #define RF2XX_CCA_STATUS 6 92 #define RF2XX_TRX_STATUS 0 93 94 /* TRX_STATE */ 95 #define RF2XX_TRAC_STATUS 5 96 #define RF2XX_TRX_CMD 0 97 98 /* TRX_CTRL_0 */ 99 #define RF2XX_TOM_EN 7 100 #define RF2XX_PAD_IO 6 101 #define RF2XX_PAD_IO_CLKM 4 102 #define RF2XX_PMU_EN 4 103 #define RF2XX_PMU_IF_INVERSE 4 104 #define RF2XX_CLKM_SHA_SEL 3 105 #define RF2XX_CLKM_CTRL 0 106 107 /* TRX_CTRL_1 */ 108 #define RF2XX_PA_EXT_EN 7 109 #define RF2XX_IRQ_2_EXT_EN 6 110 #define RF2XX_TX_AUTO_CRC_ON 5 111 #define RF2XX_RX_BL_CTRL 4 112 #define RF2XX_SPI_CMD_MODE 2 113 #define RF2XX_IRQ_MASK_MODE 1 114 #define RF2XX_IRQ_POLARITY 0 115 116 /* PHY_TX_PWR */ 117 #define RF2XX_PA_BOOST 7 118 #define RF2XX_PA_BUF_LT 6 119 #define RF2XX_GC_PA 5 120 #define RF2XX_PA_SHR_LT 4 121 #define RF2XX_TX_PWR 0 122 123 /* PHY_RSSI */ 124 #define RF2XX_RX_CRC_VALID 7 125 #define RF2XX_RND_VALUE 5 126 #define RF2XX_RSSI 0 127 128 /* PHY_CC_CCA */ 129 #define RF2XX_CCA_REQUEST 7 130 #define RF2XX_CCA_MODE 5 131 #define RF2XX_CHANNEL 0 132 133 /* CCA_THRES */ 134 #define RF2XX_CCA_CS_THRES 4 135 #define RF2XX_CCA_ED_THRES 0 136 137 /* RX_CTRL_REG */ 138 #define RF2XX_PEL_SHIFT_VALUE 6 139 #define RF2XX_JCM_EN 5 140 #define RF2XX_PDT_THRES 0 141 142 /* TRX_CTRL_2 */ 143 #define RF2XX_RX_SAFE_MODE 7 144 #define RF2XX_TRX_OFF_AVDD_EN 6 145 #define RF2XX_OQPSK_SCRAM_EN 5 146 #define RF2XX_OQPSK_SUB1_RC_EN 4 147 #define RF2XX_ALT_SPECTRUM 4 148 #define RF2XX_BPSK_OQPSK 3 149 #define RF2XX_SUB_MODE 2 150 #define RF2XX_OQPSK_DATA_RATE 0 151 152 /* ANT_DIV */ 153 #define RF2XX_ANT_SEL 7 154 #define RF2XX_ANT_DIV_EN 3 155 #define RF2XX_ANT_EXT_SW_EN 2 156 #define RF2XX_ANT_CTRL 0 157 158 /* IRQ_MASK, IRQ_STATUS */ 159 #define RF2XX_BAT_LOW 7 160 #define RF2XX_TRX_UR 6 161 #define RF2XX_AMI 5 162 #define RF2XX_CCA_ED_DONE 4 163 #define RF2XX_TRX_END 3 164 #define RF2XX_RX_START 2 165 #define RF2XX_PLL_UNLOCK 1 166 #define RF2XX_PLL_LOCK 0 167 168 /* VREG_CTRL */ 169 #define RF2XX_AVREG_EXT 7 170 #define RF2XX_AVDD_OK 6 171 #define RF2XX_DVREG_EXT 3 172 #define RF2XX_DVDD_OK 2 173 174 /* BATMON */ 175 #define RF2XX_PLL_LOCK_CP 7 176 #define RF2XX_BATMON_OK 5 177 #define RF2XX_BATMON_HR 4 178 #define RF2XX_BATMON_VTH 0 179 180 /* XOSC_CTRL */ 181 #define RF2XX_XTAL_MODE 4 182 #define RF2XX_XTAL_TRIM 0 183 184 /* CC_CTRL_1 */ 185 #define RF2XX_CC_BAND 0 186 187 /* RX_SYN */ 188 #define RF2XX_RX_PDT_DIS 7 189 #define RF2XX_RX_OVERRIDE 4 190 #define RF2XX_RX_PDT_LEVEL 0 191 192 /* TRX_RPC */ 193 #define RF2XX_RX_RPC_CTRL 6 194 #define RF2XX_RX_RPC_EN 5 195 #define RF2XX_PDT_RPC_EN 4 196 #define RF2XX_PLL_RPC_EN 3 197 #define RF2XX_XAH_TX_RPC_EN 2 198 #define RF2XX_IPAN_RPC_EN 1 199 200 /* RF_CTRL_0 */ 201 #define RF2XX_PA_CHIP_LT 6 202 #define RF2XX_F_SHIFT_MODE 2 203 #define RF2XX_GC_TX_OFFS 0 204 205 /* XAH_CTRL_1 */ 206 #define RF2XX_ARET_TX_TS_EN 7 207 #define RF2XX_CSMA_LBT_MODE 6 208 #define RF2XX_AACK_FLTR_RES_FT 5 209 #define RF2XX_AACK_UPLD_RES_FT 4 210 #define RF2XX_AACK_ACK_TIME 2 211 #define RF2XX_AACK_PROM_MODE 1 212 #define RF2XX_AACK_SPC_EN 0 213 214 /* FTN_CTRL */ 215 #define RF2XX_FTN_START 7 216 #define RF2XX_FTNV 0 217 218 /* RF_CTRL_1 */ 219 #define RF2XX_RF_MC 4 220 221 /* XAH_CTRL_2 */ 222 #define RF2XX_ARET_FRAME_RETRIES 4 223 #define RF2XX_ARET_CSMA_RETRIES 1 224 225 /* PLL_CF */ 226 #define RF2XX_PLL_CF_START 7 227 #define RF2XX_PLL_CF 0 228 229 /* PLL_DCU */ 230 #define RF2XX_PLL_DCU_START 7 231 232 /* XAH_CTRL_0 */ 233 #define RF2XX_MAX_FRAME_RETRES 4 234 #define RF2XX_MAX_CSMA_RETRES 1 235 #define RF2XX_SLOTTED_OPERATION 0 236 237 /* CSMA_SEED_1 */ 238 #define RF2XX_AACK_FVN_MODE 6 239 #define RF2XX_AACK_SET_PD 5 240 #define RF2XX_AACK_DIS_ACK 4 241 #define RF2XX_AACK_I_AM_COORD 3 242 #define RF2XX_CSMA_SEED_1 0 243 244 /* CSMA_BE */ 245 #define RF2XX_MAX_BE 4 246 #define RF2XX_MIN_BE 0 247 248 /* TST_CTRL_DIGI */ 249 #define RF2XX_TST_CTRL_DIG 0 250 251 /* PHY_TX_TIME_REG */ 252 #define RF2XX_IRC_TX_TIME 0 253 254 /* TST_AGC_REG */ 255 #define RF2XX_AGC_HOLD_SEL 5 256 #define RF2XX_AGC_RST 4 257 #define RF2XX_AGC_OFF 3 258 #define RF2XX_AGC_HOLD 2 259 #define RF2XX_GC 0 260 261 /* TST_SDM_REG */ 262 #define RF2XX_MOD_SEL 7 263 #define RF2XX_MOD 6 264 #define RF2XX_TX_RX 5 265 #define RF2XX_TX_RX_SEL 4 266 267 /* AES_CTRL */ 268 #define RF2XX_AES_CTRL_DIR 3 269 #define RF2XX_AES_CTRL_MODE 4 270 #define RF2XX_AES_CTRL_REQUEST 7 271 272 /* AES_STATUS */ 273 #define RF2XX_AES_STATUS_DONE 0 274 #define RF2XX_AES_STATUS_ER 7 275 276 #define RF2XX_RF_CMD_REG_W ((1 << 7) | (1 << 6)) 277 #define RF2XX_RF_CMD_REG_R ((1 << 7) | (0 << 6)) 278 #define RF2XX_RF_CMD_FRAME_W ((0 << 7) | (1 << 6) | (1 << 5)) 279 #define RF2XX_RF_CMD_FRAME_R ((0 << 7) | (0 << 6) | (1 << 5)) 280 #define RF2XX_RF_CMD_SRAM_W ((0 << 7) | (1 << 6) | (0 << 5)) 281 #define RF2XX_RF_CMD_SRAM_R ((0 << 7) | (0 << 6) | (0 << 5)) 282 283 /* RX_STATUS */ 284 #define RF2XX_RX_TRAC_STATUS 4 285 #define RF2XX_RX_TRAC_BIT_MASK 0x03 286 287 #endif /* ZEPHYR_DRIVERS_IEEE802154_IEEE802154_RF2XX_REGS_H_ */ 288
