Searched refs:NAME (Results 1 – 20 of 20) sorted by relevance
5 zephyr_linker_section(NAME .stab ADDRESS 0)6 zephyr_linker_section(NAME .stabstr ADDRESS 0)7 zephyr_linker_section(NAME .stab.excl ADDRESS 0)8 zephyr_linker_section(NAME .stab.exclstr ADDRESS 0)9 zephyr_linker_section(NAME .stab.index ADDRESS 0)10 zephyr_linker_section(NAME .stab.indexstr ADDRESS 0)11 zephyr_linker_section(NAME .gnu.build.attributes ADDRESS 0)12 zephyr_linker_section(NAME .comment ADDRESS 0)18 zephyr_linker_section(NAME .debug ADDRESS 0)19 zephyr_linker_section(NAME .line ADDRESS 0)[all …]
5 zephyr_linker_section(NAME sw_isr_table15 zephyr_linker_section(NAME device_states GROUP DATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT})21 …zephyr_linker_section(NAME pm_device_slots GROUP DATA_REGION TYPE NOLOAD NOINPUT ${XIP_ALIGN_WITH_…25 zephyr_linker_section(NAME initshell GROUP DATA_REGION NOINPUT ${XIP_ALIGN_WITH_INPUT})35 zephyr_linker_section(NAME log_dynamic GROUP DATA_REGION NOINPUT)38 zephyr_iterable_section(NAME _static_thread_data GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN…49 zephyr_iterable_section(NAME k_timer GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4)50 zephyr_iterable_section(NAME k_mem_slab GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4)51 zephyr_iterable_section(NAME k_mem_pool GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4)52 zephyr_iterable_section(NAME k_heap GROUP DATA_REGION ${XIP_ALIGN_WITH_INPUT} SUBALIGN 4)[all …]
3 zephyr_linker_section(NAME init KVMA RAM_REGION GROUP RODATA_REGION)10 zephyr_linker_section(NAME device KVMA RAM_REGION GROUP RODATA_REGION)19 …zephyr_linker_section(NAME sw_isr_table KVMA FLASH GROUP RODATA_REGION SUBALIGN ${CONFIG_ARCH_SW_I…26 zephyr_linker_section(NAME initlevel_error KVMA RAM_REGION GROUP RODATA_REGION NOINPUT)27 zephyr_linker_section_configure(SECTION initlevel_error INPUT ".z_init_[_A-Z0-9]*" KEEP SORT NAME)33 zephyr_linker_section(NAME ctors KVMA RAM_REGION GROUP RODATA_REGION NOINPUT)74 NAME z_object_assignment_area81 KEEP SORT NAME86 NAME app_shmem_regions92 KEEP SORT NAME[all …]
4 zephyr_linker_section(NAME .tdata LMA FLASH NOINPUT)8 zephyr_linker_section(NAME .tbss LMA FLASH NOINPUT)
33 zephyr_linker_memory(NAME FLASH FLAGS rx START ${FLASH_ADDR} SIZE ${FLASH_SIZE})34 zephyr_linker_memory(NAME RAM FLAGS wx START ${RAM_ADDR} SIZE ${RAM_SIZE})35 zephyr_linker_memory(NAME IDT_LIST FLAGS wx START ${IDT_ADDR} SIZE 2K)38 zephyr_linker_dts_memory(NAME FLASH_CCFG FLAGS rwx NODELABEL ti_ccfg_partition)41 zephyr_linker_dts_memory(NAME ITCM FLAGS rw CHOSEN "zephyr,itcm")42 zephyr_linker_dts_memory(NAME DTCM FLAGS rw CHOSEN "zephyr,dtcm")44 zephyr_linker_dts_memory(NAME SRAM1 FLAGS rw NODELABEL sram1)45 zephyr_linker_dts_memory(NAME SRAM2 FLAGS rw NODELABEL sram2)46 zephyr_linker_dts_memory(NAME SRAM3 FLAGS rw NODELABEL sram3)47 zephyr_linker_dts_memory(NAME SRAM4 FLAGS rw NODELABEL sram4)[all …]
42 #define LWM2M_PATH_MACRO(_1, _2, _3, _4, NAME, ...) NAME argument
7 get_filename_component(module_name ${module_dir} NAME)17 get_filename_component(module_name ${module_dir} NAME)
6 cmake_parse_arguments(OBJECT "" "ENTRY;FORMAT;NAME;OBJECT" "" ${ARGN})18 cmake_parse_arguments(OBJECT "" "NAME;OBJECT;SIZE;START;FLAGS" "" ${ARGN})61 cmake_parse_arguments(OBJECT "" "GROUP;LMA;NAME;OBJECT;SYMBOL;VMA" "" ${ARGN})69 find_object(OBJECT parent NAME ${OBJECT_GROUP})72 find_object(OBJECT obj NAME ${OBJECT_VMA})80 find_object(OBJECT obj NAME ${OBJECT_LMA})98 …set(single_args "NAME;ADDRESS;ALIGN_WITH_INPUT;TYPE;ALIGN;ENDALIGN;SUBALIGN;VMA;LMA;NOINPUT;NOINIT…175 find_object(OBJECT parent NAME ${SECTION_GROUP})178 find_object(OBJECT object NAME ${SECTION_VMA})187 find_object(OBJECT object NAME ${SECTION_LMA})[all …]
21 get_filename_component(soc_toolchain "${soc_toolchain_path}" NAME)
27 get_filename_component(some_toolchain "${some_toolchain_path}" NAME)
28 zephyr_linker_section(NAME .intList VMA IDT_LIST LMA IDT_LIST NOINPUT PASS 1)
6 get_filename_component(generator ${CMAKE_MAKE_PROGRAM} NAME)
2057 get_filename_component(basename ${filename} NAME)2895 # NAME my_data2949 # zephyr_linker_memory(NAME <name> START <address> SIZE <size> FLAGS <flags>)2958 # NAME <name> : Name of the memory region, for example FLASH.2972 set(single_args "FLAGS;NAME;SIZE;START")2999 # zephyr_linker_memory_ifdef(<setting> NAME <name> START <address> SIZE <size> FLAGS <flags>)3015 # zephyr_linker_dts_memory(NAME <name> PATH <path> FLAGS <flags>)3016 # zephyr_linker_dts_memory(NAME <name> NODELABEL <nodelabel> FLAGS <flags>)3017 # zephyr_linker_dts_memory(NAME <name> CHOSEN <prop> FLAGS <flags>)3028 # NAME <name> : Name of the memory region, for example FLASH.[all …]
30 get_filename_component(base_name ${CMAKE_CURRENT_BINARY_DIR} NAME)
702 #define NAME "foobar" in test_virtual_verify_name() macro705 char *tmp = NAME; in test_virtual_verify_name()709 net_virtual_set_name(iface, NAME); in test_virtual_verify_name()
73 get_filename_component(base_name ${CMAKE_CURRENT_BINARY_DIR} NAME)
321 list(APPEND SECTIONS "{NAME\;/DISCARD/\;NOINPUT\;TRUE\;NOSYMBOLS\;TRUE}")
72 NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}",\79 NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}",\
31 get_filename_component(base_name ${CMAKE_CURRENT_BINARY_DIR} NAME)
412 get_filename_component(ARCH ${BOARD_ARCH_DIR} NAME)443 get_filename_component(CONF_FILE_NAME ${CONF_FILE} NAME)
