1 /* 2 * Copyright (c) 2016 Piotr Mienkowski 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** @file 8 * @brief Definitions for IEEE 802.3, Section 2 MII compatible PHY transceivers 9 */ 10 11 #ifndef ZEPHYR_INCLUDE_NET_MII_H_ 12 #define ZEPHYR_INCLUDE_NET_MII_H_ 13 14 /** 15 * @brief Ethernet MII (media independent interface) functions 16 * @defgroup ethernet_mii Ethernet MII Support Functions 17 * @ingroup ethernet 18 * @{ 19 */ 20 21 /* MII management registers */ 22 /** Basic Mode Control Register */ 23 #define MII_BMCR 0x0 24 /** Basic Mode Status Register */ 25 #define MII_BMSR 0x1 26 /** PHY ID 1 Register */ 27 #define MII_PHYID1R 0x2 28 /** PHY ID 2 Register */ 29 #define MII_PHYID2R 0x3 30 /** Auto-Negotiation Advertisement Register */ 31 #define MII_ANAR 0x4 32 /** Auto-Negotiation Link Partner Ability Reg */ 33 #define MII_ANLPAR 0x5 34 /** Auto-Negotiation Expansion Register */ 35 #define MII_ANER 0x6 36 /** Auto-Negotiation Next Page Transmit Register */ 37 #define MII_ANNPTR 0x7 38 /** Auto-Negotiation Link Partner Received Next Page Reg */ 39 #define MII_ANLPRNPR 0x8 40 /** MMD Access Control Register */ 41 #define MII_MMD_ACR 0xd 42 /** MMD Access Address Data Register */ 43 #define MII_MMD_AADR 0xe 44 /** Extended Status Register */ 45 #define MII_ESTAT 0xf 46 47 /* Basic Mode Control Register (BMCR) bit definitions */ 48 /** PHY reset */ 49 #define MII_BMCR_RESET (1 << 15) 50 /** enable loopback mode */ 51 #define MII_BMCR_LOOPBACK (1 << 14) 52 /** 10=1000Mbps 01=100Mbps; 00=10Mbps */ 53 #define MII_BMCR_SPEED_LSB (1 << 13) 54 /** Auto-Negotiation enable */ 55 #define MII_BMCR_AUTONEG_ENABLE (1 << 12) 56 /** power down mode */ 57 #define MII_BMCR_POWER_DOWN (1 << 11) 58 /** isolate electrically PHY from MII */ 59 #define MII_BMCR_ISOLATE (1 << 10) 60 /** restart auto-negotiation */ 61 #define MII_BMCR_AUTONEG_RESTART (1 << 9) 62 /** full duplex mode */ 63 #define MII_BMCR_DUPLEX_MODE (1 << 8) 64 /** 10=1000Mbps 01=100Mbps; 00=10Mbps */ 65 #define MII_BMCR_SPEED_MSB (1 << 6) 66 /** Link Speed Field */ 67 #define MII_BMCR_SPEED_MASK (1 << 6 | 1 << 13) 68 /** select speed 10 Mb/s */ 69 #define MII_BMCR_SPEED_10 (0 << 6 | 0 << 13) 70 /** select speed 100 Mb/s */ 71 #define MII_BMCR_SPEED_100 (0 << 6 | 1 << 13) 72 /** select speed 1000 Mb/s */ 73 #define MII_BMCR_SPEED_1000 (1 << 6 | 0 << 13) 74 75 /* Basic Mode Status Register (BMSR) bit definitions */ 76 /** 100BASE-T4 capable */ 77 #define MII_BMSR_100BASE_T4 (1 << 15) 78 /** 100BASE-X full duplex capable */ 79 #define MII_BMSR_100BASE_X_FULL (1 << 14) 80 /** 100BASE-X half duplex capable */ 81 #define MII_BMSR_100BASE_X_HALF (1 << 13) 82 /** 10 Mb/s full duplex capable */ 83 #define MII_BMSR_10_FULL (1 << 12) 84 /** 10 Mb/s half duplex capable */ 85 #define MII_BMSR_10_HALF (1 << 11) 86 /** 100BASE-T2 full duplex capable */ 87 #define MII_BMSR_100BASE_T2_FULL (1 << 10) 88 /** 100BASE-T2 half duplex capable */ 89 #define MII_BMSR_100BASE_T2_HALF (1 << 9) 90 /** extend status information in reg 15 */ 91 #define MII_BMSR_EXTEND_STATUS (1 << 8) 92 /** PHY accepts management frames with preamble suppressed */ 93 #define MII_BMSR_MF_PREAMB_SUPPR (1 << 6) 94 /** Auto-negotiation process completed */ 95 #define MII_BMSR_AUTONEG_COMPLETE (1 << 5) 96 /** remote fault detected */ 97 #define MII_BMSR_REMOTE_FAULT (1 << 4) 98 /** PHY is able to perform Auto-Negotiation */ 99 #define MII_BMSR_AUTONEG_ABILITY (1 << 3) 100 /** link is up */ 101 #define MII_BMSR_LINK_STATUS (1 << 2) 102 /** jabber condition detected */ 103 #define MII_BMSR_JABBER_DETECT (1 << 1) 104 /** extended register capabilities */ 105 #define MII_BMSR_EXTEND_CAPAB (1 << 0) 106 107 /* Auto-negotiation Advertisement Register (ANAR) bit definitions */ 108 /* Auto-negotiation Link Partner Ability Register (ANLPAR) bit definitions */ 109 /** next page */ 110 #define MII_ADVERTISE_NEXT_PAGE (1 << 15) 111 /** link partner acknowledge response */ 112 #define MII_ADVERTISE_LPACK (1 << 14) 113 /** remote fault */ 114 #define MII_ADVERTISE_REMOTE_FAULT (1 << 13) 115 /** try for asymmetric pause */ 116 #define MII_ADVERTISE_ASYM_PAUSE (1 << 11) 117 /** try for pause */ 118 #define MII_ADVERTISE_PAUSE (1 << 10) 119 /** try for 100BASE-T4 support */ 120 #define MII_ADVERTISE_100BASE_T4 (1 << 9) 121 /** try for 100BASE-X full duplex support */ 122 #define MII_ADVERTISE_100_FULL (1 << 8) 123 /** try for 100BASE-X support */ 124 #define MII_ADVERTISE_100_HALF (1 << 7) 125 /** try for 10 Mb/s full duplex support */ 126 #define MII_ADVERTISE_10_FULL (1 << 6) 127 /** try for 10 Mb/s half duplex support */ 128 #define MII_ADVERTISE_10_HALF (1 << 5) 129 /** Selector Field */ 130 #define MII_ADVERTISE_SEL_MASK (0x1F << 0) 131 #define MII_ADVERTISE_SEL_IEEE_802_3 0x01 132 133 #define MII_ADVERTISE_ALL (MII_ADVERTISE_10_HALF | MII_ADVERTISE_10_FULL |\ 134 MII_ADVERTISE_100_HALF | MII_ADVERTISE_100_FULL |\ 135 MII_ADVERTISE_SEL_IEEE_802_3) 136 137 /** 138 * @} 139 */ 140 141 #endif /* ZEPHYR_INCLUDE_NET_MII_H_ */ 142
