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Searched refs:IT8XXX2_ECPM_PLLCTRL (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-2.7.6/soc/riscv/riscv-ite/it8xxx2/
Dsoc.c54 IT8XXX2_ECPM_PLLCTRL = mode; in chip_pll_ctrl()
56 IT8XXX2_ECPM_PLLCTRL = mode; in chip_pll_ctrl()
/Zephyr-Core-2.7.6/soc/riscv/riscv-ite/common/
Dchip_chipregs.h1815 #define IT8XXX2_ECPM_PLLCTRL ECREG(IT83XX_ECPM_BASE + 0x03) macro