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Searched refs:DT_SAME_NODE (Results 1 – 8 of 8) sorted by relevance

/Zephyr-Core-2.7.6/drivers/clock_control/
Dclock_control_mcux_scg.c102 #if DT_SAME_NODE(DT_CLOCKS_CTLR(MCUX_SCG_CLOCK_NODE(clkout_clk)), MCUX_SCG_CLOCK_NODE(slow_clk)) in mcux_scg_init()
104 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(MCUX_SCG_CLOCK_NODE(clkout_clk)), MCUX_SCG_CLOCK_NODE(sosc_clk)) in mcux_scg_init()
106 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(MCUX_SCG_CLOCK_NODE(clkout_clk)), MCUX_SCG_CLOCK_NODE(sirc_clk)) in mcux_scg_init()
108 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(MCUX_SCG_CLOCK_NODE(clkout_clk)), MCUX_SCG_CLOCK_NODE(firc_clk)) in mcux_scg_init()
110 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(MCUX_SCG_CLOCK_NODE(clkout_clk)), MCUX_SCG_CLOCK_NODE(spll_clk)) in mcux_scg_init()
/Zephyr-Core-2.7.6/tests/lib/devicetree/api/src/
Dmain.c316 zassert_true(DT_SAME_NODE(TEST_I2C_MUX_CTLR_1, in test_bus()
318 zassert_true(DT_SAME_NODE(TEST_I2C_MUX_CTLR_2, in test_bus()
326 zassert_true(DT_SAME_NODE(TEST_SPI_NO_CS, DT_INST_BUS(0)), in test_bus()
338 zassert_true(DT_SAME_NODE(CTLR_NODE, DT_NODELABEL(test_gpio_1)) || in test_bus()
339 DT_SAME_NODE(CTLR_NODE, DT_NODELABEL(test_gpio_2)), ""); in test_bus()
619 zassert_true(DT_SAME_NODE(DT_PROP(TEST_PH, ph), in test_phandles()
621 zassert_true(DT_SAME_NODE(DT_PROP_BY_IDX(TEST_PH, ph, 0), in test_phandles()
630 zassert_true(DT_SAME_NODE(DT_PROP_BY_IDX(TEST_PH, phs, 1), in test_phandles()
908 zassert_true(DT_SAME_NODE(DT_IO_CHANNELS_CTLR_BY_IDX(TEST_TEMP, 0), in test_io_channels()
910 zassert_true(DT_SAME_NODE(DT_IO_CHANNELS_CTLR_BY_IDX(TEST_TEMP, 1), in test_io_channels()
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/Zephyr-Core-2.7.6/include/drivers/clock_control/
Dstm32_clock_control.h239 #define STM32_SYSCLK_SRC_PLL DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(pll))
240 #define STM32_SYSCLK_SRC_HSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
241 #define STM32_SYSCLK_SRC_HSE DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_hse))
242 #define STM32_SYSCLK_SRC_MSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
243 #define STM32_SYSCLK_SRC_CSI DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
244 #define STM32_SYSCLK_SRC_MSIS DT_SAME_NODE(DT_RCC_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
269 #define STM32_PLL_SRC_MSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msi))
270 #define STM32_PLL_SRC_MSIS DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_msis))
271 #define STM32_PLL_SRC_HSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_hsi))
272 #define STM32_PLL_SRC_CSI DT_SAME_NODE(DT_PLL_CLOCKS_CTRL, DT_NODELABEL(clk_csi))
[all …]
/Zephyr-Core-2.7.6/soc/arm/nxp_kinetis/ke1xf/
Dsoc.c39 #if DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(core_clk)), SCG_CLOCK_NODE(spll_clk))
51 #if DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(core_clk)), SCG_CLOCK_NODE(sosc_clk))
53 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(core_clk)), SCG_CLOCK_NODE(sirc_clk))
55 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(core_clk)), SCG_CLOCK_NODE(firc_clk))
57 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(core_clk)), SCG_CLOCK_NODE(spll_clk))
137 #if DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(pll)), SCG_CLOCK_NODE(sosc_clk))
139 #elif DT_SAME_NODE(DT_CLOCKS_CTLR(SCG_CLOCK_NODE(pll)), SCG_CLOCK_NODE(firc_clk))
/Zephyr-Core-2.7.6/drivers/memc/
Dmemc_mcux_flexspi.c155 #define MEMC_FLEXSPI_CFG_XIP(node_id) DT_SAME_NODE(node_id, DT_NODELABEL(flexspi))
157 #define MEMC_FLEXSPI_CFG_XIP(node_id) DT_SAME_NODE(node_id, DT_NODELABEL(flexspi2))
/Zephyr-Core-2.7.6/samples/drivers/adc/src/
Dmain.c22 #if ADC_NUM_CHANNELS == 2 && !DT_SAME_NODE( \
/Zephyr-Core-2.7.6/include/
Ddevicetree.h485 #define DT_SAME_NODE(node_id1, node_id2) \ macro
/Zephyr-Core-2.7.6/doc/releases/
Drelease-notes-2.5.rst792 - :c:macro:`DT_SAME_NODE`