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Searched refs:DRAM_BASE (Results 1 – 2 of 2) sorted by relevance

/Zephyr-Core-2.7.6/soc/riscv/riscv-ite/common/
Dencoding.h90 #define DRAM_BASE 0x80000000 macro
/Zephyr-Core-2.7.6/include/arch/riscv/
Dcsr.h163 #define DRAM_BASE 0x80000000 macro