1 /* sensor_bmc150_magn.h - header file for BMC150 magnetometer sensor driver */
2 
3 /*
4 * Copyright (c) 2016 Intel Corporation
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8 
9 #ifndef ZEPHYR_DRIVERS_SENSOR_BMC150_MAGN_BMC150_MAGN_H_
10 #define ZEPHYR_DRIVERS_SENSOR_BMC150_MAGN_BMC150_MAGN_H_
11 
12 #include <zephyr/types.h>
13 #include <drivers/i2c.h>
14 #include <sys/util.h>
15 
16 #define BMC150_MAGN_REG_CHIP_ID		0x40
17 #define BMC150_MAGN_CHIP_ID_VAL		0x32
18 
19 #define BMC150_MAGN_REG_X_L		0x42
20 #define BMC150_MAGN_REG_X_M		0x43
21 #define BMC150_MAGN_REG_Y_L		0x44
22 #define BMC150_MAGN_REG_Y_M		0x45
23 #define BMC150_MAGN_SHIFT_XY_L		3
24 #define BMC150_MAGN_REG_Z_L		0x46
25 #define BMC150_MAGN_REG_Z_M		0x47
26 #define BMC150_MAGN_SHIFT_Z_L		1
27 #define BMC150_MAGN_REG_RHALL_L		0x48
28 #define BMC150_MAGN_REG_RHALL_M		0x49
29 #define BMC150_MAGN_SHIFT_RHALL_L	2
30 
31 #define BMC150_MAGN_REG_INT_STATUS	0x4A
32 
33 #define BMC150_MAGN_REG_POWER		0x4B
34 #define BMC150_MAGN_MASK_POWER_CTL	BIT(0)
35 
36 #define BMC150_MAGN_REG_OPMODE_ODR	0x4C
37 #define BMC150_MAGN_MASK_OPMODE		(BIT(2) | BIT(1))
38 #define BMC150_MAGN_SHIFT_OPMODE	1
39 #define BMC150_MAGN_MODE_NORMAL		0x00
40 #define BMC150_MAGN_MODE_FORCED		0x01
41 #define BMC150_MAGN_MODE_SLEEP		0x03
42 #define BMC150_MAGN_MASK_ODR		(BIT(5) | BIT(4) | BIT(3))
43 #define BMC150_MAGN_SHIFT_ODR		3
44 
45 #define BMC150_MAGN_REG_LOW_THRESH	0x4F
46 #define BMC150_MAGN_REG_HIGH_THRESH	0x50
47 #define BMC150_MAGN_REG_REP_XY		0x51
48 #define BMC150_MAGN_REG_REP_Z		0x52
49 #define BMC150_MAGN_REG_REP_DATAMASK	0xFF
50 
51 #define BMC150_MAGN_REG_TRIM_START	0x5D
52 #define BMC150_MAGN_REG_TRIM_END	0x71
53 
54 #define BMC150_MAGN_XY_OVERFLOW_VAL	-4096
55 #define BMC150_MAGN_Z_OVERFLOW_VAL	-16384
56 
57 #define BMC150_MAGN_REGVAL_TO_REPXY(regval)	(((regval) * 2) + 1)
58 #define BMC150_MAGN_REGVAL_TO_REPZ(regval)	((regval) + 1)
59 #define BMC150_MAGN_REPXY_TO_REGVAL(rep)	(((rep) - 1) / 2)
60 #define BMC150_MAGN_REPZ_TO_REGVAL(rep)		((rep) - 1)
61 
62 #define BMC150_MAGN_REG_INT                     0x4D
63 
64 #define BMC150_MAGN_REG_INT_DRDY                0x4E
65 #define BMC150_MAGN_MASK_DRDY_EN                BIT(7)
66 #define BMC150_MAGN_SHIFT_DRDY_EN               7
67 #define BMC150_MAGN_MASK_DRDY_INT3              BIT(6)
68 #define BMC150_MAGN_MASK_DRDY_Z_EN              BIT(5)
69 #define BMC150_MAGN_MASK_DRDY_Y_EN              BIT(4)
70 #define BMC150_MAGN_MASK_DRDY_X_EN              BIT(3)
71 #define BMC150_MAGN_MASK_DRDY_DR_POLARITY       BIT(2)
72 #define BMC150_MAGN_SHIFT_DRDY_DR_POLARITY      2
73 #define BMC150_MAGN_MASK_DRDY_LATCHING          BIT(1)
74 #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY     BIT(0)
75 
76 #define BMC150_MAGN_I2C_ADDR			DT_INST_REG_ADDR(0)
77 
78 #if defined(CONFIG_BMC150_MAGN_SAMPLING_REP_XY) || \
79 	defined(CONFIG_BMC150_MAGN_SAMPLING_REP_Z)
80 	#define BMC150_MAGN_SET_ATTR_REP
81 #endif
82 
83 #if defined(CONFIG_BMC150_MAGN_SAMPLING_RATE_RUNTIME) || \
84 	defined(BMC150_MAGN_SET_ATTR_REP)
85 	#define BMC150_MAGN_SET_ATTR
86 #endif
87 
88 struct bmc150_magn_config {
89 #if defined(CONFIG_BMC150_MAGN_TRIGGER_DRDY)
90 	char *gpio_drdy_dev_name;
91 	gpio_pin_t gpio_drdy_int_pin;
92 	gpio_dt_flags_t gpio_drdy_int_flags;
93 #endif
94 	uint16_t i2c_slave_addr;
95 	char *i2c_master_dev_name;
96 };
97 
98 struct bmc150_magn_trim_regs {
99 	int8_t x1;
100 	int8_t y1;
101 	uint16_t reserved1;
102 	uint8_t reserved2;
103 	int16_t z4;
104 	int8_t x2;
105 	int8_t y2;
106 	uint16_t reserved3;
107 	int16_t z2;
108 	uint16_t z1;
109 	uint16_t xyz1;
110 	int16_t z3;
111 	int8_t xy2;
112 	uint8_t xy1;
113 } __packed;
114 
115 struct bmc150_magn_data {
116 	const struct device *i2c_master;
117 	struct k_sem sem;
118 
119 #if defined(CONFIG_BMC150_MAGN_TRIGGER)
120 	K_KERNEL_STACK_MEMBER(thread_stack,
121 			      CONFIG_BMC150_MAGN_TRIGGER_THREAD_STACK);
122 	struct k_thread thread;
123 #endif
124 
125 #if defined(CONFIG_BMC150_MAGN_TRIGGER_DRDY)
126 	const struct device *gpio_drdy;
127 	const struct device *dev;
128 	struct gpio_callback gpio_cb;
129 	struct sensor_trigger trigger_drdy;
130 	sensor_trigger_handler_t handler_drdy;
131 #endif
132 
133 	struct bmc150_magn_trim_regs tregs;
134 	int rep_xy, rep_z, odr, max_odr;
135 	int sample_x, sample_y, sample_z;
136 };
137 
138 enum bmc150_magn_power_modes {
139 	BMC150_MAGN_POWER_MODE_SUSPEND,
140 	BMC150_MAGN_POWER_MODE_SLEEP,
141 	BMC150_MAGN_POWER_MODE_NORMAL,
142 };
143 
144 enum bmc150_magn_presets {
145 	LOW_POWER_PRESET,
146 	REGULAR_PRESET,
147 	ENHANCED_REGULAR_PRESET,
148 	HIGH_ACCURACY_PRESET
149 };
150 
151 #if defined(CONFIG_BMC150_MAGN_PRESET_LOW_POWER)
152 	#define BMC150_MAGN_DEFAULT_PRESET LOW_POWER_PRESET
153 #elif defined(CONFIG_BMC150_MAGN_PRESET_REGULAR)
154 	#define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
155 #elif defined(CONFIG_BMC150_MAGN_PRESET_ENHANCED_REGULAR)
156 	#define BMC150_MAGN_DEFAULT_PRESET ENHANCED_REGULAR_PRESET
157 #elif defined(CONFIG_BMC150_MAGN_PRESET_HIGH_ACCURACY)
158 	#define BMC150_MAGN_DEFAULT_PRESET HIGH_ACCURACY_PRESET
159 #endif
160 
161 enum bmc150_magn_axis {
162 	BMC150_MAGN_AXIS_X,
163 	BMC150_MAGN_AXIS_Y,
164 	BMC150_MAGN_AXIS_Z,
165 	BMC150_MAGN_RHALL,
166 	BMC150_MAGN_AXIS_XYZ_MAX = BMC150_MAGN_RHALL,
167 	BMC150_MAGN_AXIS_XYZR_MAX,
168 };
169 
170 #if defined(CONFIG_BMC150_MAGN_TRIGGER)
171 int bmc150_magn_trigger_set(const struct device *dev,
172 			    const struct sensor_trigger *trig,
173 			    sensor_trigger_handler_t handler);
174 
175 int bmc150_magn_init_interrupt(const struct device *dev);
176 #endif
177 
178 #endif /* ZEPHYR_DRIVERS_SENSOR_BMC150_MAGN_BMC150_MAGN_H_ */
179