| /Zephyr-4.2.1/doc/hardware/peripherals/ |
| D | peci.rst | 11 The PECI interface allows external devices to read processor temperature,
12 perform processor manageability functions, and manage processor interface
|
| /Zephyr-4.2.1/drivers/pinctrl/ |
| D | Kconfig.xlnx | 5 bool "Xilinx Zynq 7000 processor system MIO pin controller driver"
10 Enable the Xilinx Zynq 7000 processor system MIO pin controller driver.
|
| /Zephyr-4.2.1/boards/intel/niosv_g/doc/ |
| D | index.rst | 23 For example, Arria10 Nios® V/g processor example design system prebuilt files can be downloaded fro…
24 …t/www/us/en/design-example/776196/intel-arria-10-fpga-hello-world-design-on-nios-v-g-processor.html
28 Create Nios® V/g processor example design system in FPGA
31 Please use Intel Quartus Programmer tool to program Nios® V/g processor based system into the FPGA …
33 In order to create the Nios® V/g processor inside the FPGA device, please download the generated .s…
44 top.sof is referring to Nios® V/m processor based system SRAM Object File.
55 Use the JTAG UART terminal to print the stdout and stderr of the Nios® V/g processor system.
|
| /Zephyr-4.2.1/arch/rx/ |
| D | Kconfig | 17 Set if the processor has the exception vector table.
22 Set if the processor supports the Renesas RXv1 instruction set.
28 Set if the processor supports the Renesas RXv2 instruction set.
34 Set if the processor supports the Renesas RXv3 instruction set.
|
| /Zephyr-4.2.1/boards/intel/niosv_m/doc/ |
| D | index.rst | 23 For example, Arria10 Nios® V/m processor example design system prebuilt files can be downloaded fro…
28 Create Nios® V/m processor example design system in FPGA
31 Please use Intel Quartus Programmer tool to program Nios® V/m processor based system into the FPGA …
33 In order to create the Nios® V/m processor inside the FPGA device, please download the generated .s…
44 top.sof is referring to Nios® V/m processor based system SRAM Object File.
55 Use the JTAG UART terminal to print the stdout and stderr of the Nios® V/m processor system.
|
| /Zephyr-4.2.1/modules/thrift/src/thrift/server/ |
| D | TServer.h | 177 TServer(const std::shared_ptr<TProcessor> &processor) in TServer() argument
178 : processorFactory_(new TSingletonProcessorFactory(processor)) in TServer()
204 TServer(const std::shared_ptr<TProcessor> &processor, in TServer() argument
206 : processorFactory_(new TSingletonProcessorFactory(processor)), in TServer()
230 TServer(const std::shared_ptr<TProcessor> &processor, in TServer() argument
234 : processorFactory_(new TSingletonProcessorFactory(processor)), in TServer()
255 TServer(const std::shared_ptr<TProcessor> &processor, in TServer() argument
261 : processorFactory_(new TSingletonProcessorFactory(processor)), in TServer()
|
| D | TServerFramework.cpp | 58 TServerFramework::TServerFramework(const shared_ptr<TProcessor> &processor, in TServerFramework() argument
62 : TServer(processor, serverTransport, transportFactory, protocolFactory), clients_(0), in TServerFramework()
79 TServerFramework::TServerFramework(const shared_ptr<TProcessor> &processor, in TServerFramework() argument
85 : TServer(processor, serverTransport, inputTransportFactory, outputTransportFactory, in TServerFramework()
|
| /Zephyr-4.2.1/boards/renesas/rcar_salvator_x/support/ |
| D | openocd.cfg | 39 # This function make use of A5x processor to:
42 # - Halt the processor
63 # resume a5x processor or cmt timer will not run
65 # set CR7 processor as default target for future commands
72 # Resume the A57 processor and gives
|
| /Zephyr-4.2.1/boards/intel/adl/doc/ |
| D | index.rst | 8 Alder Lake processor is a 64-bit multi-core processor built on 10-nanometer
11 Currently supported is N-processor line, Single Chip Platform that consists of
65 .. _INTEL_ADL: https://edc.intel.com/content/www/us/en/design/products/platforms/processor-and-core…
|
| /Zephyr-4.2.1/boards/infineon/cyw920829m2evk_02/ |
| D | cyw920829m2ipa2.dtsi | 8 /* SoM DTSI for CYW920829M2IPA2 processor card
30 /* QSPI flash device on CYW920829M2IPA2 processor card */
|
| /Zephyr-4.2.1/dts/arm/infineon/cat1b/mpns/ |
| D | cyw89829b0232.dtsi | 14 /* QSPI Flash is included in the processor package for this part. */
33 /* QSPI flash node that exists on CYW920829M2IPA2 processor card */
|
| D | cyw89829b1232.dtsi | 14 /* QSPI Flash is included in the processor package for this part. */
33 /* QSPI flash node that exists on CYW920829M2IPA2 processor card */
|
| /Zephyr-4.2.1/boards/intel/wcl/doc/ |
| D | index.rst | 5 Wildcat lake processor is a 64-bit multi-core processor.
55 …s/en/secure/design/confidential/products/platforms/details/wildcat-lake-processor-external-design-…
|
| /Zephyr-4.2.1/boards/intel/ptl/doc/ |
| D | index.rst | 5 Panther Lake H processor is a 64-bit multi-core processor built on the advanced
54 …n/confidential/products/platforms/details/panther-lake/panther-lake-u-h-processor-external-design-…
|
| /Zephyr-4.2.1/tests/kernel/smp/ |
| D | Kconfig | 24 on other processor(s).
31 processed on other processor(s). Each retry the wait
|
| /Zephyr-4.2.1/boards/wch/ch32v303vct6_evt/doc/ |
| D | index.rst | 7 processor.
10 the processor's information and the datasheet.
15 The QingKe V4F 32-bit RISC-V processor of the WCH CH32V303VCT6-EVT is clocked by an external
|
| /Zephyr-4.2.1/samples/modules/thrift/hello/server/src/ |
| D | main.cpp | 75 std::shared_ptr<TProcessor> processor(new HelloProcessor(handler)); in main() local
117 TSimpleServer server(processor, serverTransport, transportFactory, protocolFactory); in main()
|
| /Zephyr-4.2.1/samples/subsys/ipc/openamp_rsc_table/boards/ |
| D | stm32mp257f_ev1_stm32mp257fxx_m33.overlay | 10 * shared memory reserved for the inter-processor communication
|
| D | stm32mp257f_dk_stm32mp257fxx_m33.overlay | 10 * shared memory reserved for the inter-processor communication
|
| /Zephyr-4.2.1/samples/subsys/ipc/openamp/boards/ |
| D | v2m_musca_b1.overlay | 10 * shared memory reserved for the inter-processor communication
|
| D | lpcxpresso54114_lpc54114_m4.overlay | 10 * shared memory reserved for the inter-processor communication
|
| D | mps2_an521_cpu0.overlay | 10 * shared memory reserved for the inter-processor communication
|
| /Zephyr-4.2.1/samples/subsys/ipc/openamp/remote/boards/ |
| D | lpcxpresso54114_lpc54114_m0.overlay | 10 * shared memory reserved for the inter-processor communication
|
| D | v2m_musca_b1_musca_b1_ns.overlay | 10 * shared memory reserved for the inter-processor communication
|
| /Zephyr-4.2.1/samples/subsys/ipc/rpmsg_service/boards/ |
| D | v2m_musca_b1.overlay | 10 * shared memory reserved for the inter-processor communication
|
