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Searched refs:alignment (Results 1 – 25 of 229) sorted by relevance

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/Zephyr-4.2.1/dts/xtensa/intel/
Dintel_adsp_cavs.dtsi18 dma-buf-size-alignment = <4>;
19 dma-copy-alignment = <4>;
31 dma-buf-size-alignment = <4>;
32 dma-copy-alignment = <4>;
42 dma-buf-addr-alignment = <128>;
43 dma-buf-size-alignment = <32>;
44 dma-copy-alignment = <32>;
54 dma-buf-addr-alignment = <128>;
55 dma-buf-size-alignment = <32>;
56 dma-copy-alignment = <32>;
[all …]
Dintel_adsp_ace15_mtpm.dtsi505 dma-buf-addr-alignment = <128>;
506 dma-buf-size-alignment = <32>;
507 dma-copy-alignment = <16>;
518 dma-buf-addr-alignment = <128>;
519 dma-buf-size-alignment = <32>;
520 dma-copy-alignment = <16>;
531 dma-buf-addr-alignment = <128>;
532 dma-buf-size-alignment = <32>;
533 dma-copy-alignment = <16>;
546 dma-buf-addr-alignment = <128>;
[all …]
/Zephyr-4.2.1/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20-ipc_conf.dtsi27 dcache-alignment = <32>;
37 dcache-alignment = <32>;
45 dcache-alignment = <32>;
53 dcache-alignment = <32>;
62 dcache-alignment = <32>;
/Zephyr-4.2.1/boards/nordic/nrf9280pdk/
Dnrf9280pdk_nrf9280-ipc_conf.dtsi27 dcache-alignment = <32>;
37 dcache-alignment = <32>;
45 dcache-alignment = <32>;
53 dcache-alignment = <32>;
/Zephyr-4.2.1/soc/espressif/esp32/
Dgdbstub.c22 .alignment = 4,
29 .alignment = 4,
36 .alignment = 4,
43 .alignment = 4,
50 .alignment = 4,
57 .alignment = 4,
64 .alignment = 4,
71 .alignment = 4,
78 .alignment = 4,
88 .alignment = 4,
[all …]
/Zephyr-4.2.1/scripts/build/
Dgen_iter_sections.py19 def gen_ld(filepath: str, items: list, alignment: int):
25 def gen_cmake(filepath: str, items: list, alignment: int):
68 gen_ld(args.ld_output, items, args.alignment)
69 gen_cmake(args.cmake_output, items, args.alignment)
/Zephyr-4.2.1/include/zephyr/fs/
Dlittlefs.h86 #define FS_LITTLEFS_DECLARE_CUSTOM_CONFIG(name, alignment, read_sz, prog_sz, cache_sz, \ argument
88 static uint8_t __aligned(alignment) name ## _read_buffer[cache_sz]; \
89 static uint8_t __aligned(alignment) name ## _prog_buffer[cache_sz]; \
/Zephyr-4.2.1/subsys/ipc/ipc_service/lib/
DKconfig15 int "VRINGs alignment"
19 Static VRINGs alignment. This should take into account the cache line
20 alignment if the cache is enabled.
/Zephyr-4.2.1/arch/arm64/core/cortex_r/
DKconfig16 Minimum size (and alignment) of an ARM MPU region. Use this
17 symbol to guarantee minimum size and alignment of MPU regions.
18 A minimum 4-byte alignment is enforced in ARM builds without
/Zephyr-4.2.1/samples/drivers/display/
DKconfig11 int "The display buffer address alignment"
15 int "The update area pitch alignment"
/Zephyr-4.2.1/modules/littlefs/
Dzephyr_lfs_config.h93 static inline uint32_t lfs_aligndown(uint32_t a, uint32_t alignment) in lfs_aligndown() argument
95 return a - (a % alignment); in lfs_aligndown()
98 static inline uint32_t lfs_alignup(uint32_t a, uint32_t alignment) in lfs_alignup() argument
100 return lfs_aligndown(a + alignment-1, alignment); in lfs_alignup()
/Zephyr-4.2.1/arch/arm/core/mpu/
DKconfig17 Minimum size (and alignment) of an ARM MPU region. Use this
18 symbol to guarantee minimum size and alignment of MPU regions.
19 A minimum 4-byte alignment is enforced in ARM builds without
35 Minimum size (and alignment when applicable) of an ARM MPU
60 for respect alignment. But that needs carefully configure MPU region
68 it should consume less alignment memory. Although this alignment
/Zephyr-4.2.1/subsys/fs/ext2/
DKconfig48 int "Ext2 superblock alignment"
51 Some SD host controllers require alignment of their data buffers
53 this value if they require alignment. This represents the alignment
/Zephyr-4.2.1/tests/drivers/display/display_read_write/
DKconfig14 int "Display buffer memory alignment"
17 Specific display buffer alignment.
/Zephyr-4.2.1/arch/x86/
Dgen_static_shstk_array.py185 isr_depth = stack_size = alignment = hw_stack_percentage = hw_stack_min_size = None
196 alignment = int(line.split("=")[1].strip())
206 if alignment is None:
214 stack_size = int((stack_size + alignment - 1) / alignment) * alignment
/Zephyr-4.2.1/arch/arm/core/cortex_m/
Drelay_vector_table.ld11 * Therefore, vector_relay_table must respect the alignment requirements
21 * exception entries in the vector table. The minimum alignment of 32 words
23 * For more than 16 HW interrupts, we adjust the alignment by rounding up
Dram_vector_table.ld11 * size of alignment in RAM space.
16 /* Heritage of vector table alignment in flash (see vector_table.ld in arch/arm/core/) */
/Zephyr-4.2.1/doc/kernel/usermode/
Dmpu_stack_objects.rst15 implications for placement are directly attributed to the alignment
37 memory. These constraints include determining the alignment of the stack and
43 can include alignment of beginning and end addresses, sizes of allocations,
54 start and end addresses require 32 byte alignment. An example of this kind of
61 Size and alignment constraints may result in stack allocations being larger
/Zephyr-4.2.1/lib/libc/common/source/stdlib/
Dmalloc.c156 void *aligned_alloc(size_t alignment, size_t size) in aligned_alloc() argument
161 alignment, in aligned_alloc()
187 void *memalign(size_t alignment, size_t size) in memalign() argument
189 return aligned_alloc(alignment, size); in memalign()
/Zephyr-4.2.1/include/zephyr/arch/arm/cortex_a_r/scripts/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-4.2.1/include/zephyr/arch/arm/cortex_r/scripts/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-4.2.1/include/zephyr/arch/common/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-4.2.1/soc/ambiq/apollo5x/
DKconfig41 int "Byte alignment of the DMA buffer"
45 This option specifies the DMA buffers' alignment
/Zephyr-4.2.1/lib/net_buf/
DKconfig53 int "Network buffer alignment restriction"
59 Default value of 0 means the alignment will be the size of a void pointer,
60 any other value will force the alignment of a net buffer in bytes.
/Zephyr-4.2.1/arch/riscv/custom/andes/
Dpma_align_start.ld8 /* Make linker section alignment comply with PMA granularity. */

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