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Searched refs:aligned_size (Results 1 – 8 of 8) sorted by relevance

/Zephyr-4.2.1/kernel/
Dmmu.c895 size_t aligned_size, align_boundary; in k_mem_map_phys_bare() local
904 addr_offset = k_mem_region_align(&aligned_phys, &aligned_size, in k_mem_map_phys_bare()
907 __ASSERT(aligned_size != 0U, "0-length mapping at 0x%lx", aligned_phys); in k_mem_map_phys_bare()
908 __ASSERT(aligned_phys < (aligned_phys + (aligned_size - 1)), in k_mem_map_phys_bare()
910 aligned_phys, aligned_size); in k_mem_map_phys_bare()
912 align_boundary = arch_virt_region_align(aligned_phys, aligned_size); in k_mem_map_phys_bare()
930 IN_RANGE(aligned_phys + aligned_size - 1, in k_mem_map_phys_bare()
934 uint8_t *adjusted_end = min(dest_addr + aligned_size, in k_mem_map_phys_bare()
947 dest_addr = virt_region_alloc(aligned_size, align_boundary); in k_mem_map_phys_bare()
960 aligned_phys, aligned_size, flags, addr_offset); in k_mem_map_phys_bare()
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/Zephyr-4.2.1/drivers/flash/
Dflash_esp32.c378 size_t aligned_size = 0; in flash_esp32_read() local
395 aligned_size = copy_size & ~3; in flash_esp32_read()
396 ret = esp_rom_flash_read(address, dest_ptr, aligned_size, allow_decrypt); in flash_esp32_read()
401 address += aligned_size; in flash_esp32_read()
402 dest_ptr += aligned_size; in flash_esp32_read()
403 remaining -= aligned_size; in flash_esp32_read()
407 aligned_size = (copy_size + addr_offset + 3) & ~3; in flash_esp32_read()
409 ret = esp_rom_flash_read(start_addr, temp_buf, aligned_size, allow_decrypt); in flash_esp32_read()
/Zephyr-4.2.1/include/zephyr/kernel/
Dmm.h293 size_t k_mem_region_align(uintptr_t *aligned_addr, size_t *aligned_size,
/Zephyr-4.2.1/soc/intel/intel_adsp/common/include/
Dintel_adsp_hda.h171 uint32_t aligned_size = buf_size & HDA_BUFFER_SIZE_MASK; in intel_adsp_hda_set_buffer() local
174 __ASSERT(aligned_size == buf_size, in intel_adsp_hda_set_buffer()
188 __ASSERT(aligned_addr + aligned_size < _INTEL_ADSP_BASE + _INTEL_ADSP_SIZE, in intel_adsp_hda_set_buffer()
200 *DGBS(base, regblock_size, sid) = aligned_size; in intel_adsp_hda_set_buffer()
/Zephyr-4.2.1/arch/xtensa/core/
Dmpu.c1013 size_t aligned_size, addr_offset; in arch_buffer_validate() local
1019 aligned_size = ROUND_UP(size + addr_offset, XCHAL_MPU_ALIGN); in arch_buffer_validate()
1021 for (size_t offset = 0; offset < aligned_size; in arch_buffer_validate()
1084 size_t aligned_size, addr_offset; in xtensa_mem_kernel_has_access() local
1090 aligned_size = ROUND_UP(size + addr_offset, XCHAL_MPU_ALIGN); in xtensa_mem_kernel_has_access()
1092 for (size_t offset = 0; offset < aligned_size; in xtensa_mem_kernel_has_access()
Dptables.c1388 size_t aligned_size; in mem_buffer_validate() local
1393 k_mem_region_align((uintptr_t *)&virt, &aligned_size, in mem_buffer_validate()
1396 for (size_t offset = 0; offset < aligned_size; in mem_buffer_validate()
/Zephyr-4.2.1/tests/kernel/mem_protect/mem_map/src/
Dmain.c61 size_t aligned_size; in ZTEST() local
89 k_mem_region_align(&aligned_addr, &aligned_size, (uintptr_t)mapped_rw, in ZTEST()
94 sys_cache_data_flush_and_invd_range((void *)aligned_addr, aligned_size); in ZTEST()
/Zephyr-4.2.1/arch/x86/core/
Dx86_mmu.c1445 size_t aligned_size; in arch_buffer_validate() local
1449 (void)k_mem_region_align((uintptr_t *)&virt, &aligned_size, in arch_buffer_validate()
1452 for (size_t offset = 0; offset < aligned_size; in arch_buffer_validate()