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Searched refs:tss (Results 1 – 8 of 8) sorted by relevance

/Zephyr-4.1.0/arch/x86/
Dgen_idt.py77 def create_task_gate(tss, dpl): argument
82 data = struct.pack(gate_desc_format, 0, tss, 0, type_attr, 0)
88 for handler, tss, dpl in idt_config:
89 if handler and tss:
92 if not handler and not tss:
98 data = create_task_gate(tss, dpl)
141 for handler, irq, prio, vec, dpl, tss in intlist:
154 vectors[vec] = (handler, tss, dpl)
158 for handler, irq, prio, vec, dpl, tss in intlist:
172 vectors[vec] = (handler, tss, dpl)
/Zephyr-4.1.0/arch/x86/include/intel64/
Dkernel_arch_data.h58 Z_GENERIC_SECTION(.tss) \
59 struct x86_tss64 tss##n = { \
69 .gs_base = &tss##n, \
/Zephyr-4.1.0/include/zephyr/arch/x86/ia32/
Darch.h96 unsigned int tss; member
130 .tss = 0 \
155 .tss = (tss_p) \
/Zephyr-4.1.0/lib/libc/common/
DCMakeLists.txt20 source/thrd/tss.c
/Zephyr-4.1.0/arch/x86/core/ia32/
Dfatal.c137 Z_GENERIC_SECTION(.tss)
150 Z_GENERIC_SECTION(.tss)
/Zephyr-4.1.0/include/zephyr/arch/x86/ia32/scripts/
Dshared_kernel_pages.ld29 KEEP(*(.tss))
/Zephyr-4.1.0/include/zephyr/arch/x86/intel64/
Dlinker.ld64 *(.tss)
/Zephyr-4.1.0/arch/x86/core/intel64/
Dlocore.S86 .word tss\idx