1 /* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_POWER_NXP_RW_PMU_H_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_POWER_NXP_RW_PMU_H_ 9 10 #define PMU_RESET_CM33_SOFT_RESET 0x1 11 #define PMU_RESET_CM33_LOCKUP 0x2 12 #define PMU_RESET_WATCHDOG 0x4 13 #define PMU_RESET_AP_RESET 0x8 14 #define PMU_RESET_CODE_WATCHDOG 0x10 15 #define PMU_RESET_ITRC 0x20 16 #define PMU_RESET_RESETB 0x40 17 #define PMU_RESET_ALL 0x7F 18 19 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_POWER_NXP_RW_PMU_H_ */ 20
