1 /*
2  * Copyright (c) 2022 Henrik Brix Andersen <henrik@brixandersen.dk>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_
9 
10 /**
11  * @name IO buffer type
12  *
13  * Definitions for Xilinx Zynq-7000 pinctrl `power-source` devicetree property values. The value
14  * corresponds to what is written to the IO_Type field in the MIO_PIN_xx SLCR register.
15  *
16  * @{
17  */
18 #define IO_STANDARD_LVCMOS18 1
19 #define IO_STANDARD_LVCMOS25 2
20 #define IO_STANDARD_LVCMOS33 3
21 #define IO_STANDARD_HSTL     4
22 /** @} */
23 
24 /**
25  * @name IO buffer edge rate
26  *
27  * Definitions for Xilinx Zynq-7000 pinctrl `slew-rate` devicetree property values. The value
28  * corresponds to what is written to the Speed field in the MIO_PIN_xx SLCR register.
29  *
30  * @{
31  */
32 #define IO_SPEED_SLOW 0
33 #define IO_SPEED_FAST 1
34 /** @} */
35 
36 
37 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_PINCTRL_ZYNQ_H_ */
38