1 /* 2 * Copyright (c) 2022 Espressif Systems (Shanghai) Co., Ltd. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ 9 10 /* Supported CPU clock Sources */ 11 #define ESP32_CPU_CLK_SRC_XTAL 0U 12 #define ESP32_CPU_CLK_SRC_PLL 1U 13 #define ESP32_CLK_SRC_RC_FAST 2U 14 15 /* Supported PLL CPU frequencies */ 16 #define ESP32_CLK_CPU_PLL_80M 80000000 17 #define ESP32_CLK_CPU_PLL_160M 160000000 18 #define ESP32_CLK_CPU_PLL_240M 240000000 19 #define ESP32_CLK_CPU_RC_FAST_FREQ 17500000 20 21 /* Supported XTAL frequencies */ 22 #define ESP32_CLK_XTAL_32M 32000000 23 #define ESP32_CLK_XTAL_40M 40000000 24 25 /* Supported RTC fast clock sources */ 26 #define ESP32_RTC_FAST_CLK_SRC_XTAL_D2 0 27 #define ESP32_RTC_FAST_CLK_SRC_RC_FAST 1 28 29 /* Supported RTC slow clock sources */ 30 #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW 0 31 #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K 1 32 #define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256 2 33 #define ESP32_RTC_SLOW_CLK_32K_EXT_OSC 9 34 35 /* RTC slow clock frequencies */ 36 #define ESP32_RTC_SLOW_CLK_SRC_RC_SLOW_FREQ 136000 37 #define ESP32_RTC_SLOW_CLK_SRC_XTAL32K_FREQ 32768 38 #define ESP32_RTC_SLOW_CLK_SRC_RC_FAST_D256_FREQ 68359 39 40 /* Modules IDs 41 * These IDs are actually offsets in CLK and RST Control registers. 42 * These IDs shouldn't be changed unless there is a Hardware change 43 * from Espressif. 44 * 45 * Basic Modules 46 * Registers: DPORT_PERIP_CLK_EN_REG, DPORT_PERIP_RST_EN_REG 47 */ 48 #define ESP32_LEDC_MODULE 0 49 #define ESP32_UART0_MODULE 1 50 #define ESP32_UART1_MODULE 2 51 #define ESP32_UART2_MODULE 3 52 #define ESP32_USB_MODULE 4 53 #define ESP32_I2C0_MODULE 5 54 #define ESP32_I2C1_MODULE 6 55 #define ESP32_I2S0_MODULE 7 56 #define ESP32_I2S1_MODULE 8 57 #define ESP32_LCD_CAM_MODULE 9 58 #define ESP32_TIMG0_MODULE 10 59 #define ESP32_TIMG1_MODULE 11 60 #define ESP32_PWM0_MODULE 12 61 #define ESP32_PWM1_MODULE 13 62 #define ESP32_PWM2_MODULE 14 63 #define ESP32_PWM3_MODULE 15 64 #define ESP32_UHCI0_MODULE 16 65 #define ESP32_UHCI1_MODULE 17 66 #define ESP32_RMT_MODULE 18 67 #define ESP32_PCNT_MODULE 19 68 #define ESP32_SPI_MODULE 20 69 #define ESP32_SPI2_MODULE 21 70 #define ESP32_SPI3_MODULE 22 71 #define ESP32_SDMMC_MODULE 23 72 #define ESP32_TWAI_MODULE 24 73 #define ESP32_RNG_MODULE 25 74 #define ESP32_WIFI_MODULE 26 75 #define ESP32_BT_MODULE 27 76 #define ESP32_WIFI_BT_COMMON_MODULE 28 77 #define ESP32_BT_BASEBAND_MODULE 29 78 #define ESP32_BT_LC_MODULE 30 79 #define ESP32_AES_MODULE 31 80 #define ESP32_SHA_MODULE 32 81 #define ESP32_HMAC_MODULE 33 82 #define ESP32_DS_MODULE 34 83 #define ESP32_RSA_MODULE 35 84 #define ESP32_SYSTIMER_MODULE 36 85 #define ESP32_GDMA_MODULE 37 86 #define ESP32_DEDIC_GPIO_MODULE 38 87 #define ESP32_SARADC_MODULE 39 88 #define ESP32_MODULE_MAX 40 89 90 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_ESP32S3_H_ */ 91
