1 /*
2  * Copyright (c) 2022 Aspeed Technology Inc.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AST10X0_H_
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AST10X0_H_
9 
10 #define ASPEED_CLK_GRP_0_OFFSET		(0)
11 #define ASPEED_CLK_GRP_1_OFFSET		(32)
12 #define ASPEED_CLK_GRP_2_OFFSET		(64)
13 
14 #define ASPEED_CLK_MCLK			(ASPEED_CLK_GRP_0_OFFSET + 0)
15 #define ASPEED_CLK_USB_DEVICE		(ASPEED_CLK_GRP_0_OFFSET + 7)
16 #define ASPEED_CLK_YCLK			(ASPEED_CLK_GRP_0_OFFSET + 13)
17 
18 #define ASPEED_CLK_LCLK			(ASPEED_CLK_GRP_1_OFFSET + 0)
19 #define ASPEED_CLK_ESPI			(ASPEED_CLK_GRP_1_OFFSET + 1)
20 #define ASPEED_CLK_REFCLK		(ASPEED_CLK_GRP_1_OFFSET + 2)
21 
22 #define ASPEED_CLK_LHCCLK		(ASPEED_CLK_GRP_1_OFFSET + 5)
23 #define ASPEED_CLK_RSACLK		(ASPEED_CLK_GRP_1_OFFSET + 6)
24 
25 #define ASPEED_CLK_I3C0			(ASPEED_CLK_GRP_1_OFFSET + 8)
26 #define ASPEED_CLK_I3C1			(ASPEED_CLK_GRP_1_OFFSET + 9)
27 #define ASPEED_CLK_I3C2			(ASPEED_CLK_GRP_1_OFFSET + 10)
28 #define ASPEED_CLK_I3C3			(ASPEED_CLK_GRP_1_OFFSET + 11)
29 
30 #define ASPEED_CLK_UART1		(ASPEED_CLK_GRP_1_OFFSET + 16)
31 #define ASPEED_CLK_UART2		(ASPEED_CLK_GRP_1_OFFSET + 17)
32 #define ASPEED_CLK_UART3		(ASPEED_CLK_GRP_1_OFFSET + 18)
33 #define ASPEED_CLK_UART4		(ASPEED_CLK_GRP_1_OFFSET + 19)
34 #define ASPEED_CLK_MAC			(ASPEED_CLK_GRP_1_OFFSET + 20)
35 
36 #define ASPEED_CLK_UART6		(ASPEED_CLK_GRP_1_OFFSET + 22)
37 #define ASPEED_CLK_UART7		(ASPEED_CLK_GRP_1_OFFSET + 23)
38 #define ASPEED_CLK_UART8		(ASPEED_CLK_GRP_1_OFFSET + 24)
39 #define ASPEED_CLK_UART9		(ASPEED_CLK_GRP_1_OFFSET + 25)
40 #define ASPEED_CLK_UART10		(ASPEED_CLK_GRP_1_OFFSET + 26)
41 #define ASPEED_CLK_UART11		(ASPEED_CLK_GRP_1_OFFSET + 27)
42 #define ASPEED_CLK_UART12		(ASPEED_CLK_GRP_1_OFFSET + 28)
43 #define ASPEED_CLK_UART13		(ASPEED_CLK_GRP_1_OFFSET + 29)
44 
45 #define ASPEED_CLK_PCLK			(ASPEED_CLK_GRP_2_OFFSET + 0)
46 #define ASPEED_CLK_HCLK			(ASPEED_CLK_GRP_2_OFFSET + 1)
47 #define ASPEED_CLK_UART5		(ASPEED_CLK_GRP_2_OFFSET + 2)
48 
49 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_AST10X0_H_ */
50