1 /* 2 * Copyright (c) 2022-2023, Intel Corporation. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_SIP_SVC_AGILEX_MB_H_ 8 #define ZEPHYR_INCLUDE_SIP_SVC_AGILEX_MB_H_ 9 10 /** 11 * @file 12 * @brief Intel SoC FPGA Agilex customized SDM Mailbox communication 13 * protocol handler. SDM Mailbox protocol will be embedded in 14 * Arm SiP Services SMC protocol and sent to/from SDM via Arm 15 * SiP Services. 16 */ 17 18 #define SIP_SVP_MB_MAX_WORD_SIZE 1024 19 #define SIP_SVP_MB_HEADER_TRANS_ID_OFFSET 24 20 #define SIP_SVP_MB_HEADER_TRANS_ID_MASK 0xFF 21 #define SIP_SVP_MB_HEADER_LENGTH_OFFSET 12 22 #define SIP_SVP_MB_HEADER_LENGTH_MASK 0x7FF 23 24 #define SIP_SVC_MB_HEADER_GET_CLIENT_ID(header) \ 25 ((header) >> SIP_SVP_MB_HEADER_CLIENT_ID_OFFSET & \ 26 SIP_SVP_MB_HEADER_CLIENT_ID_MASK) 27 28 #define SIP_SVC_MB_HEADER_GET_TRANS_ID(header) \ 29 ((header) >> SIP_SVP_MB_HEADER_TRANS_ID_OFFSET & \ 30 SIP_SVP_MB_HEADER_TRANS_ID_MASK) 31 32 #define SIP_SVC_MB_HEADER_SET_TRANS_ID(header, id) \ 33 (header) &= ~(SIP_SVP_MB_HEADER_TRANS_ID_MASK << \ 34 SIP_SVP_MB_HEADER_TRANS_ID_OFFSET); \ 35 (header) |= (((id) & SIP_SVP_MB_HEADER_TRANS_ID_MASK) << \ 36 SIP_SVP_MB_HEADER_TRANS_ID_OFFSET); 37 38 #define SIP_SVC_MB_HEADER_GET_LENGTH(header) \ 39 ((header) >> SIP_SVP_MB_HEADER_LENGTH_OFFSET & \ 40 SIP_SVP_MB_HEADER_LENGTH_MASK) 41 42 #endif /* ZEPHYR_INCLUDE_SIP_SVC_AGILEX_MB_H_ */ 43
