1 /* 2 * Copyright (c) 2021 Microchip Technology Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /** 8 * @brief Driver for External interrupt controller in Microchip XEC devices 9 * 10 * Based on reference manuals: 11 * Reference Manuals for MEC152x and MEC172x ARM(r) 32-bit MCUs 12 * 13 * Chapter: EC Interrupt Aggregator (ECIA) 14 * 15 */ 16 17 #ifndef ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ 18 #define ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ 19 20 #include <zephyr/device.h> 21 #include <zephyr/irq.h> 22 23 /** 24 * @brief enable GIRQn interrupt for specific source 25 * 26 * @param girq_id is the GIRQ number (8 - 26) 27 * @param src is the interrupt source in the GIRQ (0 - 31) 28 */ 29 int mchp_xec_ecia_enable(int girq_id, int src); 30 31 /** 32 * @brief enable EXTI interrupt for specific line specified by parameter 33 * encoded with MCHP_XEC_ECIA macro. 34 * 35 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 36 */ 37 int mchp_xec_ecia_info_enable(int ecia_info); 38 39 /** 40 * @brief disable EXTI interrupt for specific line 41 * 42 * @param girq_id is the GIRQ number (8 - 26) 43 * @param src is the interrupt source in the GIRQ (0 - 31) 44 */ 45 int mchp_xec_ecia_disable(int girq_id, int src); 46 47 /** 48 * @brief disable EXTI interrupt for specific line specified by parameter 49 * encoded with MCHP_XEC_ECIA macro. 50 * 51 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 52 */ 53 int mchp_xec_ecia_info_disable(int ecia_info); 54 55 56 /* callback for ECIA GIRQ interrupt source */ 57 typedef void (*mchp_xec_ecia_callback_t) (int girq_id, int src, void *user); 58 59 /** 60 * @brief set GIRQn interrupt source callback 61 * 62 * @param girq_id is the GIRQ number (8 - 26) 63 * @param src is the interrupt source in the GIRQ (0 - 31) 64 * @param cb user callback 65 * @param data user data 66 */ 67 int mchp_xec_ecia_set_callback(int girq_id, int src, 68 mchp_xec_ecia_callback_t cb, void *data); 69 70 /** 71 * @brief set GIRQn interrupt source callback 72 * 73 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 74 * @param cb user callback 75 * @param data user data 76 */ 77 int mchp_xec_ecia_info_set_callback(int ecia_info, mchp_xec_ecia_callback_t cb, 78 void *data); 79 80 /** 81 * @brief set GIRQn interrupt source callback 82 * 83 * @param dev_girq is a handle to the GIRQn device 84 * @param src is the interrupt source in the GIRQ (0 - 31) 85 * @param cb user callback 86 * @param data user data 87 */ 88 int mchp_xec_ecia_set_callback_by_dev(const struct device *dev_girq, int src, 89 mchp_xec_ecia_callback_t cb, void *data); 90 91 /** 92 * @brief unset GIRQn interrupt source callback 93 * 94 * @param girq_id is the GIRQ number (8 - 26) 95 * @param src is the interrupt source in the GIRQ (0 - 31) 96 */ 97 int mchp_ecia_unset_callback(int girq_id, int src); 98 99 /** 100 * @brief unset GIRQn interrupt source callback 101 * 102 * @param dev_girq is a handle to the GIRQn device 103 * @param src is the interrupt source in the GIRQ (0 - 31) 104 */ 105 int mchp_ecia_unset_callback_by_dev(const struct device *dev_girq, int src); 106 107 /* platform specific */ 108 /** @brief enable or disable aggregated GIRQ output 109 * 110 * @param girq_id is the GIRQ number (8 - 26) 111 * @param enable non-zero enables aggregated output else disables 112 */ 113 void mchp_xec_ecia_girq_aggr_en(uint8_t girq_id, uint8_t enable); 114 115 /** @brief clear GIRQ latched source status bit 116 * 117 * @param girq_id is the GIRQ number (8 - 26) 118 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 119 */ 120 void mchp_xec_ecia_girq_src_clr(uint8_t girq_id, uint8_t src_bit); 121 122 /** @brief enable a source in a GIRQ 123 * 124 * @param girq_id is the GIRQ number (8 - 26) 125 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 126 */ 127 void mchp_xec_ecia_girq_src_en(uint8_t girq_id, uint8_t src_bit); 128 129 /** @brief disable a source in a GIRQ 130 * 131 * @param girq_id is the GIRQ number (8 - 26) 132 * @param src_bit is the source bit position in the GIRQ registers (0 - 31) 133 */ 134 void mchp_xec_ecia_girq_src_dis(uint8_t girq_id, uint8_t src_bit); 135 136 /** @brief clear GIRQ latches sources specified in bitmap 137 * 138 * @param girq_id is the GIRQ number (8 - 26) 139 * @param bitmap contains the source bits to clear 140 */ 141 void mchp_xec_ecia_girq_src_clr_bitmap(uint8_t girq_id, uint32_t bitmap); 142 143 /** @brief enable sources in a GIRQ 144 * 145 * @param girq_id is the GIRQ number (8 - 26) 146 * @param bitmap contains the source bits to enable 147 */ 148 void mchp_xec_ecia_girq_src_en_bitmap(uint8_t girq_id, uint32_t bitmap); 149 150 /** @brief disable sources in a GIRQ 151 * 152 * @param girq_id is the GIRQ number (8 - 26) 153 * @param bitmap contains the source bits to disable 154 */ 155 void mchp_xec_ecia_girq_src_dis_bitmap(uint8_t girq_id, uint32_t bitmap); 156 157 /** @brief Read GIRQ result register (bit-wise OR of enable and source) 158 * 159 * @param girq_id is the GIRQ number (8 - 26) 160 * @return 32-bit unsigned result register value 161 */ 162 uint32_t mchp_xec_ecia_girq_result(uint8_t girq_id); 163 164 /** @brief Clear external NVIC input pending status 165 * 166 * @param nvic_num is 0 to maximum NVIC inputs for the chip. 167 */ 168 void mchp_xec_ecia_nvic_clr_pend(uint32_t nvic_num); 169 170 /* API using GIRQ parameters encoded with MCHP_XEC_ECIA */ 171 172 /** @brief enable or disable aggregated GIRQ output 173 * 174 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 175 * @param enable is flag to indicate enable(1) or disable(0) 176 */ 177 void mchp_xec_ecia_info_girq_aggr_en(int ecia_info, uint8_t enable); 178 179 /** @brief clear GIRQ latched source status bit 180 * 181 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 182 */ 183 void mchp_xec_ecia_info_girq_src_clr(int ecia_info); 184 185 /** @brief enable a source in a GIRQ 186 * 187 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 188 */ 189 void mchp_xec_ecia_info_girq_src_en(int ecia_info); 190 191 /** @brief disable a source in a GIRQ 192 * 193 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 194 */ 195 void mchp_xec_ecia_info_girq_src_dis(int ecia_info); 196 197 /** @brief Read GIRQ result register (bit-wise OR of enable and source) 198 * 199 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 200 * @return 32-bit unsigned result register value 201 */ 202 uint32_t mchp_xec_ecia_info_girq_result(int ecia_info); 203 204 /** @brief Clear external NVIC input pending status given encoded ECIA info. 205 * 206 * @param ecia_info is GIRQ connection encoded with MCHP_XEC_ECIA 207 */ 208 void mchp_xec_ecia_info_nvic_clr_pend(int ecia_info); 209 210 #endif /* ZEPHYR_DRIVERS_INTERRUPT_CONTROLLER_MCHP_XEC_ECIA_H_ */ 211
