1 /*
2  * Copyright (c) 2020 Antmicro <www.antmicro.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief LiteX Clock Control driver interface
10  */
11 
12 #ifndef CLK_CTRL_LITEX_H
13 #define CLK_CTRL_LITEX_H
14 
15 /**
16  * @brief LiteX Clock Control driver interface
17  * @defgroup clock_control_litex_interface LiteX Clock Control driver interface
18  * @brief LiteX Clock Control driver interface
19  * @ingroup clock_control_interface
20  * @{
21  */
22 
23 #include <zephyr/types.h>
24 
25 #define MMCM			DT_NODELABEL(clock0)
26 #define NCLKOUT			DT_PROP_LEN(MMCM, clock_output_names)
27 
28 /**
29  * @brief Structure for interfacing with clock control API
30  *
31  * @param clkout_nr Number of clock output to be changed
32  * @param rate Frequency to set given in Hz
33  * @param phase Phase offset in degrees
34  * @param duty Duty cycle of clock signal in percent
35  *
36  */
37 struct litex_clk_setup {
38 	uint8_t clkout_nr;
39 	uint32_t rate;
40 	uint16_t phase;
41 	uint8_t duty;
42 };
43 
44 /**
45  * @}
46  */
47 
48 #endif /* CLK_CTRL_LITEX_H */
49