1 /**
2  * @file xmc_posif_map.h
3  * @date 2019-07-30
4  *
5  * @cond
6  *********************************************************************************************************************
7  * XMClib v2.1.24 - XMC Peripheral Driver Library
8  *
9  * Copyright (c) 2015-2019, Infineon Technologies AG
10  * All rights reserved.
11  *
12  * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13  * following conditions are met:
14  *
15  * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16  * disclaimer.
17  *
18  * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19  * disclaimer in the documentation and/or other materials provided with the distribution.
20  *
21  * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22  * products derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE  FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33  * Infineon Technologies AG dave@infineon.com).
34  *********************************************************************************************************************
35  *
36  * Change History
37  * --------------
38  *
39  * 2015-02-20:
40  *     - Initial version
41  *
42  * 2019-07-30:
43  *     - Added support for XMC1404-Q040
44  *
45  * @endcond
46  */
47 
48 #ifndef XMC_POSIF_MAP_H
49 #define XMC_POSIF_MAP_H
50 
51 #if (UC_DEVICE == XMC1301) && (UC_PACKAGE == VQFN24)
52 #define POSIF0_IN0_ERU0_PDOUT0	3
53 #define POSIF0_IN0_P0_13    	1
54 #define POSIF0_IN0_P1_2     	0
55 #define POSIF0_IN0_VADC_G1BFL0	2
56 #define POSIF0_IN1_ERU0_PDOUT1	3
57 #define POSIF0_IN1_P0_14    	1
58 #define POSIF0_IN1_P1_1     	0
59 #define POSIF0_IN1_VADC_G1BFL1	2
60 #define POSIF0_IN2_ERU0_PDOUT2	3
61 #define POSIF0_IN2_P0_15    	1
62 #define POSIF0_IN2_P1_0     	0
63 #define POSIF0_IN2_VADC_G1BFL2	2
64 #endif
65 
66 
67 #if (UC_DEVICE == XMC1301) && (UC_PACKAGE == VQFN40)
68 #define POSIF0_IN0_ERU0_PDOUT0	3
69 #define POSIF0_IN0_P0_13    	1
70 #define POSIF0_IN0_P1_2     	0
71 #define POSIF0_IN0_VADC_G1BFL0	2
72 #define POSIF0_IN1_ERU0_PDOUT1	3
73 #define POSIF0_IN1_P0_14    	1
74 #define POSIF0_IN1_P1_1     	0
75 #define POSIF0_IN1_VADC_G1BFL1	2
76 #define POSIF0_IN2_ERU0_PDOUT2	3
77 #define POSIF0_IN2_P0_15    	1
78 #define POSIF0_IN2_P1_0     	0
79 #define POSIF0_IN2_VADC_G1BFL2	2
80 #endif
81 
82 
83 #if (UC_DEVICE == XMC1301) && (UC_PACKAGE == TSSOP16)
84 #define POSIF0_IN0_ERU0_PDOUT0	3
85 #define POSIF0_IN0_VADC_G1BFL0	2
86 #define POSIF0_IN1_ERU0_PDOUT1	3
87 #define POSIF0_IN1_P0_14    	1
88 #define POSIF0_IN1_VADC_G1BFL1	2
89 #define POSIF0_IN2_ERU0_PDOUT2	3
90 #define POSIF0_IN2_P0_15    	1
91 #define POSIF0_IN2_VADC_G1BFL2	2
92 #endif
93 
94 
95 #if (UC_DEVICE == XMC1301) && (UC_PACKAGE == TSSOP38)
96 #define POSIF0_IN0_ERU0_PDOUT0	3
97 #define POSIF0_IN0_P0_13    	1
98 #define POSIF0_IN0_P1_2     	0
99 #define POSIF0_IN0_VADC_G1BFL0	2
100 #define POSIF0_IN1_ERU0_PDOUT1	3
101 #define POSIF0_IN1_P0_14    	1
102 #define POSIF0_IN1_P1_1     	0
103 #define POSIF0_IN1_VADC_G1BFL1	2
104 #define POSIF0_IN2_ERU0_PDOUT2	3
105 #define POSIF0_IN2_P0_15    	1
106 #define POSIF0_IN2_P1_0     	0
107 #define POSIF0_IN2_VADC_G1BFL2	2
108 #endif
109 
110 
111 #if (UC_DEVICE == XMC1302) && (UC_PACKAGE == VQFN24)
112 #define POSIF0_IN0_ERU0_PDOUT0	3
113 #define POSIF0_IN0_P0_13    	1
114 #define POSIF0_IN0_P1_2     	0
115 #define POSIF0_IN0_VADC_G1BFL0	2
116 #define POSIF0_IN1_ERU0_PDOUT1	3
117 #define POSIF0_IN1_P0_14    	1
118 #define POSIF0_IN1_P1_1     	0
119 #define POSIF0_IN1_VADC_G1BFL1	2
120 #define POSIF0_IN2_ERU0_PDOUT2	3
121 #define POSIF0_IN2_P0_15    	1
122 #define POSIF0_IN2_P1_0     	0
123 #define POSIF0_IN2_VADC_G1BFL2	2
124 #endif
125 
126 
127 #if (UC_DEVICE == XMC1302) && (UC_PACKAGE == VQFN40)
128 #define POSIF0_IN0_ERU0_PDOUT0	3
129 #define POSIF0_IN0_P0_13    	1
130 #define POSIF0_IN0_P1_2     	0
131 #define POSIF0_IN0_VADC_G1BFL0	2
132 #define POSIF0_IN1_ERU0_PDOUT1	3
133 #define POSIF0_IN1_P0_14    	1
134 #define POSIF0_IN1_P1_1     	0
135 #define POSIF0_IN1_VADC_G1BFL1	2
136 #define POSIF0_IN2_ERU0_PDOUT2	3
137 #define POSIF0_IN2_P0_15    	1
138 #define POSIF0_IN2_P1_0     	0
139 #define POSIF0_IN2_VADC_G1BFL2	2
140 #endif
141 
142 
143 #if (UC_DEVICE == XMC1302) && (UC_PACKAGE == TSSOP16)
144 #define POSIF0_IN0_ERU0_PDOUT0	3
145 #define POSIF0_IN0_VADC_G1BFL0	2
146 #define POSIF0_IN1_ERU0_PDOUT1	3
147 #define POSIF0_IN1_P0_14    	1
148 #define POSIF0_IN1_VADC_G1BFL1	2
149 #define POSIF0_IN2_ERU0_PDOUT2	3
150 #define POSIF0_IN2_P0_15    	1
151 #define POSIF0_IN2_VADC_G1BFL2	2
152 #endif
153 
154 
155 #if (UC_DEVICE == XMC1302) && (UC_PACKAGE == TSSOP28)
156 #define POSIF0_IN0_ERU0_PDOUT0	3
157 #define POSIF0_IN0_P0_13    	1
158 #define POSIF0_IN0_P1_2     	0
159 #define POSIF0_IN0_VADC_G1BFL0	2
160 #define POSIF0_IN1_ERU0_PDOUT1	3
161 #define POSIF0_IN1_P0_14    	1
162 #define POSIF0_IN1_P1_1     	0
163 #define POSIF0_IN1_VADC_G1BFL1	2
164 #define POSIF0_IN2_ERU0_PDOUT2	3
165 #define POSIF0_IN2_P0_15    	1
166 #define POSIF0_IN2_P1_0     	0
167 #define POSIF0_IN2_VADC_G1BFL2	2
168 #endif
169 
170 
171 #if (UC_DEVICE == XMC1302) && (UC_PACKAGE == TSSOP38)
172 #define POSIF0_IN0_ERU0_PDOUT0	3
173 #define POSIF0_IN0_P0_13    	1
174 #define POSIF0_IN0_P1_2     	0
175 #define POSIF0_IN0_VADC_G1BFL0	2
176 #define POSIF0_IN1_ERU0_PDOUT1	3
177 #define POSIF0_IN1_P0_14    	1
178 #define POSIF0_IN1_P1_1     	0
179 #define POSIF0_IN1_VADC_G1BFL1	2
180 #define POSIF0_IN2_ERU0_PDOUT2	3
181 #define POSIF0_IN2_P0_15    	1
182 #define POSIF0_IN2_P1_0     	0
183 #define POSIF0_IN2_VADC_G1BFL2	2
184 #endif
185 
186 
187 #if (UC_DEVICE == XMC1402) && (UC_PACKAGE == LQFP64)
188 #define POSIF0_IN0_ERU0_PDOUT0	3
189 #define POSIF0_IN0_P0_13    	1
190 #define POSIF0_IN0_P1_2     	0
191 #define POSIF0_IN0_VADC_G1BFL0	2
192 #define POSIF0_IN1_ERU0_PDOUT1	3
193 #define POSIF0_IN1_P0_14    	1
194 #define POSIF0_IN1_P1_1     	0
195 #define POSIF0_IN1_VADC_G1BFL1	2
196 #define POSIF0_IN2_ERU0_PDOUT2	3
197 #define POSIF0_IN2_P0_15    	1
198 #define POSIF0_IN2_P1_0     	0
199 #define POSIF0_IN2_VADC_G1BFL2	2
200 #define POSIF1_IN0_ERU1_PDOUT0	3
201 #define POSIF1_IN0_P1_8     	0
202 #define POSIF1_IN0_P4_1     	1
203 #define POSIF1_IN0_VADC_G1BFL0	2
204 #define POSIF1_IN1_ERU1_PDOUT1	3
205 #define POSIF1_IN1_P1_7     	0
206 #define POSIF1_IN1_P4_2     	1
207 #define POSIF1_IN1_VADC_G1BFL1	2
208 #define POSIF1_IN2_ERU1_PDOUT2	3
209 #define POSIF1_IN2_P1_6     	0
210 #define POSIF1_IN2_P4_3     	1
211 #define POSIF1_IN2_VADC_G1BFL2	2
212 #endif
213 
214 
215 #if (UC_DEVICE == XMC1402) && (UC_PACKAGE == VQFN40)
216 #define POSIF0_IN0_ERU0_PDOUT0	3
217 #define POSIF0_IN0_P0_13    	1
218 #define POSIF0_IN0_P1_2     	0
219 #define POSIF0_IN0_VADC_G1BFL0	2
220 #define POSIF0_IN1_ERU0_PDOUT1	3
221 #define POSIF0_IN1_P0_14    	1
222 #define POSIF0_IN1_P1_1     	0
223 #define POSIF0_IN1_VADC_G1BFL1	2
224 #define POSIF0_IN2_ERU0_PDOUT2	3
225 #define POSIF0_IN2_P0_15    	1
226 #define POSIF0_IN2_P1_0     	0
227 #define POSIF0_IN2_VADC_G1BFL2	2
228 #endif
229 
230 
231 #if (UC_DEVICE == XMC1402) && (UC_PACKAGE == VQFN48)
232 #define POSIF0_IN0_ERU0_PDOUT0	3
233 #define POSIF0_IN0_P0_13    	1
234 #define POSIF0_IN0_P1_2     	0
235 #define POSIF0_IN0_VADC_G1BFL0	2
236 #define POSIF0_IN1_ERU0_PDOUT1	3
237 #define POSIF0_IN1_P0_14    	1
238 #define POSIF0_IN1_P1_1     	0
239 #define POSIF0_IN1_VADC_G1BFL1	2
240 #define POSIF0_IN2_ERU0_PDOUT2	3
241 #define POSIF0_IN2_P0_15    	1
242 #define POSIF0_IN2_P1_0     	0
243 #define POSIF0_IN2_VADC_G1BFL2	2
244 #define POSIF1_IN0_ERU1_PDOUT0	3
245 #define POSIF1_IN0_VADC_G1BFL0	2
246 #define POSIF1_IN1_ERU1_PDOUT1	3
247 #define POSIF1_IN1_VADC_G1BFL1	2
248 #define POSIF1_IN2_ERU1_PDOUT2	3
249 #define POSIF1_IN2_P1_6     	0
250 #define POSIF1_IN2_VADC_G1BFL2	2
251 #endif
252 
253 
254 #if (UC_DEVICE == XMC1402) && (UC_PACKAGE == VQFN64)
255 #define POSIF0_IN0_ERU0_PDOUT0	3
256 #define POSIF0_IN0_P0_13    	1
257 #define POSIF0_IN0_P1_2     	0
258 #define POSIF0_IN0_VADC_G1BFL0	2
259 #define POSIF0_IN1_ERU0_PDOUT1	3
260 #define POSIF0_IN1_P0_14    	1
261 #define POSIF0_IN1_P1_1     	0
262 #define POSIF0_IN1_VADC_G1BFL1	2
263 #define POSIF0_IN2_ERU0_PDOUT2	3
264 #define POSIF0_IN2_P0_15    	1
265 #define POSIF0_IN2_P1_0     	0
266 #define POSIF0_IN2_VADC_G1BFL2	2
267 #define POSIF1_IN0_ERU1_PDOUT0	3
268 #define POSIF1_IN0_P1_8     	0
269 #define POSIF1_IN0_P4_1     	1
270 #define POSIF1_IN0_VADC_G1BFL0	2
271 #define POSIF1_IN1_ERU1_PDOUT1	3
272 #define POSIF1_IN1_P1_7     	0
273 #define POSIF1_IN1_P4_2     	1
274 #define POSIF1_IN1_VADC_G1BFL1	2
275 #define POSIF1_IN2_ERU1_PDOUT2	3
276 #define POSIF1_IN2_P1_6     	0
277 #define POSIF1_IN2_P4_3     	1
278 #define POSIF1_IN2_VADC_G1BFL2	2
279 #endif
280 
281 
282 #if (UC_DEVICE == XMC1402) && (UC_PACKAGE == TSSOP38)
283 #define POSIF0_IN0_ERU0_PDOUT0	3
284 #define POSIF0_IN0_P0_13    	1
285 #define POSIF0_IN0_P1_2     	0
286 #define POSIF0_IN0_VADC_G1BFL0	2
287 #define POSIF0_IN1_ERU0_PDOUT1	3
288 #define POSIF0_IN1_P0_14    	1
289 #define POSIF0_IN1_P1_1     	0
290 #define POSIF0_IN1_VADC_G1BFL1	2
291 #define POSIF0_IN2_ERU0_PDOUT2	3
292 #define POSIF0_IN2_P0_15    	1
293 #define POSIF0_IN2_P1_0     	0
294 #define POSIF0_IN2_VADC_G1BFL2	2
295 #endif
296 
297 #if (UC_DEVICE == XMC1404) && (UC_PACKAGE == LQFP64)
298 #define POSIF0_IN0_ERU0_PDOUT0	3
299 #define POSIF0_IN0_P0_13    	1
300 #define POSIF0_IN0_P1_2     	0
301 #define POSIF0_IN0_VADC_G1BFL0	2
302 #define POSIF0_IN1_ERU0_PDOUT1	3
303 #define POSIF0_IN1_P0_14    	1
304 #define POSIF0_IN1_P1_1     	0
305 #define POSIF0_IN1_VADC_G1BFL1	2
306 #define POSIF0_IN2_ERU0_PDOUT2	3
307 #define POSIF0_IN2_P0_15    	1
308 #define POSIF0_IN2_P1_0     	0
309 #define POSIF0_IN2_VADC_G1BFL2	2
310 #define POSIF1_IN0_ERU1_PDOUT0	3
311 #define POSIF1_IN0_P1_8     	0
312 #define POSIF1_IN0_P4_1     	1
313 #define POSIF1_IN0_VADC_G1BFL0	2
314 #define POSIF1_IN1_ERU1_PDOUT1	3
315 #define POSIF1_IN1_P1_7     	0
316 #define POSIF1_IN1_P4_2     	1
317 #define POSIF1_IN1_VADC_G1BFL1	2
318 #define POSIF1_IN2_ERU1_PDOUT2	3
319 #define POSIF1_IN2_P1_6     	0
320 #define POSIF1_IN2_P4_3     	1
321 #define POSIF1_IN2_VADC_G1BFL2	2
322 #endif
323 
324 #if (UC_DEVICE == XMC1404) && (UC_PACKAGE == VQFN40)
325 #define POSIF0_IN0_ERU0_PDOUT0	3
326 #define POSIF0_IN0_P0_13    	1
327 #define POSIF0_IN0_P1_2     	0
328 #define POSIF0_IN0_VADC_G1BFL0	2
329 #define POSIF0_IN1_ERU0_PDOUT1	3
330 #define POSIF0_IN1_P0_14    	1
331 #define POSIF0_IN1_P1_1     	0
332 #define POSIF0_IN1_VADC_G1BFL1	2
333 #define POSIF0_IN2_ERU0_PDOUT2	3
334 #define POSIF0_IN2_P0_15    	1
335 #define POSIF0_IN2_P1_0     	0
336 #define POSIF0_IN2_VADC_G1BFL2	2
337 #endif
338 
339 #if (UC_DEVICE == XMC1404) && (UC_PACKAGE == VQFN48)
340 #define POSIF0_IN0_ERU0_PDOUT0	3
341 #define POSIF0_IN0_P0_13    	1
342 #define POSIF0_IN0_P1_2     	0
343 #define POSIF0_IN0_VADC_G1BFL0	2
344 #define POSIF0_IN1_ERU0_PDOUT1	3
345 #define POSIF0_IN1_P0_14    	1
346 #define POSIF0_IN1_P1_1     	0
347 #define POSIF0_IN1_VADC_G1BFL1	2
348 #define POSIF0_IN2_ERU0_PDOUT2	3
349 #define POSIF0_IN2_P0_15    	1
350 #define POSIF0_IN2_P1_0     	0
351 #define POSIF0_IN2_VADC_G1BFL2	2
352 #define POSIF1_IN0_ERU1_PDOUT0	3
353 #define POSIF1_IN0_VADC_G1BFL0	2
354 #define POSIF1_IN1_ERU1_PDOUT1	3
355 #define POSIF1_IN1_VADC_G1BFL1	2
356 #define POSIF1_IN2_ERU1_PDOUT2	3
357 #define POSIF1_IN2_P1_6     	0
358 #define POSIF1_IN2_VADC_G1BFL2	2
359 #endif
360 
361 
362 #if (UC_DEVICE == XMC1404) && (UC_PACKAGE == VQFN64)
363 #define POSIF0_IN0_ERU0_PDOUT0	3
364 #define POSIF0_IN0_P0_13    	1
365 #define POSIF0_IN0_P1_2     	0
366 #define POSIF0_IN0_VADC_G1BFL0	2
367 #define POSIF0_IN1_ERU0_PDOUT1	3
368 #define POSIF0_IN1_P0_14    	1
369 #define POSIF0_IN1_P1_1     	0
370 #define POSIF0_IN1_VADC_G1BFL1	2
371 #define POSIF0_IN2_ERU0_PDOUT2	3
372 #define POSIF0_IN2_P0_15    	1
373 #define POSIF0_IN2_P1_0     	0
374 #define POSIF0_IN2_VADC_G1BFL2	2
375 #define POSIF1_IN0_ERU1_PDOUT0	3
376 #define POSIF1_IN0_P1_8     	0
377 #define POSIF1_IN0_P4_1     	1
378 #define POSIF1_IN0_VADC_G1BFL0	2
379 #define POSIF1_IN1_ERU1_PDOUT1	3
380 #define POSIF1_IN1_P1_7     	0
381 #define POSIF1_IN1_P4_2     	1
382 #define POSIF1_IN1_VADC_G1BFL1	2
383 #define POSIF1_IN2_ERU1_PDOUT2	3
384 #define POSIF1_IN2_P1_6     	0
385 #define POSIF1_IN2_P4_3     	1
386 #define POSIF1_IN2_VADC_G1BFL2	2
387 #endif
388 
389 #if (UC_DEVICE == XMC4100) && (UC_PACKAGE == LQFP64)
390 #define POSIF0_IN0_ERU1_PDOUT0	3
391 #define POSIF0_IN0_P14_7    	1
392 #define POSIF0_IN0_P1_3     	0
393 #define POSIF0_IN0_VADC_G1BFL0	2
394 #define POSIF0_IN1_ERU1_PDOUT1	3
395 #define POSIF0_IN1_P14_6    	1
396 #define POSIF0_IN1_P1_2     	0
397 #define POSIF0_IN1_VADC_G1BFL1	2
398 #define POSIF0_IN2_ERU1_PDOUT2	3
399 #define POSIF0_IN2_P14_5    	1
400 #define POSIF0_IN2_P1_1     	0
401 #define POSIF0_IN2_VADC_C0SR0	2
402 #endif
403 
404 
405 #if (UC_DEVICE == XMC4100) && (UC_PACKAGE == VQFN48)
406 #define POSIF0_IN0_ERU1_PDOUT0	3
407 #define POSIF0_IN0_P14_7    	1
408 #define POSIF0_IN0_P1_3     	0
409 #define POSIF0_IN0_VADC_G1BFL0	2
410 #define POSIF0_IN1_ERU1_PDOUT1	3
411 #define POSIF0_IN1_P14_6    	1
412 #define POSIF0_IN1_P1_2     	0
413 #define POSIF0_IN1_VADC_G1BFL1	2
414 #define POSIF0_IN2_ERU1_PDOUT2	3
415 #define POSIF0_IN2_P14_5    	1
416 #define POSIF0_IN2_P1_1     	0
417 #define POSIF0_IN2_VADC_C0SR0	2
418 #endif
419 
420 
421 #if (UC_DEVICE == XMC4104) && (UC_PACKAGE == LQFP64)
422 #define POSIF0_IN0_ERU1_PDOUT0	3
423 #define POSIF0_IN0_P14_7    	1
424 #define POSIF0_IN0_P1_3     	0
425 #define POSIF0_IN0_VADC_G1BFL0	2
426 #define POSIF0_IN1_ERU1_PDOUT1	3
427 #define POSIF0_IN1_P14_6    	1
428 #define POSIF0_IN1_P1_2     	0
429 #define POSIF0_IN1_VADC_G1BFL1	2
430 #define POSIF0_IN2_ERU1_PDOUT2	3
431 #define POSIF0_IN2_P14_5    	1
432 #define POSIF0_IN2_P1_1     	0
433 #define POSIF0_IN2_VADC_C0SR0	2
434 #endif
435 
436 
437 #if (UC_DEVICE == XMC4104) && (UC_PACKAGE == VQFN48)
438 #define POSIF0_IN0_ERU1_PDOUT0	3
439 #define POSIF0_IN0_P14_7    	1
440 #define POSIF0_IN0_P1_3     	0
441 #define POSIF0_IN0_VADC_G1BFL0	2
442 #define POSIF0_IN1_ERU1_PDOUT1	3
443 #define POSIF0_IN1_P14_6    	1
444 #define POSIF0_IN1_P1_2     	0
445 #define POSIF0_IN1_VADC_G1BFL1	2
446 #define POSIF0_IN2_ERU1_PDOUT2	3
447 #define POSIF0_IN2_P14_5    	1
448 #define POSIF0_IN2_P1_1     	0
449 #define POSIF0_IN2_VADC_C0SR0	2
450 #endif
451 
452 
453 #if (UC_DEVICE == XMC4108) && (UC_PACKAGE == LQFP64)
454 #define POSIF0_IN0_ERU1_PDOUT0	3
455 #define POSIF0_IN0_P14_7    	1
456 #define POSIF0_IN0_P1_3     	0
457 #define POSIF0_IN0_VADC_G1BFL0	2
458 #define POSIF0_IN1_ERU1_PDOUT1	3
459 #define POSIF0_IN1_P14_6    	1
460 #define POSIF0_IN1_P1_2     	0
461 #define POSIF0_IN1_VADC_G1BFL1	2
462 #define POSIF0_IN2_ERU1_PDOUT2	3
463 #define POSIF0_IN2_P14_5    	1
464 #define POSIF0_IN2_P1_1     	0
465 #define POSIF0_IN2_VADC_C0SR0	2
466 #endif
467 
468 
469 #if (UC_DEVICE == XMC4108) && (UC_PACKAGE == VQFN48)
470 #define POSIF0_IN0_ERU1_PDOUT0	3
471 #define POSIF0_IN0_P14_7    	1
472 #define POSIF0_IN0_P1_3     	0
473 #define POSIF0_IN0_VADC_G1BFL0	2
474 #define POSIF0_IN1_ERU1_PDOUT1	3
475 #define POSIF0_IN1_P14_6    	1
476 #define POSIF0_IN1_P1_2     	0
477 #define POSIF0_IN1_VADC_G1BFL1	2
478 #define POSIF0_IN2_ERU1_PDOUT2	3
479 #define POSIF0_IN2_P14_5    	1
480 #define POSIF0_IN2_P1_1     	0
481 #define POSIF0_IN2_VADC_C0SR0	2
482 #endif
483 
484 
485 #if (UC_DEVICE == XMC4200) && (UC_PACKAGE == LQFP64)
486 #define POSIF0_IN0_ERU1_PDOUT0	3
487 #define POSIF0_IN0_P14_7    	1
488 #define POSIF0_IN0_P1_3     	0
489 #define POSIF0_IN0_VADC_G1BFL0	2
490 #define POSIF0_IN1_ERU1_PDOUT1	3
491 #define POSIF0_IN1_P14_6    	1
492 #define POSIF0_IN1_P1_2     	0
493 #define POSIF0_IN1_VADC_G1BFL1	2
494 #define POSIF0_IN2_ERU1_PDOUT2	3
495 #define POSIF0_IN2_P14_5    	1
496 #define POSIF0_IN2_P1_1     	0
497 #define POSIF0_IN2_VADC_C0SR0	2
498 #endif
499 
500 
501 #if (UC_DEVICE == XMC4200) && (UC_PACKAGE == VQFN48)
502 #define POSIF0_IN0_ERU1_PDOUT0	3
503 #define POSIF0_IN0_P14_7    	1
504 #define POSIF0_IN0_P1_3     	0
505 #define POSIF0_IN0_VADC_G1BFL0	2
506 #define POSIF0_IN1_ERU1_PDOUT1	3
507 #define POSIF0_IN1_P14_6    	1
508 #define POSIF0_IN1_P1_2     	0
509 #define POSIF0_IN1_VADC_G1BFL1	2
510 #define POSIF0_IN2_ERU1_PDOUT2	3
511 #define POSIF0_IN2_P14_5    	1
512 #define POSIF0_IN2_P1_1     	0
513 #define POSIF0_IN2_VADC_C0SR0	2
514 #endif
515 
516 
517 #if (UC_DEVICE == XMC4400) && (UC_PACKAGE == LQFP100)
518 #define POSIF0_IN0_ERU1_PDOUT0	3
519 #define POSIF0_IN0_P14_7    	1
520 #define POSIF0_IN0_P1_3     	0
521 #define POSIF0_IN0_VADC_G1BFL0	2
522 #define POSIF0_IN1_ERU1_PDOUT1	3
523 #define POSIF0_IN1_P14_6    	1
524 #define POSIF0_IN1_P1_2     	0
525 #define POSIF0_IN1_VADC_G1BFL1	2
526 #define POSIF0_IN2_ERU1_PDOUT2	3
527 #define POSIF0_IN2_P14_5    	1
528 #define POSIF0_IN2_P1_1     	0
529 #define POSIF0_IN2_VADC_C0SR0	2
530 #define POSIF1_IN0_ERU1_PDOUT0	3
531 #define POSIF1_IN0_P2_5     	0
532 #define POSIF1_IN0_VADC_G1BFL0	2
533 #define POSIF1_IN1_ERU1_PDOUT1	3
534 #define POSIF1_IN1_P2_4     	0
535 #define POSIF1_IN1_VADC_G1BFL1	2
536 #define POSIF1_IN2_ERU1_PDOUT2	3
537 #define POSIF1_IN2_P2_3     	0
538 #define POSIF1_IN2_VADC_C0SR1	2
539 #endif
540 
541 
542 #if (UC_DEVICE == XMC4400) && (UC_PACKAGE == LQFP64)
543 #define POSIF0_IN0_ERU1_PDOUT0	3
544 #define POSIF0_IN0_P14_7    	1
545 #define POSIF0_IN0_P1_3     	0
546 #define POSIF0_IN0_VADC_G1BFL0	2
547 #define POSIF0_IN1_ERU1_PDOUT1	3
548 #define POSIF0_IN1_P14_6    	1
549 #define POSIF0_IN1_P1_2     	0
550 #define POSIF0_IN1_VADC_G1BFL1	2
551 #define POSIF0_IN2_ERU1_PDOUT2	3
552 #define POSIF0_IN2_P14_5    	1
553 #define POSIF0_IN2_P1_1     	0
554 #define POSIF0_IN2_VADC_C0SR0	2
555 #define POSIF1_IN0_ERU1_PDOUT0	3
556 #define POSIF1_IN0_P2_5     	0
557 #define POSIF1_IN0_VADC_G1BFL0	2
558 #define POSIF1_IN1_ERU1_PDOUT1	3
559 #define POSIF1_IN1_P2_4     	0
560 #define POSIF1_IN1_VADC_G1BFL1	2
561 #define POSIF1_IN2_ERU1_PDOUT2	3
562 #define POSIF1_IN2_P2_3     	0
563 #define POSIF1_IN2_VADC_C0SR1	2
564 #endif
565 
566 
567 #if (UC_DEVICE == XMC4402) && (UC_PACKAGE == LQFP100)
568 #define POSIF0_IN0_ERU1_PDOUT0	3
569 #define POSIF0_IN0_P14_7    	1
570 #define POSIF0_IN0_P1_3     	0
571 #define POSIF0_IN0_VADC_G1BFL0	2
572 #define POSIF0_IN1_ERU1_PDOUT1	3
573 #define POSIF0_IN1_P14_6    	1
574 #define POSIF0_IN1_P1_2     	0
575 #define POSIF0_IN1_VADC_G1BFL1	2
576 #define POSIF0_IN2_ERU1_PDOUT2	3
577 #define POSIF0_IN2_P14_5    	1
578 #define POSIF0_IN2_P1_1     	0
579 #define POSIF0_IN2_VADC_C0SR0	2
580 #define POSIF1_IN0_ERU1_PDOUT0	3
581 #define POSIF1_IN0_P2_5     	0
582 #define POSIF1_IN0_VADC_G1BFL0	2
583 #define POSIF1_IN1_ERU1_PDOUT1	3
584 #define POSIF1_IN1_P2_4     	0
585 #define POSIF1_IN1_VADC_G1BFL1	2
586 #define POSIF1_IN2_ERU1_PDOUT2	3
587 #define POSIF1_IN2_P2_3     	0
588 #define POSIF1_IN2_VADC_C0SR1	2
589 #endif
590 
591 
592 #if (UC_DEVICE == XMC4402) && (UC_PACKAGE == LQFP64)
593 #define POSIF0_IN0_ERU1_PDOUT0	3
594 #define POSIF0_IN0_P14_7    	1
595 #define POSIF0_IN0_P1_3     	0
596 #define POSIF0_IN0_VADC_G1BFL0	2
597 #define POSIF0_IN1_ERU1_PDOUT1	3
598 #define POSIF0_IN1_P14_6    	1
599 #define POSIF0_IN1_P1_2     	0
600 #define POSIF0_IN1_VADC_G1BFL1	2
601 #define POSIF0_IN2_ERU1_PDOUT2	3
602 #define POSIF0_IN2_P14_5    	1
603 #define POSIF0_IN2_P1_1     	0
604 #define POSIF0_IN2_VADC_C0SR0	2
605 #define POSIF1_IN0_ERU1_PDOUT0	3
606 #define POSIF1_IN0_P2_5     	0
607 #define POSIF1_IN0_VADC_G1BFL0	2
608 #define POSIF1_IN1_ERU1_PDOUT1	3
609 #define POSIF1_IN1_P2_4     	0
610 #define POSIF1_IN1_VADC_G1BFL1	2
611 #define POSIF1_IN2_ERU1_PDOUT2	3
612 #define POSIF1_IN2_P2_3     	0
613 #define POSIF1_IN2_VADC_C0SR1	2
614 #endif
615 
616 
617 #if (UC_DEVICE == XMC4500) && (UC_PACKAGE == BGA144)
618 #define POSIF0_IN0_ERU1_PDOUT0	3
619 #define POSIF0_IN0_P14_7    	1
620 #define POSIF0_IN0_P1_3     	0
621 #define POSIF0_IN0_VADC_G1BFL0	2
622 #define POSIF0_IN0_VADC_G1BFL0	2
623 #define POSIF0_IN1_ERU1_PDOUT1	3
624 #define POSIF0_IN1_P14_6    	1
625 #define POSIF0_IN1_P1_2     	0
626 #define POSIF0_IN1_VADC_G1BFL1	2
627 #define POSIF0_IN1_VADC_G1BFL1	2
628 #define POSIF0_IN2_ERU1_PDOUT2	3
629 #define POSIF0_IN2_P14_5    	1
630 #define POSIF0_IN2_P1_1     	0
631 #define POSIF0_IN2_VADC_C0SR0	2
632 #define POSIF1_IN0_ERU1_PDOUT0	3
633 #define POSIF1_IN0_P2_5     	0
634 #define POSIF1_IN0_P3_10    	1
635 #define POSIF1_IN0_VADC_G1BFL0	2
636 #define POSIF1_IN0_VADC_G1BFL0	2
637 #define POSIF1_IN1_ERU1_PDOUT1	3
638 #define POSIF1_IN1_P2_4     	0
639 #define POSIF1_IN1_P3_9     	1
640 #define POSIF1_IN1_VADC_G1BFL1	2
641 #define POSIF1_IN1_VADC_G1BFL1	2
642 #define POSIF1_IN2_ERU1_PDOUT2	3
643 #define POSIF1_IN2_P2_3     	0
644 #define POSIF1_IN2_P3_8     	1
645 #define POSIF1_IN2_VADC_C0SR1	2
646 #endif
647 
648 
649 #if (UC_DEVICE == XMC4500) && (UC_PACKAGE == LQFP100)
650 #define POSIF0_IN0_ERU1_PDOUT0	3
651 #define POSIF0_IN0_P14_7    	1
652 #define POSIF0_IN0_P1_3     	0
653 #define POSIF0_IN0_VADC_G1BFL0	2
654 #define POSIF0_IN0_VADC_G1BFL0	2
655 #define POSIF0_IN1_ERU1_PDOUT1	3
656 #define POSIF0_IN1_P14_6    	1
657 #define POSIF0_IN1_P1_2     	0
658 #define POSIF0_IN1_VADC_G1BFL1	2
659 #define POSIF0_IN1_VADC_G1BFL1	2
660 #define POSIF0_IN2_ERU1_PDOUT2	3
661 #define POSIF0_IN2_P14_5    	1
662 #define POSIF0_IN2_P1_1     	0
663 #define POSIF0_IN2_VADC_C0SR0	2
664 #define POSIF1_IN0_ERU1_PDOUT0	3
665 #define POSIF1_IN0_P2_5     	0
666 #define POSIF1_IN0_VADC_G1BFL0	2
667 #define POSIF1_IN0_VADC_G1BFL0	2
668 #define POSIF1_IN1_ERU1_PDOUT1	3
669 #define POSIF1_IN1_P2_4     	0
670 #define POSIF1_IN1_VADC_G1BFL1	2
671 #define POSIF1_IN1_VADC_G1BFL1	2
672 #define POSIF1_IN2_ERU1_PDOUT2	3
673 #define POSIF1_IN2_P2_3     	0
674 #define POSIF1_IN2_VADC_C0SR1	2
675 #endif
676 
677 
678 #if (UC_DEVICE == XMC4500) && (UC_PACKAGE == LQFP144)
679 #define POSIF0_IN0_ERU1_PDOUT0	3
680 #define POSIF0_IN0_P14_7    	1
681 #define POSIF0_IN0_P1_3     	0
682 #define POSIF0_IN0_VADC_G1BFL0	2
683 #define POSIF0_IN0_VADC_G1BFL0	2
684 #define POSIF0_IN1_ERU1_PDOUT1	3
685 #define POSIF0_IN1_P14_6    	1
686 #define POSIF0_IN1_P1_2     	0
687 #define POSIF0_IN1_VADC_G1BFL1	2
688 #define POSIF0_IN1_VADC_G1BFL1	2
689 #define POSIF0_IN2_ERU1_PDOUT2	3
690 #define POSIF0_IN2_P14_5    	1
691 #define POSIF0_IN2_P1_1     	0
692 #define POSIF0_IN2_VADC_C0SR0	2
693 #define POSIF1_IN0_ERU1_PDOUT0	3
694 #define POSIF1_IN0_P2_5     	0
695 #define POSIF1_IN0_P3_10    	1
696 #define POSIF1_IN0_VADC_G1BFL0	2
697 #define POSIF1_IN0_VADC_G1BFL0	2
698 #define POSIF1_IN1_ERU1_PDOUT1	3
699 #define POSIF1_IN1_P2_4     	0
700 #define POSIF1_IN1_P3_9     	1
701 #define POSIF1_IN1_VADC_G1BFL1	2
702 #define POSIF1_IN1_VADC_G1BFL1	2
703 #define POSIF1_IN2_ERU1_PDOUT2	3
704 #define POSIF1_IN2_P2_3     	0
705 #define POSIF1_IN2_P3_8     	1
706 #define POSIF1_IN2_VADC_C0SR1	2
707 #endif
708 
709 
710 #if (UC_DEVICE == XMC4502) && (UC_PACKAGE == LQFP100)
711 #define POSIF0_IN0_ERU1_PDOUT0	3
712 #define POSIF0_IN0_P14_7    	1
713 #define POSIF0_IN0_P1_3     	0
714 #define POSIF0_IN0_VADC_G1BFL0	2
715 #define POSIF0_IN0_VADC_G1BFL0	2
716 #define POSIF0_IN1_ERU1_PDOUT1	3
717 #define POSIF0_IN1_P14_6    	1
718 #define POSIF0_IN1_P1_2     	0
719 #define POSIF0_IN1_VADC_G1BFL1	2
720 #define POSIF0_IN1_VADC_G1BFL1	2
721 #define POSIF0_IN2_ERU1_PDOUT2	3
722 #define POSIF0_IN2_P14_5    	1
723 #define POSIF0_IN2_P1_1     	0
724 #define POSIF0_IN2_VADC_C0SR0	2
725 #define POSIF1_IN0_ERU1_PDOUT0	3
726 #define POSIF1_IN0_P2_5     	0
727 #define POSIF1_IN0_VADC_G1BFL0	2
728 #define POSIF1_IN0_VADC_G1BFL0	2
729 #define POSIF1_IN1_ERU1_PDOUT1	3
730 #define POSIF1_IN1_P2_4     	0
731 #define POSIF1_IN1_VADC_G1BFL1	2
732 #define POSIF1_IN1_VADC_G1BFL1	2
733 #define POSIF1_IN2_ERU1_PDOUT2	3
734 #define POSIF1_IN2_P2_3     	0
735 #define POSIF1_IN2_VADC_C0SR1	2
736 #endif
737 
738 
739 #if (UC_DEVICE == XMC4504) && (UC_PACKAGE == LQFP100)
740 #define POSIF0_IN0_ERU1_PDOUT0	3
741 #define POSIF0_IN0_P14_7    	1
742 #define POSIF0_IN0_P1_3     	0
743 #define POSIF0_IN0_VADC_G1BFL0	2
744 #define POSIF0_IN0_VADC_G1BFL0	2
745 #define POSIF0_IN1_ERU1_PDOUT1	3
746 #define POSIF0_IN1_P14_6    	1
747 #define POSIF0_IN1_P1_2     	0
748 #define POSIF0_IN1_VADC_G1BFL1	2
749 #define POSIF0_IN1_VADC_G1BFL1	2
750 #define POSIF0_IN2_ERU1_PDOUT2	3
751 #define POSIF0_IN2_P14_5    	1
752 #define POSIF0_IN2_P1_1     	0
753 #define POSIF0_IN2_VADC_C0SR0	2
754 #define POSIF1_IN0_ERU1_PDOUT0	3
755 #define POSIF1_IN0_P2_5     	0
756 #define POSIF1_IN0_VADC_G1BFL0	2
757 #define POSIF1_IN0_VADC_G1BFL0	2
758 #define POSIF1_IN1_ERU1_PDOUT1	3
759 #define POSIF1_IN1_P2_4     	0
760 #define POSIF1_IN1_VADC_G1BFL1	2
761 #define POSIF1_IN1_VADC_G1BFL1	2
762 #define POSIF1_IN2_ERU1_PDOUT2	3
763 #define POSIF1_IN2_P2_3     	0
764 #define POSIF1_IN2_VADC_C0SR1	2
765 #endif
766 
767 
768 #if (UC_DEVICE == XMC4504) && (UC_PACKAGE == LQFP144)
769 #define POSIF0_IN0_ERU1_PDOUT0	3
770 #define POSIF0_IN0_P14_7    	1
771 #define POSIF0_IN0_P1_3     	0
772 #define POSIF0_IN0_VADC_G1BFL0	2
773 #define POSIF0_IN0_VADC_G1BFL0	2
774 #define POSIF0_IN1_ERU1_PDOUT1	3
775 #define POSIF0_IN1_P14_6    	1
776 #define POSIF0_IN1_P1_2     	0
777 #define POSIF0_IN1_VADC_G1BFL1	2
778 #define POSIF0_IN1_VADC_G1BFL1	2
779 #define POSIF0_IN2_ERU1_PDOUT2	3
780 #define POSIF0_IN2_P14_5    	1
781 #define POSIF0_IN2_P1_1     	0
782 #define POSIF0_IN2_VADC_C0SR0	2
783 #define POSIF1_IN0_ERU1_PDOUT0	3
784 #define POSIF1_IN0_P2_5     	0
785 #define POSIF1_IN0_P3_10    	1
786 #define POSIF1_IN0_VADC_G1BFL0	2
787 #define POSIF1_IN0_VADC_G1BFL0	2
788 #define POSIF1_IN1_ERU1_PDOUT1	3
789 #define POSIF1_IN1_P2_4     	0
790 #define POSIF1_IN1_P3_9     	1
791 #define POSIF1_IN1_VADC_G1BFL1	2
792 #define POSIF1_IN1_VADC_G1BFL1	2
793 #define POSIF1_IN2_ERU1_PDOUT2	3
794 #define POSIF1_IN2_P2_3     	0
795 #define POSIF1_IN2_P3_8     	1
796 #define POSIF1_IN2_VADC_C0SR1	2
797 #endif
798 
799 
800 #if (UC_DEVICE == XMC4700) && (UC_PACKAGE == BGA196)
801 #define POSIF0_IN0_ERU1_PDOUT0	3
802 #define POSIF0_IN0_P14_7    	1
803 #define POSIF0_IN0_P1_3     	0
804 #define POSIF0_IN0_VADC_G1BFL0	2
805 #define POSIF0_IN1_ERU1_PDOUT1	3
806 #define POSIF0_IN1_P14_6    	1
807 #define POSIF0_IN1_P1_2     	0
808 #define POSIF0_IN1_VADC_G1BFL1	2
809 #define POSIF0_IN2_ERU1_PDOUT2	3
810 #define POSIF0_IN2_P14_5    	1
811 #define POSIF0_IN2_P1_1     	0
812 #define POSIF0_IN2_VADC_C0SR0	2
813 #define POSIF1_IN0_ERU1_PDOUT0	3
814 #define POSIF1_IN0_P2_5     	0
815 #define POSIF1_IN0_P3_10    	1
816 #define POSIF1_IN0_VADC_G1BFL0	2
817 #define POSIF1_IN1_ERU1_PDOUT1	3
818 #define POSIF1_IN1_P2_4     	0
819 #define POSIF1_IN1_P3_9     	1
820 #define POSIF1_IN1_VADC_G1BFL1	2
821 #define POSIF1_IN2_ERU1_PDOUT2	3
822 #define POSIF1_IN2_P2_3     	0
823 #define POSIF1_IN2_P3_8     	1
824 #define POSIF1_IN2_VADC_C0SR1	2
825 #endif
826 
827 
828 #if (UC_DEVICE == XMC4700) && (UC_PACKAGE == LQFP100)
829 #define POSIF0_IN0_ERU1_PDOUT0	3
830 #define POSIF0_IN0_P14_7    	1
831 #define POSIF0_IN0_P1_3     	0
832 #define POSIF0_IN0_VADC_G1BFL0	2
833 #define POSIF0_IN1_ERU1_PDOUT1	3
834 #define POSIF0_IN1_P14_6    	1
835 #define POSIF0_IN1_P1_2     	0
836 #define POSIF0_IN1_VADC_G1BFL1	2
837 #define POSIF0_IN2_ERU1_PDOUT2	3
838 #define POSIF0_IN2_P14_5    	1
839 #define POSIF0_IN2_P1_1     	0
840 #define POSIF0_IN2_VADC_C0SR0	2
841 #define POSIF1_IN0_ERU1_PDOUT0	3
842 #define POSIF1_IN0_P2_5     	0
843 #define POSIF1_IN0_VADC_G1BFL0	2
844 #define POSIF1_IN1_ERU1_PDOUT1	3
845 #define POSIF1_IN1_P2_4     	0
846 #define POSIF1_IN1_VADC_G1BFL1	2
847 #define POSIF1_IN2_ERU1_PDOUT2	3
848 #define POSIF1_IN2_P2_3     	0
849 #define POSIF1_IN2_VADC_C0SR1	2
850 #endif
851 
852 
853 #if (UC_DEVICE == XMC4700) && (UC_PACKAGE == LQFP144)
854 #define POSIF0_IN0_ERU1_PDOUT0	3
855 #define POSIF0_IN0_P14_7    	1
856 #define POSIF0_IN0_P1_3     	0
857 #define POSIF0_IN0_VADC_G1BFL0	2
858 #define POSIF0_IN1_ERU1_PDOUT1	3
859 #define POSIF0_IN1_P14_6    	1
860 #define POSIF0_IN1_P1_2     	0
861 #define POSIF0_IN1_VADC_G1BFL1	2
862 #define POSIF0_IN2_ERU1_PDOUT2	3
863 #define POSIF0_IN2_P14_5    	1
864 #define POSIF0_IN2_P1_1     	0
865 #define POSIF0_IN2_VADC_C0SR0	2
866 #define POSIF1_IN0_ERU1_PDOUT0	3
867 #define POSIF1_IN0_P2_5     	0
868 #define POSIF1_IN0_P3_10    	1
869 #define POSIF1_IN0_VADC_G1BFL0	2
870 #define POSIF1_IN1_ERU1_PDOUT1	3
871 #define POSIF1_IN1_P2_4     	0
872 #define POSIF1_IN1_P3_9     	1
873 #define POSIF1_IN1_VADC_G1BFL1	2
874 #define POSIF1_IN2_ERU1_PDOUT2	3
875 #define POSIF1_IN2_P2_3     	0
876 #define POSIF1_IN2_P3_8     	1
877 #define POSIF1_IN2_VADC_C0SR1	2
878 #endif
879 
880 
881 #if (UC_DEVICE == XMC4800) && (UC_PACKAGE == BGA196)
882 #define POSIF0_IN0_ERU1_PDOUT0	3
883 #define POSIF0_IN0_P14_7    	1
884 #define POSIF0_IN0_P1_3     	0
885 #define POSIF0_IN0_VADC_G1BFL0	2
886 #define POSIF0_IN1_ERU1_PDOUT1	3
887 #define POSIF0_IN1_P14_6    	1
888 #define POSIF0_IN1_P1_2     	0
889 #define POSIF0_IN1_VADC_G1BFL1	2
890 #define POSIF0_IN2_ERU1_PDOUT2	3
891 #define POSIF0_IN2_P14_5    	1
892 #define POSIF0_IN2_P1_1     	0
893 #define POSIF0_IN2_VADC_C0SR0	2
894 #define POSIF1_IN0_ERU1_PDOUT0	3
895 #define POSIF1_IN0_P2_5     	0
896 #define POSIF1_IN0_P3_10    	1
897 #define POSIF1_IN0_VADC_G1BFL0	2
898 #define POSIF1_IN1_ERU1_PDOUT1	3
899 #define POSIF1_IN1_P2_4     	0
900 #define POSIF1_IN1_P3_9     	1
901 #define POSIF1_IN1_VADC_G1BFL1	2
902 #define POSIF1_IN2_ERU1_PDOUT2	3
903 #define POSIF1_IN2_P2_3     	0
904 #define POSIF1_IN2_P3_8     	1
905 #define POSIF1_IN2_VADC_C0SR1	2
906 #endif
907 
908 
909 #if (UC_DEVICE == XMC4800) && (UC_PACKAGE == LQFP100)
910 #define POSIF0_IN0_ERU1_PDOUT0	3
911 #define POSIF0_IN0_P14_7    	1
912 #define POSIF0_IN0_P1_3     	0
913 #define POSIF0_IN0_VADC_G1BFL0	2
914 #define POSIF0_IN1_ERU1_PDOUT1	3
915 #define POSIF0_IN1_P14_6    	1
916 #define POSIF0_IN1_P1_2     	0
917 #define POSIF0_IN1_VADC_G1BFL1	2
918 #define POSIF0_IN2_ERU1_PDOUT2	3
919 #define POSIF0_IN2_P14_5    	1
920 #define POSIF0_IN2_P1_1     	0
921 #define POSIF0_IN2_VADC_C0SR0	2
922 #define POSIF1_IN0_ERU1_PDOUT0	3
923 #define POSIF1_IN0_P2_5     	0
924 #define POSIF1_IN0_VADC_G1BFL0	2
925 #define POSIF1_IN1_ERU1_PDOUT1	3
926 #define POSIF1_IN1_P2_4     	0
927 #define POSIF1_IN1_VADC_G1BFL1	2
928 #define POSIF1_IN2_ERU1_PDOUT2	3
929 #define POSIF1_IN2_P2_3     	0
930 #define POSIF1_IN2_VADC_C0SR1	2
931 #endif
932 
933 
934 #if (UC_DEVICE == XMC4800) && (UC_PACKAGE == LQFP144)
935 #define POSIF0_IN0_ERU1_PDOUT0	3
936 #define POSIF0_IN0_P14_7    	1
937 #define POSIF0_IN0_P1_3     	0
938 #define POSIF0_IN0_VADC_G1BFL0	2
939 #define POSIF0_IN1_ERU1_PDOUT1	3
940 #define POSIF0_IN1_P14_6    	1
941 #define POSIF0_IN1_P1_2     	0
942 #define POSIF0_IN1_VADC_G1BFL1	2
943 #define POSIF0_IN2_ERU1_PDOUT2	3
944 #define POSIF0_IN2_P14_5    	1
945 #define POSIF0_IN2_P1_1     	0
946 #define POSIF0_IN2_VADC_C0SR0	2
947 #define POSIF1_IN0_ERU1_PDOUT0	3
948 #define POSIF1_IN0_P2_5     	0
949 #define POSIF1_IN0_P3_10    	1
950 #define POSIF1_IN0_VADC_G1BFL0	2
951 #define POSIF1_IN1_ERU1_PDOUT1	3
952 #define POSIF1_IN1_P2_4     	0
953 #define POSIF1_IN1_P3_9     	1
954 #define POSIF1_IN1_VADC_G1BFL1	2
955 #define POSIF1_IN2_ERU1_PDOUT2	3
956 #define POSIF1_IN2_P2_3     	0
957 #define POSIF1_IN2_P3_8     	1
958 #define POSIF1_IN2_VADC_C0SR1	2
959 #endif
960 
961 #endif /* XMC_POSIF_MAP_H */
962