1 /**
2  * @file xmc_gpio.h
3  * @date 2015-06-20
4  *
5  * @cond
6  *********************************************************************************************************************
7  * XMClib v2.1.24 - XMC Peripheral Driver Library
8  *
9  * Copyright (c) 2015-2019, Infineon Technologies AG
10  * All rights reserved.
11  *
12  * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the
13  * following conditions are met:
14  *
15  * Redistributions of source code must retain the above copyright notice, this list of conditions and the following
16  * disclaimer.
17  *
18  * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following
19  * disclaimer in the documentation and/or other materials provided with the distribution.
20  *
21  * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote
22  * products derived from this software without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
25  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE  FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with
33  * Infineon Technologies AG dave@infineon.com).
34  *********************************************************************************************************************
35  *
36  * Change History
37  * --------------
38  *
39  * 2015-02-20:
40  *     - Initial draft<br>
41  *     - Documentation improved <br>
42  *
43  * 2015-06-20:
44  *     - Removed version macros and declaration of GetDriverVersion API
45  *
46  * @endcond
47  *
48  */
49 
50 #ifndef XMC_GPIO_H
51 #define XMC_GPIO_H
52 
53 /**********************************************************************************************************************
54  * HEADER FILES
55  *********************************************************************************************************************/
56 
57 #include "xmc_common.h"
58 
59 /**
60  * @addtogroup XMClib XMC Peripheral Library
61  * @{
62  */
63 
64 /**
65  * @addtogroup GPIO
66  * @brief General Purpose Input Output (GPIO) driver for the XMC microcontroller family.
67  *
68  * GPIO driver provide a generic and very flexible software interface for all standard digital I/O port pins.
69  * Each port slice has individual interfaces for the operation as General Purpose I/O and it further provides the
70  * connectivity to the on-chip periphery and the control for the pad characteristics.
71  *
72  * The driver is divided into Input and Output mode.
73  *
74  * Input mode features:
75  * -# Configuration structure XMC_GPIO_CONFIG_t and initialization function XMC_GPIO_Init()
76  * -# Allows the selection of weak pull-up or pull-down device. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()
77  * \if XMC1
78  * -# Allows the selection of input hysteresis. XMC_GPIO_SetInputHysteresis()
79  * \endif
80  *
81  *
82  * Output mode features:
83  * -# Allows the selection of push pull/open drain and Alternate output. Configuration structure XMC_GPIO_MODE_t and function XMC_GPIO_SetMode()
84  * \if XMC4
85  * -# Allows the selection of pad driver strength. Configuration structure XMC_GPIO_OUTPUT_STRENGTH_t and function XMC_GPIO_SetOutputStrength()
86  * \endif
87  *
88  * -# Allows the selection of initial output level. Configuration structure XMC_GPIO_OUTPUT_LEVEL_t and function XMC_GPIO_SetOutputLevel()
89  *
90  *@{
91  */
92 
93 /**********************************************************************************************************************
94  * MACROS
95  *********************************************************************************************************************/
96 
97 #define PORT_IOCR_PC_Pos PORT0_IOCR0_PC0_Pos
98 #define PORT_IOCR_PC_Msk PORT0_IOCR0_PC0_Msk
99 
100 #define PORT_IOCR_PC_Size 				(8U)
101 
102 
103 #define XMC_GPIO_CHECK_OUTPUT_LEVEL(level) ((level == XMC_GPIO_OUTPUT_LEVEL_LOW) || \
104                                             (level == XMC_GPIO_OUTPUT_LEVEL_HIGH))
105 
106 #define XMC_GPIO_CHECK_HWCTRL(hwctrl) ((hwctrl == XMC_GPIO_HWCTRL_DISABLED) || \
107                                        (hwctrl == XMC_GPIO_HWCTRL_PERIPHERAL1) || \
108                                        (hwctrl == XMC_GPIO_HWCTRL_PERIPHERAL2))
109 
110 /**********************************************************************************************************************
111  * ENUMS
112  *********************************************************************************************************************/
113 
114 
115 /**
116  * Defines output level of a pin. Use type \a XMC_GPIO_OUTPUT_LEVEL_t for this enum.
117  */
118 typedef enum XMC_GPIO_OUTPUT_LEVEL
119 {
120   XMC_GPIO_OUTPUT_LEVEL_LOW  = 0x10000U, /**<  Reset bit */
121   XMC_GPIO_OUTPUT_LEVEL_HIGH = 0x1U, 	/**< Set bit  */
122 } XMC_GPIO_OUTPUT_LEVEL_t;
123 
124 /**
125  * Defines direct hardware control characteristics of the pin . Use type \a XMC_GPIO_HWCTRL_t for this enum.
126  */
127 typedef enum XMC_GPIO_HWCTRL
128 {
129   XMC_GPIO_HWCTRL_DISABLED     = 0x0U, /**<  Software control only */
130   XMC_GPIO_HWCTRL_PERIPHERAL1  = 0x1U, /**<  HWI0/HWO0 control path can override the software configuration */
131   XMC_GPIO_HWCTRL_PERIPHERAL2  = 0x2U  /**<  HWI1/HWO1 control path can override the software configuration */
132 } XMC_GPIO_HWCTRL_t;
133 
134 /**********************************************************************************************************************
135  * DEVICE FAMILY EXTENSIONS
136  *********************************************************************************************************************/
137 
138  #if UC_FAMILY == XMC1
139 #include "xmc1_gpio.h"
140 #elif UC_FAMILY == XMC4
141 #include "xmc4_gpio.h"
142 #else
143 #error "xmc_gpio.h: family device not supported"
144 #endif
145 
146 /**********************************************************************************************************************
147  * API PROTOTYPES
148  *********************************************************************************************************************/
149 
150 #ifdef __cplusplus
151 extern "C" {
152 #endif
153 
154 
155 /**
156  * @param  port	  Constant pointer pointing to GPIO port, to access port registers like Pn_OUT,Pn_OMR,Pn_IOCR etc.
157  * @param  pin	  Port pin number.
158  * @param  config GPIO configuration data structure. Refer data structure @ref XMC_GPIO_CONFIG_t for details.
159  *
160  * @return None
161  *
162  * \par<b>Description:</b><br>
163  * \if XMC1
164  * Initializes input / output mode settings like, pull up / pull down devices,hysteresis, push pull /open drain.
165  * Also configures alternate function outputs and clears hardware port control for a selected \a port \a and \a pin.
166  * \a config provides selected I/O settings. It configures hardware registers Pn_IOCR,Pn_OUT, Pn_OMR,Pn_PDISC and Pn_PHCR.
167  * \endif
168  * \if XMC4
169  * Initializes input / output mode settings like, pull up / pull down devices,push pull /open drain, and pad driver mode.
170  * Also configures alternate function outputs and clears hardware port control for selected \a port and \a pin .
171  * It configures hardware registers Pn_IOCR,Pn_OUT,Pn_OMR,Pn_PDISC and Pn_PDR.\n
172  * \endif
173  *
174  * \par<b>Related APIs:</b><BR>
175  *  None
176  *
177  * \par<b>Note:</b><br>
178  * This API is called in definition of DAVE_init by code generation and therefore should not be explicitly called
179  * for the normal operation. Use other APIs only after DAVE_init is called successfully (returns DAVE_STATUS_SUCCESS).
180  *
181  *
182  */
183 
184 
185 void XMC_GPIO_Init(XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_CONFIG_t *const config);
186 
187 /**
188  *
189  * @param  port	Constant pointer pointing to GPIO port, to access hardware register Pn_IOCR.
190  * @param  pin	Port pin number.
191  * @param  mode input / output functionality selection. Refer @ref XMC_GPIO_MODE_t for valid values.
192  *
193  * @return None
194  *
195  * \par<b>Description:</b><br>
196  * Sets digital input and output driver functionality and characteristics of a GPIO port pin. It configures hardware
197  * registers Pn_IOCR. \a mode is initially configured during initialization in XMC_GPIO_Init(). Call this API to alter
198  * the port direction functionality as needed later in the program.
199  *
200  * \par<b>Related APIs:</b><BR>
201  *  None
202  *
203  */
204 
205 void XMC_GPIO_SetMode(XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_MODE_t mode);
206 
207 
208 /**
209  *
210  * @param  port	 Constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
211  * @param  pin	 Port pin number.
212  * @param  level output level selection. Refer @ref XMC_GPIO_OUTPUT_LEVEL_t for valid values.
213  *
214  * @return None
215  *
216  * \par<b>Description:</b><br>
217  * Set port pin output level to high or low.It configures hardware registers Pn_OMR.\a level is initially
218  * configured during initialization in XMC_GPIO_Init(). Call this API to alter output level as needed later in the program.
219  *
220  * \par<b>Related APIs:</b><BR>
221  *  XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
222  *
223  * \par<b>Note:</b><br>
224  * Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
225  *
226  */
227 
228 
XMC_GPIO_SetOutputLevel(XMC_GPIO_PORT_t * const port,const uint8_t pin,const XMC_GPIO_OUTPUT_LEVEL_t level)229 __STATIC_INLINE void XMC_GPIO_SetOutputLevel(XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_OUTPUT_LEVEL_t level)
230 {
231   XMC_ASSERT("XMC_GPIO_SetOutputLevel: Invalid port", XMC_GPIO_CHECK_OUTPUT_PORT(port));
232   XMC_ASSERT("XMC_GPIO_SetOutputLevel: Invalid output level", XMC_GPIO_CHECK_OUTPUT_LEVEL(level));
233 
234   port->OMR = (uint32_t)level << pin;
235 }
236 
237 
238 /**
239  * @param  port constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
240  * @param  pin	Port pin number.
241  *
242  * @return None
243  *
244  * \par<b>Description:</b><br>
245  *  Sets port pin output to high. It configures hardware registers Pn_OMR.
246  *
247  *  \par<b>Related APIs:</b><BR>
248  *  XMC_GPIO_SetOutputLow()
249  *
250  * \par<b>Note:</b><br>
251  * Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().\n
252  * Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.
253  *
254  */
255 
XMC_GPIO_SetOutputHigh(XMC_GPIO_PORT_t * const port,const uint8_t pin)256 __STATIC_INLINE void XMC_GPIO_SetOutputHigh(XMC_GPIO_PORT_t *const port, const uint8_t pin)
257 {
258   XMC_ASSERT("XMC_GPIO_SetOutputHigh: Invalid port", XMC_GPIO_CHECK_OUTPUT_PORT(port));
259 
260   port->OMR = (uint32_t)0x1U << pin;
261 }
262 
263 /**
264  *
265  * @param  port	constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
266  * @param  pin	port pin number.
267  *
268  * @return  None
269  *
270  *\par<b>Description:</b><br>
271  * Sets port pin output to low. It configures hardware registers Pn_OMR.\n
272  *
273  * \par<b>Related APIs:</b><BR>>
274  * XMC_GPIO_SetOutputHigh()
275  *
276  *\par<b>Note:</b><br>
277  * Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode().
278  * Register Pn_OMR is virtual and does not contain any flip-flop. A read action delivers the value of 0.\n
279  *
280  */
281 
XMC_GPIO_SetOutputLow(XMC_GPIO_PORT_t * const port,const uint8_t pin)282 __STATIC_INLINE void XMC_GPIO_SetOutputLow(XMC_GPIO_PORT_t *const port, const uint8_t pin)
283 {
284   XMC_ASSERT("XMC_GPIO_SetOutputLow: Invalid port", XMC_GPIO_CHECK_OUTPUT_PORT(port));
285 
286   port->OMR = 0x10000U << pin;
287 }
288 
289 /**
290  *
291  * @param port constant pointer pointing to GPIO port, to access hardware register Pn_OMR.
292  * @param pin  port pin number.
293  *
294  * @return None
295  *
296  * \par<b>Description:</b><br>
297  * Configures port pin output to Toggle. It configures hardware registers Pn_OMR.
298  *
299  * \par<b>Related APIs:</b><BR>
300  * XMC_GPIO_SetOutputHigh(), XMC_GPIO_SetOutputLow().
301  *
302  * \par<b>Note:</b><br>
303  * Prior to this api, user has to configure port pin to output mode using XMC_GPIO_SetMode(). Register Pn_OMR is virtual
304  * and does not contain any flip-flop. A read action delivers the value of 0.
305  *
306  */
307 
XMC_GPIO_ToggleOutput(XMC_GPIO_PORT_t * const port,const uint8_t pin)308 __STATIC_INLINE void XMC_GPIO_ToggleOutput(XMC_GPIO_PORT_t *const port, const uint8_t pin)
309 {
310   XMC_ASSERT("XMC_GPIO_ToggleOutput: Invalid port", XMC_GPIO_CHECK_OUTPUT_PORT(port));
311 
312   port->OMR = 0x10001U << pin;
313 }
314 
315 /**
316  *
317  * @param port constant pointer pointing to GPIO port, to access hardware register Pn_IN.
318  * @param pin  Port pin number.
319  *
320  * @return uint32_t pin logic level status.
321  *
322  *\par<b>Description:</b><br>
323  * Reads the Pn_IN register and returns the current logical value at the GPIO pin.
324  *
325  * \par<b>Related APIs:</b><BR>
326  * None
327  *
328  * \par<b>Note:</b><br>
329  * Prior to this api, user has to configure port pin to input mode using XMC_GPIO_SetMode().
330  *
331  */
332 
XMC_GPIO_GetInput(XMC_GPIO_PORT_t * const port,const uint8_t pin)333 __STATIC_INLINE uint32_t XMC_GPIO_GetInput(XMC_GPIO_PORT_t *const port, const uint8_t pin)
334 {
335   XMC_ASSERT("XMC_GPIO_GetInput: Invalid port", XMC_GPIO_CHECK_PORT(port));
336 
337   return (((port->IN) >> pin) & 0x1U);
338 }
339 
340 /**
341  * @param port constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
342  * @param pin  port pin number.
343  *
344  * @return None
345  *
346  * \par<b>Description:</b><br>
347  * Enables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters
348  * Deep Sleep mode.Port pin enabled with power save mode option are set to a defined state and the input Schmitt-Trigger
349  * as well as the output driver stage are switched off. By default port pin does not react to power save mode request.
350  *
351  * \par<b>Related APIs:</b><BR>
352  * XMC_GPIO_DisablePowerSaveMode()
353  *
354  * <b>Note:</b><br>
355  * Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so
356  * may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
357  *
358  */
359 
360 
XMC_GPIO_EnablePowerSaveMode(XMC_GPIO_PORT_t * const port,const uint8_t pin)361 __STATIC_INLINE void XMC_GPIO_EnablePowerSaveMode(XMC_GPIO_PORT_t *const port, const uint8_t pin)
362 {
363   XMC_ASSERT("XMC_GPIO_EnablePowerSaveMode: Invalid port", XMC_GPIO_CHECK_PORT(port));
364 
365   port->PPS |= (uint32_t)0x1U << pin;
366 }
367 
368 
369 /**
370  *
371  * @param port	constant pointer pointing to GPIO port, to access hardware register Pn_PPS.
372  * @param pin	port pin number.
373  *
374  * @return None
375  *
376  * \par<b>Description:</b><br>
377  * Disables pin power save mode and configures Pn_PPS register.This configuration is useful when the controller enters
378  * Deep Sleep mode. This configuration enables input Schmitt-Trigger and output driver stage(if pin is enabled power
379  * save mode previously). By default port \a pin does not react to power save mode request.
380  *
381  * \par<b>Related APIs:</b><BR>
382  *  XMC_GPIO_EnablePowerSaveMode()
383  *
384  *\par<b>Note:</b><br>
385  * Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B). Doing so
386  * may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
387  *
388  */
389 
XMC_GPIO_DisablePowerSaveMode(XMC_GPIO_PORT_t * const port,const uint8_t pin)390 __STATIC_INLINE void XMC_GPIO_DisablePowerSaveMode(XMC_GPIO_PORT_t *const port, const uint8_t pin)
391 {
392   XMC_ASSERT("XMC_GPIO_DisablePowerSaveMode: Invalid port", XMC_GPIO_CHECK_PORT(port));
393 
394   port->PPS &= ~(uint32_t)((uint32_t)0x1U << pin);
395 }
396 
397 
398 /**
399  * @param port	 constant pointer pointing to GPIO port, to access hardware register Pn_HWSEL.
400  * @param pin	 port pin number.
401  * @param hwctrl direct hardware control selection. Refer @ref XMC_GPIO_HWCTRL_t for valid values.
402  *
403  * @return None
404  *
405  * \par<b>Description:</b><br>
406  * Selects direct hard ware control and configures Pn_HWSEL register.This configuration is useful for the port pins
407  * overlaid with peripheral functions for which the connected peripheral needs hardware control.
408  *
409  * \par<b>Related APIs:</b><BR>
410  *  None
411  *
412  *\par<b>Note:</b><br>
413  * Do not enable the Pin Power Save function for pins configured for Hardware Control (Pn_HWSEL.HWx != 00B).
414  * Doing so may result in an undefined behavior of the pin when the device enters the Deep Sleep state.
415  *
416  */
417 
418 void XMC_GPIO_SetHardwareControl(XMC_GPIO_PORT_t *const port, const uint8_t pin, const XMC_GPIO_HWCTRL_t hwctrl);
419 
420 
421 /**
422  * @param port	constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
423  * @param pin	port pin number.
424  *
425  * @return None
426  *
427  * \par<b>Related APIs:</b><BR>
428  *  None
429  *
430  * \par<b>Description:</b><br>
431  * Enable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only for
432  * analog port pins.
433  *
434  */
XMC_GPIO_EnableDigitalInput(XMC_GPIO_PORT_t * const port,const uint8_t pin)435 __STATIC_INLINE void XMC_GPIO_EnableDigitalInput(XMC_GPIO_PORT_t *const port, const uint8_t pin)
436 {
437   XMC_ASSERT("XMC_GPIO_EnableDigitalInput: Invalid analog port", XMC_GPIO_CHECK_ANALOG_PORT(port));
438 
439   port->PDISC &= ~(uint32_t)((uint32_t)0x1U << pin);
440 }
441 
442 
443 /**
444  * @param  port	constant pointer pointing to GPIO port, to access hardware register Pn_PDISC.
445  * @param  pin	port pin number.
446  *
447  * @return None
448  *
449  * \par<b>Related APIs:</b><BR>
450  * None
451  *
452  * \par<b>Description:</b><br>
453  * Disable digital input path for analog pins and configures Pn_PDISC register.This configuration is applicable only
454  * for analog port pins.
455  *
456  */
457 
XMC_GPIO_DisableDigitalInput(XMC_GPIO_PORT_t * const port,const uint8_t pin)458 __STATIC_INLINE void XMC_GPIO_DisableDigitalInput(XMC_GPIO_PORT_t *const port, const uint8_t pin)
459 {
460   XMC_ASSERT("XMC_GPIO_EnableDigitalInput: Invalid analog port", XMC_GPIO_CHECK_ANALOG_PORT(port));
461 
462   port->PDISC |= (uint32_t)0x1U << pin;
463 }
464 
465 #ifdef __cplusplus
466 }
467 #endif
468 
469 /**
470  * @} (end addtogroup GPIO)
471  */
472 
473 /**
474  * @} (end addtogroup XMClib)
475  */
476 
477 #endif /* XMC_GPIO_H */
478 
479