1 #if !defined(LAYOUT_CAT1C_H) 2 #define LAYOUT_CAT1C_H 3 4 #include "cy_device_headers.h" 5 6 #define STACK_SIZE 0x1000 7 #define RAMVECTORS_ALIGNMENT 128 8 9 #define SRAM_START_RESERVE 0 10 #define SRAM_PRIVATE_FOR_SROM 0x800 /* 2K Private SRAM for SROM (e.g. API processing). Reserved at the beginning */ 11 12 /* RAM */ 13 #define SRAM_BASE_ADDRESS CY_SRAM_BASE /* SRAM START */ 14 #define TOTAL_RAM CY_SRAM_SIZE 15 #define CM0PLUS_SRAM_RESERVE 0x00004000 /* 16K cm0plus */ 16 17 /* FLASH */ 18 #define CODE_FLASH_BASE_ADDRESS CY_FLASH_LG_SBM_BASE /* FLASH START */ 19 #define TOTAL_FLASH (CY_FLASH_LG_SBM_SIZE + CY_FLASH_SM_SBM_SIZE) 20 #define CM0PLUS_CODE_FLASH_RESERVE 0x00080000 /* 512K CM0P FLASH SIZE */ 21 22 /* CM7_1 RAM and FLASH */ 23 #if defined (__CM7_1_PRESENT) 24 #define CM7_1_SRAM_RESERVE 0x00010000 /* (SRAM0/64KB) -> cm7_1 */ 25 #else 26 #define CM7_1_SRAM_RESERVE 0x00000000UL 27 #endif 28 29 #if (TOTAL_FLASH == 0x830000) /** 8M device */ 30 #define CM7_0_CODE_FLASH_RESERVE 0x00200000 31 #elif (TOTAL_FLASH == 0x410000) /** 4M device */ 32 #define CM7_0_CODE_FLASH_RESERVE 0x00200000 33 #elif (TOTAL_FLASH == 0x210000) /** 2M device */ 34 #define CM7_0_CODE_FLASH_RESERVE 0x00100000 35 #elif (TOTAL_FLASH == 0x110000) /** 1M device */ 36 #define CM7_0_CODE_FLASH_RESERVE 0x00090000 37 #else 38 #error "Invalid device" 39 #endif 40 41 42 /* SRAM reservations */ 43 #define BASE_SRAM_CM0P (SRAM_BASE_ADDRESS + SRAM_START_RESERVE + SRAM_PRIVATE_FOR_SROM) 44 #define SIZE_SRAM_CM0P (CM0PLUS_SRAM_RESERVE - SRAM_START_RESERVE - SRAM_PRIVATE_FOR_SROM) 45 #define BASE_SRAM_CM7_0 (SRAM_BASE_ADDRESS + CM0PLUS_SRAM_RESERVE) 46 #define SIZE_SRAM_CM7_0 TOTAL_RAM - CM0PLUS_SRAM_RESERVE - CM7_1_SRAM_RESERVE 47 #define BASE_SRAM_CM7_1 SRAM_BASE_ADDRESS + CM0PLUS_SRAM_RESERVE + SIZE_SRAM_CM7_0 48 49 /* Code flash reservations */ 50 #define BASE_CODE_FLASH_CM0P CODE_FLASH_BASE_ADDRESS 51 #define SIZE_CODE_FLASH_CM0P CM0PLUS_CODE_FLASH_RESERVE 52 #define BASE_CODE_FLASH_CM7_0 CODE_FLASH_BASE_ADDRESS + CM0PLUS_CODE_FLASH_RESERVE 53 #define SIZE_CODE_FLASH_CM7_0 CM7_0_CODE_FLASH_RESERVE 54 #define BASE_CODE_FLASH_CM7_1 CODE_FLASH_BASE_ADDRESS + CM0PLUS_CODE_FLASH_RESERVE + CM7_0_CODE_FLASH_RESERVE 55 56 #endif /* LAYOUT_CAT1C_H */ 57 58 59 /* [] END OF FILE */ 60
