1 /******************************************************************************
2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18
19 /********************************************************************************************************
20 * @file uart.h
21 *
22 * @brief This is the header file for B91
23 *
24 * @author Driver Group
25 *
26 *******************************************************************************************************/
27 /** @page UART
28 *
29 * Introduction
30 * ===============
31 * B91 supports two uart: uart0~ uart1.
32 *
33 * API Reference
34 * ===============
35 * Header File: uart.h
36 */
37 #ifndef UART_H_
38 #define UART_H_
39
40 #include "gpio.h"
41 #include "dma.h"
42 #include "timer.h"
43 #include "reg_include/register_b91.h"
44
45 extern unsigned char uart_rx_byte_index[2];
46 extern unsigned char uart_tx_byte_index[2];
47
48 #define uart_rtx_pin_tx_trig(uart_num) uart_clr_tx_done(uart_num)
49
50
51 /**********************************************************************************************************************
52 * global constants *
53 *********************************************************************************************************************/
54
55 /**********************************************************************************************************************
56 * global macro *
57 *********************************************************************************************************************/
58
59 /**********************************************************************************************************************
60 * global data type *
61 *********************************************************************************************************************/
62 /**
63 * @brief Define parity type
64 */
65 typedef enum {
66 UART_PARITY_NONE = 0,
67 UART_PARITY_EVEN,
68 UART_PARITY_ODD,
69 } uart_parity_e;
70
71 /**
72 * @brief Define UART chn
73 */
74 typedef enum {
75 UART0 = 0,
76 UART1,
77 }uart_num_e;
78
79 /**
80 * @brief Define mul bits
81 */
82 typedef enum{
83 UART_BW_MUL1 = 0,
84 UART_BW_MUL2 = 1,
85 UART_BW_MUL3 = 2,
86 UART_BW_MUL4 = 3,
87 } uart_timeout_mul_e;
88
89 /**
90 * @brief Define the length of stop bit
91 */
92 typedef enum {
93 UART_STOP_BIT_ONE = 0,
94 UART_STOP_BIT_ONE_DOT_FIVE = BIT(4),
95 UART_STOP_BIT_TWO = BIT(5),
96 } uart_stop_bit_e;
97
98 /**
99 * @brief Define UART RTS mode
100 */
101 typedef enum {
102 UART_RTS_MODE_AUTO = 0,
103 UART_RTS_MODE_MANUAL,
104 } uart_rts_mode_e;
105
106 /**
107 * @brief Define UART CTS pin : UART0(PA1 PB6 PD0), UART1(PC4 PD4 PE1)
108 */
109 typedef enum{
110 UART0_CTS_PA1 = GPIO_PA1,
111 UART0_CTS_PB6 = GPIO_PB6,
112 UART0_CTS_PD0 = GPIO_PD0,
113
114 UART1_CTS_PC4 = GPIO_PC4,
115 UART1_CTS_PD4 = GPIO_PD4,
116 UART1_CTS_PE1 = GPIO_PE1,
117 }uart_cts_pin_e;
118
119 /**
120 * @brief Define UART RTS pin : UART0(PA2 PB4 PD1), UART1(PC5 PD5 PE3)
121 */
122 typedef enum{
123 UART0_RTS_PA2 = GPIO_PA2,
124 UART0_RTS_PB4 = GPIO_PB4,
125 UART0_RTS_PD1 = GPIO_PD1,
126
127 UART1_RTS_PC5 = GPIO_PC5,
128 UART1_RTS_PD5 = GPIO_PD5,
129 UART1_RTS_PE3 = GPIO_PE3,
130 }uart_rts_pin_e;
131
132 /**
133 * @brief Define UART TX pin : UART0(PA3 PB2 PD2), UART1(PC6 PD6 PE0)
134 */
135 typedef enum{
136 UART0_TX_PA3 = GPIO_PA3,
137 UART0_TX_PB2 = GPIO_PB2,
138 UART0_TX_PD2 = GPIO_PD2,
139
140 UART1_TX_PC6 = GPIO_PC6,
141 UART1_TX_PD6 = GPIO_PD6,
142 UART1_TX_PE0 = GPIO_PE0,
143 }uart_tx_pin_e;
144
145
146 /**
147 * @brief Define UART RX pin : UART0(PA4 PB3 PD3), UART1(PC7 PD7 PE2)
148 */
149 typedef enum{
150 UART0_RX_PA4 = GPIO_PA4,
151 UART0_RX_PB3 = GPIO_PB3,
152 UART0_RX_PD3 = GPIO_PD3,
153
154 UART1_RX_PC7 = GPIO_PC7,
155 UART1_RX_PD7 = GPIO_PD7,
156 UART1_RX_PE2 = GPIO_PE2,
157 }uart_rx_pin_e;
158
159 /**
160 * @brief Define UART IRQ MASK.The enumeration variable is just a index, and actually needs to be operated registers behind.
161 */
162 typedef enum{
163 UART_RX_IRQ_MASK = BIT(0),//reg_uart_ctrl0(uart_num) BIT(6)
164 UART_TX_IRQ_MASK = BIT(1),//reg_uart_ctrl0(uart_num) BIT(7)
165 UART_RXDONE_MASK = BIT(2),//reg_uart_rx_timeout1(uart_num) BIT(2)
166 UART_TXDONE_MASK = BIT(3),//reg_uart_rx_timeout1(uart_num) BIT(6)
167 UART_ERR_IRQ_MASK = BIT(4),//reg_uart_rx_timeout1(uart_num) BIT(7)
168 }uart_irq_mask_e;
169
170
171
172
173 /**
174 * @brief Define UART IRQ BIT STATUS FOR GET
175 */
176 typedef enum{
177 UART_RX_ERR = BIT(7),
178 UART_TXDONE = BIT(0),
179 UART_TXBUF_IRQ_STATUS = BIT(1),
180 UART_RXDONE = BIT(2),
181 UART_RXBUF_IRQ_STATUS = BIT(3),
182 }uart_irq_status_get_e;
183
184 /**
185 * @brief Define UART IRQ BIT STATUS FOR CLR
186 */
187 typedef enum{
188 UART_CLR_RX = BIT(6),
189 UART_CLR_TX = BIT(7),
190 }uart_irq_status_clr_e;
191
192 /**********************************************************************************************************************
193 * global variable declaration *
194 *********************************************************************************************************************/
195
196 /**********************************************************************************************************************
197 * global function prototype *
198 *********************************************************************************************************************/
199 /**
200 * @brief This function serves to get the rxfifo cnt.
201 * @param[in] uart_num - UART0/UART1.
202 * @return none
203 */
uart_get_rxfifo_num(uart_num_e uart_num)204 static inline unsigned char uart_get_rxfifo_num(uart_num_e uart_num)
205 {
206 return reg_uart_buf_cnt(uart_num)&FLD_UART_RX_BUF_CNT ;
207 }
208
209 /**
210 * @brief This function serves to get the txfifo cnt.
211 * @param[in] uart_num - UART0/UART1.
212 * @return none
213 */
uart_get_txfifo_num(uart_num_e uart_num)214 static inline unsigned char uart_get_txfifo_num(uart_num_e uart_num)
215 {
216 return (reg_uart_buf_cnt(uart_num)&FLD_UART_TX_BUF_CNT )>>4;
217 }
218
219 /**
220 * @brief This function resets the UART module.
221 * @param[in] uart_num - UART0 or UART1.
222 * @return none
223 */
uart_reset(uart_num_e uart_num)224 static inline void uart_reset(uart_num_e uart_num)
225 {
226
227 reg_rst0 &= (~((uart_num)?FLD_RST0_UART1:FLD_RST0_UART0));
228 reg_rst0 |= ((uart_num)?FLD_RST0_UART1:FLD_RST0_UART0);
229 }
230
231 /**
232 * @brief This function enable the clock of UART module.
233 * @param[in] uart_num - UART0/UART1.
234 * @return none
235 */
uart_clk_en(uart_num_e uart_num)236 static inline void uart_clk_en(uart_num_e uart_num)
237 {
238 reg_clk_en0 |= ((uart_num)?FLD_CLK0_UART1_EN:FLD_CLK0_UART0_EN);
239 }
240
241 /**
242 * @brief This function initializes the UART module.
243 * @param[in] uart_num - UART0 or UART1.
244 * @param[in] div - uart clock divider.
245 * @param[in] bwpc - bitwidth, should be set to larger than 2.
246 * @param[in] parity - selected parity type for UART interface.
247 * @param[in] stop_bit - selected length of stop bit for UART interface.
248 * @return none
249 * @note sys_clk baudrate g_uart_div g_bwpc
250 *
251 * 16Mhz 9600 118 13
252 * 19200 118 6
253 * 115200 9 13
254 *
255 * 24Mhz 9600 249 9
256 * 19200 124 9
257 * 115200 12 15
258 *
259 * 32Mhz 9600 235 13
260 * 19200 235 6
261 * 115200 17 13
262 *
263 * 48Mhz 9600 499 9
264 * 19200 249 9
265 * 115200 25 15
266 */
267 extern void uart_init(uart_num_e uart_num,unsigned short div, unsigned char bwpc, uart_parity_e parity, uart_stop_bit_e stop_bit);
268
269 /***********************************************************
270 * @brief This function serves to calculate the best bwpc(bit width) .i.e reg0x96.
271 * @param[in] baudrate - baut rate of UART.
272 * @param[in] sysclk - system clock.
273 * @param[out] div - uart clock divider.
274 * @param[out] bwpc - bitwidth, should be set to larger than 2.
275 * @return none
276 * @note BaudRate*(div+1)*(bwpc+1) = system clock.
277 * simplify the expression: div*bwpc = constant(z).
278 * bwpc range from 3 to 15.so loop and get the minimum one decimal point.
279 */
280 void uart_cal_div_and_bwpc(unsigned int baudrate, unsigned int sysclk, unsigned short* div, unsigned char *bwpc);
281
282 /**
283 * @brief This function serves to set r_rxtimeout. this setting is transfer one bytes need cycles base on uart_clk.
284 * For example, if transfer one bytes (1start bit+8bits data+1 priority bit+2stop bits) total 12 bits,
285 * this register setting should be (bpwc+1)*12.
286 * @param[in] uart_num - UART0 or UART1.
287 * @param[in] bwpc - bitwidth, should be set to larger than 2.
288 * @param[in] bit_cnt - bit number.
289 * @param[in] mul - mul.
290 * @return none
291 */
292 void uart_set_dma_rx_timeout(uart_num_e uart_num,unsigned char bwpc, unsigned char bit_cnt, uart_timeout_mul_e mul);
293
294 /**
295 * @brief This function serves to config the number level setting the irq bit of status register.
296 * @param[in] uart_num - UART0 or UART1.
297 * @param[in] rx_level - receive level value. ie 0x140089[0,3].
298 * @return none
299 */
uart_rx_irq_trig_level(uart_num_e uart_num,unsigned char rx_level)300 static inline void uart_rx_irq_trig_level(uart_num_e uart_num,unsigned char rx_level)
301 {
302 reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_RX_IRQ_TRIQ_LEV)) | (rx_level & 0x0f);
303 }
304
305 /**
306 * @brief This function serves to config the number level setting the irq bit of status register.
307 * @param[in] uart_num - UART0 or UART1.
308 * @param[in] tx_level - transmit level value.ie 0x140089[4,7].
309 * @return none
310 */
uart_tx_irq_trig_level(uart_num_e uart_num,unsigned char tx_level)311 static inline void uart_tx_irq_trig_level(uart_num_e uart_num,unsigned char tx_level)
312 {
313 reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_TX_IRQ_TRIQ_LEV)) | (tx_level << 4);
314 }
315
316 /**
317 * @brief This function serves to send data by byte with not DMA method.
318 * @param[in] uart_num - UART0 or UART1.
319 * @param[in] tx_data - the data to be send.
320 * @return none
321 */
322 void uart_send_byte(uart_num_e uart_num,unsigned char tx_data);
323
324 /**
325 * @brief This function serves to receive uart data by byte with not DMA method.
326 * @param[in] uart_num - UART0 or UART1.
327 * @return none
328 */
329 unsigned char uart_read_byte(uart_num_e uart_num);
330 /**
331 * @brief This function serves to judge if the transmission of uart is done.
332 * @param[in] uart_num - UART0 or UART1.
333 * @return return the tx status
334 * - 0:tx is done 1:tx isn't done
335 */
336 unsigned char uart_tx_is_busy(uart_num_e uart_num);
337 /**
338 * @brief This function serves to send uart0 data by halfword with not DMA method.
339 * @param[in] uart_num - UART0 or UART1.
340 * @param[in] data - the data to be send.
341 * @return none
342 */
343 void uart_send_hword(uart_num_e uart_num, unsigned short data);
344
345 /**
346 * @brief This function serves to send uart0 data by word with not DMA method.
347 * @param[in] uart_num - UART0 or UART1.
348 * @param[in] data - the data to be send.
349 * @return none
350 */
351 void uart_send_word(uart_num_e uart_num, unsigned int data);
352
353
354 /**
355 * @brief This function sets the RTS pin's level manually.
356 * @param[in] uart_num - UART0 or UART1.
357 * @param[in] polarity - set the output of RTS pin(only for manual mode).
358 * @return none
359 */
360 void uart_set_rts_level(uart_num_e uart_num, unsigned char polarity);
361
362 /**
363 * @brief This function serves to set pin for UART0 cts function .
364 * @param[in] cts_pin -To set cts pin.
365 * @return none
366 */
367 void uart_set_cts_pin(uart_cts_pin_e cts_pin);
368
369 /**
370 * @brief This function serves to set pin for UART0 rts function .
371 * @param[in] rts_pin - To set rts pin.
372 * @return none
373 */
374 void uart_set_rts_pin(uart_rts_pin_e rts_pin);
375
376 /**
377 * @brief This function serves to select pin for UART module.
378 * @param[in] tx_pin - the pin to send data.
379 * @param[in] rx_pin - the pin to receive data.
380 * @return none
381 */
382 void uart_set_pin(uart_tx_pin_e tx_pin,uart_rx_pin_e rx_pin);
383
384 /**
385 * @brief This function serves to select pin for UART module.
386 * @param[in] rx_pin - the pin serves to send and receive data.
387 * @return none
388 */
389 void uart_set_rtx_pin(uart_rx_pin_e rx_pin);
390
391
392 /**
393 * @brief This function serves to send data by DMA, this function tell the DMA to get data from the RAM and start.
394 * @param[in] uart_num - UART0 or UART1.
395 * @param[in] addr - pointer to the buffer containing data need to send.
396 * @param[in] len - DMA transmission length.The maximum transmission length of DMA is 0xFFFFFC bytes, so dont'n over this length.
397 * @return 1 dma start send.
398 * 0 the length is error.
399 */
400 unsigned char uart_send_dma(uart_num_e uart_num, unsigned char * addr, unsigned int len );
401
402 /**
403 * @brief This function serves to send data with not DMA method.
404 * @param[in] uart_num - UART0 or UART1.
405 * @param[in] addr - pointer to the buffer containing data need to send.
406 * @param[in] len - NDMA transmission length.
407 * @return 1
408 */
409 unsigned char uart_send(uart_num_e uart_num, unsigned char * addr, unsigned char len );
410
411 /**
412 * @brief This function serves to receive data function by DMA, this function tell the DMA to get data from the uart data fifo.
413 * @param[in] uart_num - UART0 or UART1.
414 * @param[in] addr - pointer to the buffer receive data.
415 * @param[in] rev_size - the receive length of DMA,The maximum transmission length of DMA is 0xFFFFFC bytes, so dont'n over this length.
416 * @note 1. rev_size must be larger than the data you received actually.
417 * 2. the data length can be arbitrary if less than rev_size.
418 * @return none
419 */
420 extern void uart_receive_dma(uart_num_e uart_num, unsigned char * addr,unsigned int rev_size);
421
422 /**
423 * @brief This function serves to get the length of the data that dma received.
424 * @param[in] uart_num - UART0 or UART1.
425 * @param[in] chn - dma channel.
426 * @return data length.
427 */
428 extern unsigned int uart_get_dma_rev_data_len(uart_num_e uart_num,dma_chn_e chn);
429
430 /**
431 * @brief This function serves to set uart tx_dam channel and config dma tx default.
432 * @param[in] uart_num - UART0 or UART1.
433 * @param[in] chn - dma channel.
434 * @return none
435 */
436 extern void uart_set_tx_dma_config(uart_num_e uart_num, dma_chn_e chn);
437
438 /**
439 * @brief This function serves to set uart rx_dam channel and config dma rx default.
440 * @param[in] uart_num - UART0 or UART1.
441 * @param[in] chn - dma channel.
442 * @return none
443 */
444 extern void uart_set_rx_dma_config(uart_num_e uart_num, dma_chn_e chn);
445
446 /**
447 * @brief This function serves to config the irq of uart tx and rx.
448 * @param[in] uart_num - UART0 or UART1.
449 * @param[in] mask - uart irq mask.
450 * @return none
451 */
uart_set_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)452 static inline void uart_set_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)
453 {
454 if((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK))
455 {
456 reg_uart_ctrl0(uart_num) |= (((mask & UART_RX_IRQ_MASK)? 1:0) << 6) | (((mask & UART_TX_IRQ_MASK)? 1:0 )<< 7);
457 }
458
459 if((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK))
460 {
461 reg_uart_rx_timeout1(uart_num) |= (((mask & UART_RXDONE_MASK)? 1:0) << 2) | (((mask & UART_TXDONE_MASK) ? 1:0 )<< 6) | (((mask & UART_ERR_IRQ_MASK) ? 1:0 )<< 7);
462 }
463 }
464
465 /**
466 * @brief This function serves to clear the irq of uart tx and rx.
467 * @param[in] uart_num - UART0 or UART1.
468 * @param[in] mask - uart irq mask.
469 * @return none
470 */
uart_clr_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)471 static inline void uart_clr_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)
472 {
473 if((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK))
474 {
475 reg_uart_ctrl0(uart_num) &= ~((((mask & UART_RX_IRQ_MASK)? 1:0)<< 6) | (((mask & UART_TX_IRQ_MASK)? 1:0) << 7));
476 }
477 if((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK)){
478 reg_uart_rx_timeout1(uart_num) &= ~((((mask & UART_RXDONE_MASK)? 1:0) << 2) | (((mask & UART_TXDONE_MASK)? 1:0)<< 6) | (((mask & UART_ERR_IRQ_MASK)? 1:0) << 7));
479 }
480 }
481
482
483 /**
484 * @brief This function serves to get the irq status of uart tx and rx.
485 * @param[in] uart_num - UART0 or UART1.
486 * @param[in] status - uart irq mask.
487 * @return irq status
488 */
uart_get_irq_status(uart_num_e uart_num,uart_irq_status_get_e status)489 static inline unsigned int uart_get_irq_status(uart_num_e uart_num,uart_irq_status_get_e status)
490 {
491 if(status == UART_RX_ERR){
492 return (reg_uart_status1(uart_num) & (status));
493 }
494 else
495 {
496 return (reg_uart_status2(uart_num) & (status));
497 }
498 }
499
500
501 /**
502 * @brief This function serves to clear the irq status of uart tx and rx.
503 * @param[in] uart_num - UART0 or UART1.
504 * @param[in] status - uart irq mask.
505 * @return none
506 */
uart_clr_irq_status(uart_num_e uart_num,uart_irq_status_clr_e status)507 static inline void uart_clr_irq_status(uart_num_e uart_num,uart_irq_status_clr_e status)
508 {
509 reg_uart_status1(uart_num) |= (status);
510 }
511
512 /**
513 * @brief This function serves to set uart rts enable.
514 * @param[in] uart_num - UART0 or UART1.
515 * @return none
516 */
uart_set_rts_en(uart_num_e uart_num)517 static inline void uart_set_rts_en(uart_num_e uart_num)
518 {
519 reg_uart_ctrl2(uart_num) |= FLD_UART_RTS_EN; //enable RTS function
520 }
521
522 /**
523 * @brief This function serves to set uart rts disable.
524 * @param[in] uart_num - UART0 or UART1.
525 * @return none
526 */
uart_set_rts_dis(uart_num_e uart_num)527 static inline void uart_set_rts_dis(uart_num_e uart_num)
528 {
529 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_EN); //disable RTS function
530 }
531
532 /**
533 * @brief This function serves to set uart cts enable.
534 * @param[in] uart_num - UART0 or UART1.
535 * @return none
536 */
uart_set_cts_en(uart_num_e uart_num)537 static inline void uart_set_cts_en(uart_num_e uart_num)
538 {
539 reg_uart_ctrl1(uart_num) |= FLD_UART_TX_CTS_ENABLE; //enable CTS function
540 }
541
542 /**
543 * @brief This function serves to set uart cts disable.
544 * @param[in] uart_num - UART0 or UART1.
545 * @return none
546 */
uart_set_cts_dis(uart_num_e uart_num)547 static inline void uart_set_cts_dis(uart_num_e uart_num)
548 {
549 reg_uart_ctrl1(uart_num) &= (~FLD_UART_TX_CTS_ENABLE); //disable CTS function
550 }
551
552 /**
553 * @brief This function serves to configure UART hardware flow. Configure CTS.
554 * @param[in] uart_num - UART0 or UART1.
555 * @param[in] cts_pin - RTS pin select.
556 * @param[in] cts_parity - when CTS's input equals to select, tx will be stopped.
557 * @return none
558 */
559 extern void uart_cts_config(uart_num_e uart_num,uart_cts_pin_e cts_pin,unsigned char cts_parity);
560
561 /**
562 * @brief This function serves to configure UART hardware flow. Configure RTS.
563 * @param[in] uart_num - UART0 or UART1.
564 * @param[in] rts_pin - RTS pin select.
565 * @param[in] rts_parity - whether invert the output of RTS pin(only for auto mode).
566 * @param[in] auto_mode_en - set the mode of RTS(auto or manual).
567 * @return none
568 */
569 extern void uart_rts_config(uart_num_e uart_num,uart_rts_pin_e rts_pin,unsigned char rts_parity,unsigned char auto_mode_en);
570
571 /**
572 * @brief This function serves to set uart rts trig lexel in auto mode.
573 * @param[in] uart_num - UART0 or UART1.
574 * @param[in] level - threshold of trig RTS pin's level toggle(only for auto mode).
575 * @return none
576 */
uart_rts_trig_level_auto_mode(uart_num_e uart_num,unsigned char level)577 static inline void uart_rts_trig_level_auto_mode(uart_num_e uart_num,unsigned char level)
578 {
579 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_TRIQ_LEV);
580 reg_uart_ctrl2(uart_num) |= (level & FLD_UART_RTS_TRIQ_LEV);
581 }
582
583 /**
584 * @brief This function serves to set uart rts auto mode.
585 * @param[in] uart_num - UART0 or UART1.
586 * @return none
587 */
uart_rts_auto_mode(uart_num_e uart_num)588 static inline void uart_rts_auto_mode(uart_num_e uart_num)
589 {
590 reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_MANUAL_M);
591 }
592
593 /**
594 * @brief This function serves to set uart rts manual mode.
595 * @param[in] uart_num - UART0 or UART1.
596 * @return none
597 */
uart_rts_manual_mode(uart_num_e uart_num)598 static inline void uart_rts_manual_mode(uart_num_e uart_num)
599 {
600 reg_uart_ctrl2(uart_num) |= (FLD_UART_RTS_MANUAL_M);
601 }
602
603
604 /**
605 * @brief This function is used to set the 'uart_rx_byte_index' to 0.
606 * after wakeup from power-saving mode or reset uart, you must call this function before receiving the data.
607 * @param[in] uart_num
608 * @return none.
609 */
uart_clr_rx_index(uart_num_e uart_num)610 static inline void uart_clr_rx_index(uart_num_e uart_num)
611 {
612 uart_rx_byte_index[uart_num]=0;
613 }
614
615 /**
616 * @brief This function is used to set the 'uart_tx_byte_index' to 0.
617 * after wakeup from power-saving mode or reset uart, you must call this function before sending the data.
618 * @param[in] uart_num
619 * @return none.
620 */
uart_clr_tx_index(uart_num_e uart_num)621 static inline void uart_clr_tx_index(uart_num_e uart_num)
622 {
623 uart_tx_byte_index[uart_num]=0;
624 }
625
626 /**
627 * @brief This function is used to clr uart tx-done,which means set tx-done to 0
628 * @param[in] uart_num
629 * @return none.
630 */
uart_clr_tx_done(uart_num_e uart_num)631 static inline void uart_clr_tx_done(uart_num_e uart_num)
632 {
633 reg_uart_state(uart_num) |=BIT(7);
634 }
635
636 /**
637 * @brief This function is used to enable the rtx function of .
638 * @param[in] chn - UART0 or UART1.
639 * @return none.
640 */
uart_rtx_en(uart_num_e chn)641 static inline void uart_rtx_en(uart_num_e chn)
642 {
643 reg_uart_rx_timeout1(chn)|=FLD_UART_P7816_EN;
644 }
645
646 #endif /* UART_H_ */
647
