1 /* 2 * Copyright (c) 2001-2019, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 8 #ifndef __TST_HW_ACCESS_H__ 9 #define __TST_HW_ACCESS_H__ 10 11 #include <stdint.h> 12 13 #include "dx_reg_base_host.h" 14 #include "dx_env.h" 15 16 /* rotate 32-bits word by 16 bits */ 17 #define ROT32(x) ( (x) >> 16 | (x) << 16 ) 18 19 /* inverse the bytes order in a word */ 20 #define REVERSE32(x) ( ((ROT32((x)) & 0xff00ff00UL) >> 8) | ((ROT32((x)) & 0x00ff00ffUL) << 8) ) 21 22 #ifndef BIG__ENDIAN 23 /* define word endiannes*/ 24 #define SET_WORD_ENDIANESS 25 #else 26 #define SET_WORD_ENDIANESS(val) REVERSE32(val) 27 #endif 28 29 /* LCS */ 30 #define TESTS_LCS_CM 0x0 31 #define TESTS_LCS_DM 0x1 32 #define TESTS_LCS_SEC_DISABLED 0x3 33 #define TESTS_LCS_SEC_ENABLED 0x5 34 #define TESTS_LCS_RMA 0x7 35 36 /* errors */ 37 #define TEST_OK 0 38 #define TEST_BURN_OTP_ERR 1 39 #define TEST_BURN_OTP_KDR_ERR 2 40 #define TEST_BURN_OTP_SCP_ERR 3 41 #define TEST_BURN_OTP_LCS_ERR 4 42 #define TEST_INVALID_PARAM_ERR 5 43 44 /* OTP memeory mapping */ 45 #define ENV_OTP_START_OFFSET 0x2000UL 46 #define TEST_OTP_SIZE_IN_WORDS 0x2C 47 #define MAX_OTP_SIZE_IN_WORDS 0x7FF 48 49 typedef enum otpHbkTypes_t{ 50 TEST_OTP_HBK0_TYPE = 1, //HBK0 51 TEST_OTP_HBK1_TYPE = 2, //HBK1 52 TEST_OTP_HBK_256_TYPE = 4, //HBK 53 }OtpHbkTypes_t; 54 55 #ifdef BIG__ENDIAN 56 #define TEST_CONVERT_BYTE_ARR_TO_WORD(inPtr, outWord) {\ 57 outWord = (*inPtr<<24);\ 58 outWord |= (*(inPtr+1)<<16);\ 59 outWord |= (*(inPtr+2)<<8);\ 60 outWord |= (*(inPtr+3));\ 61 } 62 #else 63 #define TEST_CONVERT_BYTE_ARR_TO_WORD(inPtr, outWord) {\ 64 outWord = (*(inPtr+3))<<24;\ 65 outWord |= (*(inPtr+2))<<16;\ 66 outWord |= (*(inPtr+1))<<8;\ 67 outWord |= (*inPtr);\ 68 } 69 #endif 70 71 72 #define TEST_CALC_BUFF_ZEROS(wordBuf, buffWordSize, zeros) {\ 73 int i = 0;\ 74 int j = 0;\ 75 int mask = 0;\ 76 zeros = 0;\ 77 for (i = 0; i< buffWordSize; i++) {\ 78 for (j = 0; j<32; j++) {\ 79 mask = 0x1;\ 80 if (!(*(wordBuf+i) & (mask << j))) {\ 81 zeros++;\ 82 }\ 83 }\ 84 }\ 85 } 86 87 88 89 #define READ_REG(offset) \ 90 *(volatile uint32_t *)(g_testHwRegBaseAddr + (offset)) 91 92 #define WRITE_REG(offset, val) { \ 93 volatile uint32_t ii1; \ 94 (*(volatile uint32_t *)(g_testHwRegBaseAddr + (offset))) = (uint32_t)(val); \ 95 for(ii1=0; ii1<500; ii1++); \ 96 } 97 98 #define WRITE_REG_OTP(offset, val) { \ 99 volatile uint32_t ii1; \ 100 (*(volatile uint32_t *)(g_testHwRegBaseAddr + CC_OTP_BASE_ADDR +(offset*sizeof(uint32_t)))) = (uint32_t)(val); \ 101 for(ii1=0; ii1<500; ii1++); \ 102 } 103 104 #define READ_REG_OTP(offset) \ 105 *(volatile uint32_t *)(g_testHwRegBaseAddr + CC_OTP_BASE_ADDR+ (offset)) 106 107 #define WRITE_ENV(offset, val) { \ 108 volatile uint32_t ii1; \ 109 (*(volatile uint32_t *)(g_testHwEnvBaseAddr + (offset))) = (uint32_t)(val); \ 110 for(ii1=0; ii1<500; ii1++);\ 111 } 112 113 #define READ_ENV(offset) \ 114 *(volatile uint32_t *)(g_testHwEnvBaseAddr + (offset)) 115 116 117 #define WRITE_OTP(wordOffset, val) { \ 118 volatile uint32_t ii1; \ 119 (*(volatile uint32_t *)(g_testHwEnvBaseAddr + ENV_OTP_START_OFFSET+ ((wordOffset)*sizeof(uint32_t)))) = (uint32_t)(val); \ 120 for(ii1=0; ii1<500; ii1++);\ 121 } 122 123 #define READ_OTP(wordOffset) \ 124 *(volatile uint32_t *)(g_testHwEnvBaseAddr + ENV_OTP_START_OFFSET + ((wordOffset)*sizeof(uint32_t))) 125 126 #ifdef DX_PLAT_ZYNQ7000 127 #define TST_SET_ENV_TO_SECURE() \ 128 do { \ 129 WRITE_ENV( DX_ENV_APB_PPROT_OVERRIDE_REG_OFFSET, 0x9); \ 130 }while(0) 131 #else 132 #define TST_SET_ENV_TO_SECURE() \ 133 do { \ 134 }while(0) 135 #endif 136 137 138 /* poll NVM register to be assure that the NVM boot is finished (and LCS and the keys are valid) */ 139 #define WAIT_NVM_IDLE(regVal) \ 140 do { \ 141 uint32_t regVal; \ 142 do { \ 143 regVal = READ_REG(CC_REG_OFFSET(HOST_RGF, NVM_IS_IDLE)); \ 144 regVal = CC_REG_FLD_GET(0, NVM_IS_IDLE, VALUE, regVal); \ 145 }while( !regVal ); \ 146 }while(0) 147 148 /* turn off DFA */ 149 #define TURN_DFA_OFF() {\ 150 uint32_t regVal; \ 151 regVal = READ_REG(CC_REG_OFFSET(HOST_RGF, HOST_AO_LOCK_BITS)); \ 152 CC_REG_FLD_SET(0, HOST_AO_LOCK_BITS, HOST_FORCE_DFA_ENABLE, regVal, 0); \ 153 CC_REG_FLD_SET(0, HOST_AO_LOCK_BITS, HOST_DFA_ENABLE_LOCK, regVal, 1); \ 154 WRITE_REG(CC_REG_OFFSET(HOST_RGF, HOST_AO_LOCK_BITS) ,regVal ); \ 155 WRITE_REG(CC_REG_OFFSET(HOST_RGF, AES_DFA_IS_ON) ,0 ); \ 156 } 157 158 159 #define SET_OTP_DCU_LOCK(otpBuff, val) {\ 160 uint32_t ii = 0; \ 161 for (ii = 0; ii < CC_OTP_DCU_SIZE_IN_WORDS; ii++) { \ 162 otpBuff[CC_OTP_DCU_OFFSET+ii] = val; \ 163 } \ 164 } 165 166 /* calc OTP memory length: 167 read RTL OTP address width. The supported sizes are 6 (for 2 Kbits),7,8,9,10,11 (for 64 Kbits). 168 convert value parameter to addresses of 32b words */ 169 #define GET_OTP_LENGTH(otpLength) \ 170 do { \ 171 otpLength = READ_REG(CC_REG_OFFSET(HOST_RGF, OTP_ADDR_WIDTH_DEF)); \ 172 otpLength = CC_REG_FLD_GET(0, OTP_ADDR_WIDTH_DEF, VALUE, otpLength); \ 173 otpLength = (1 << otpLength); \ 174 }while(0) 175 176 177 /******************************/ 178 /* function declaration */ 179 /*****************************/ 180 181 void performPowerOnReset(void); 182 unsigned int testBurnOtp(unsigned int *otp, unsigned int nextLcs); 183 void dumpOTP(void); 184 unsigned int testGetLcs(unsigned int *lcs); 185 unsigned int testGetOtpSize(unsigned int * size); 186 unsigned int testCheckLcs(unsigned int nextLcs); 187 unsigned int testCheckLcsAndError(unsigned int nextLcs); 188 189 // hash key 190 unsigned int testSetHbkInOtpBuff(unsigned int *otp, unsigned char *hbkBuff, OtpHbkTypes_t type); 191 192 // huk key 193 unsigned int testSetKdrInOtpBuff(unsigned int *otp, unsigned char *kdrBuff); 194 195 // OEM keys 196 unsigned int testSetKcpOtpBuff(unsigned int *otp, unsigned int *kpicvBuff); 197 unsigned int testSetKceOtpBuff(unsigned int *otp, unsigned int *kpicvBuff); 198 199 // ICV keys 200 unsigned int testSetKpicvInOtpBuff(unsigned int *otp, unsigned int *kpicvBuff); 201 unsigned int testSetKceicvOtpBuff(unsigned int *otp, unsigned int *kpicvBuff); 202 203 unsigned int testSetLcsOtpBuff(unsigned int *otpBuf, unsigned int lcsState); 204 205 uint32_t initPlatform(void); 206 void freePlatform(void); 207 208 #endif //__TST_HW_ACCESS_IOT_H__ 209
