1 /***************************************************************************//**
2  * @file
3  * @brief CMSIS Cortex-M4 System Layer for EFM32 devices.
4  *******************************************************************************
5  * # License
6  * <b>Copyright 2020 Silicon Laboratories Inc. www.silabs.com</b>
7  *******************************************************************************
8  *
9  * SPDX-License-Identifier: Zlib
10  *
11  * The licensor of this software is Silicon Laboratories Inc.
12  *
13  * This software is provided 'as-is', without any express or implied
14  * warranty. In no event will the authors be held liable for any damages
15  * arising from the use of this software.
16  *
17  * Permission is granted to anyone to use this software for any purpose,
18  * including commercial applications, and to alter it and redistribute it
19  * freely, subject to the following restrictions:
20  *
21  * 1. The origin of this software must not be misrepresented; you must not
22  *    claim that you wrote the original software. If you use this software
23  *    in a product, an acknowledgment in the product documentation would be
24  *    appreciated but is not required.
25  * 2. Altered source versions must be plainly marked as such, and must not be
26  *    misrepresented as being the original software.
27  * 3. This notice may not be removed or altered from any source distribution.
28  *
29  ******************************************************************************/
30 
31 #ifndef SYSTEM_EFM32_H
32 #define SYSTEM_EFM32_H
33 
34 #ifdef __cplusplus
35 extern "C" {
36 #endif
37 
38 #include <stdint.h>
39 
40 /***************************************************************************//**
41  * @addtogroup Parts
42  * @{
43  ******************************************************************************/
44 /***************************************************************************//**
45  * @addtogroup EFM32GG11B EFM32GG11B
46  * @{
47  ******************************************************************************/
48 
49 /*******************************************************************************
50  ******************************   TYPEDEFS   ***********************************
51  ******************************************************************************/
52 
53 /* Interrupt vectortable entry */
54 typedef union {
55   void (*pFunc)(void);
56   void *topOfStack;
57 } tVectorEntry;
58 
59 /*******************************************************************************
60  **************************   GLOBAL VARIABLES   *******************************
61  ******************************************************************************/
62 
63 extern uint32_t SystemCoreClock;    /**< System Clock Frequency (Core Clock) */
64 extern uint32_t SystemHfrcoFreq;    /**< System HFRCO frequency */
65 
66 #if defined(__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
67 #if defined(__ICCARM__)    /* IAR requires the __vector_table symbol */
68 #define __Vectors    __vector_table
69 #endif
70 extern const tVectorEntry __Vectors[];
71 #endif
72 
73 /*******************************************************************************
74  *****************************   PROTOTYPES   **********************************
75  ******************************************************************************/
76 
77 void Reset_Handler(void);           /**< Reset Handler */
78 void NMI_Handler(void);             /**< NMI Handler */
79 void HardFault_Handler(void);       /**< Hard Fault Handler */
80 void MemManage_Handler(void);       /**< MPU Fault Handler */
81 void BusFault_Handler(void);        /**< Bus Fault Handler */
82 void UsageFault_Handler(void);      /**< Usage Fault Handler */
83 void SVC_Handler(void);             /**< SVCall Handler */
84 void DebugMon_Handler(void);        /**< Debug Monitor Handler */
85 void PendSV_Handler(void);          /**< PendSV Handler */
86 void SysTick_Handler(void);         /**< SysTick Handler */
87 
88 void EMU_IRQHandler(void);          /**< EMU IRQ Handler */
89 void WDOG0_IRQHandler(void);        /**< WDOG0 IRQ Handler */
90 void LDMA_IRQHandler(void);         /**< LDMA IRQ Handler */
91 void GPIO_EVEN_IRQHandler(void);    /**< GPIO_EVEN IRQ Handler */
92 void SMU_IRQHandler(void);          /**< SMU IRQ Handler */
93 void TIMER0_IRQHandler(void);       /**< TIMER0 IRQ Handler */
94 void USART0_RX_IRQHandler(void);    /**< USART0_RX IRQ Handler */
95 void USART0_TX_IRQHandler(void);    /**< USART0_TX IRQ Handler */
96 void ACMP0_IRQHandler(void);        /**< ACMP0 IRQ Handler */
97 void ADC0_IRQHandler(void);         /**< ADC0 IRQ Handler */
98 void IDAC0_IRQHandler(void);        /**< IDAC0 IRQ Handler */
99 void I2C0_IRQHandler(void);         /**< I2C0 IRQ Handler */
100 void I2C1_IRQHandler(void);         /**< I2C1 IRQ Handler */
101 void GPIO_ODD_IRQHandler(void);     /**< GPIO_ODD IRQ Handler */
102 void TIMER1_IRQHandler(void);       /**< TIMER1 IRQ Handler */
103 void TIMER2_IRQHandler(void);       /**< TIMER2 IRQ Handler */
104 void TIMER3_IRQHandler(void);       /**< TIMER3 IRQ Handler */
105 void USART1_RX_IRQHandler(void);    /**< USART1_RX IRQ Handler */
106 void USART1_TX_IRQHandler(void);    /**< USART1_TX IRQ Handler */
107 void USART2_RX_IRQHandler(void);    /**< USART2_RX IRQ Handler */
108 void USART2_TX_IRQHandler(void);    /**< USART2_TX IRQ Handler */
109 void UART0_RX_IRQHandler(void);     /**< UART0_RX IRQ Handler */
110 void UART0_TX_IRQHandler(void);     /**< UART0_TX IRQ Handler */
111 void UART1_RX_IRQHandler(void);     /**< UART1_RX IRQ Handler */
112 void UART1_TX_IRQHandler(void);     /**< UART1_TX IRQ Handler */
113 void LEUART0_IRQHandler(void);      /**< LEUART0 IRQ Handler */
114 void LEUART1_IRQHandler(void);      /**< LEUART1 IRQ Handler */
115 void LETIMER0_IRQHandler(void);     /**< LETIMER0 IRQ Handler */
116 void PCNT0_IRQHandler(void);        /**< PCNT0 IRQ Handler */
117 void PCNT1_IRQHandler(void);        /**< PCNT1 IRQ Handler */
118 void PCNT2_IRQHandler(void);        /**< PCNT2 IRQ Handler */
119 void RTCC_IRQHandler(void);         /**< RTCC IRQ Handler */
120 void CMU_IRQHandler(void);          /**< CMU IRQ Handler */
121 void MSC_IRQHandler(void);          /**< MSC IRQ Handler */
122 void CRYPTO0_IRQHandler(void);      /**< CRYPTO0 IRQ Handler */
123 void CRYOTIMER_IRQHandler(void);    /**< CRYOTIMER IRQ Handler */
124 void FPUEH_IRQHandler(void);        /**< FPUEH IRQ Handler */
125 void USART3_RX_IRQHandler(void);    /**< USART3_RX IRQ Handler */
126 void USART3_TX_IRQHandler(void);    /**< USART3_TX IRQ Handler */
127 void USART4_RX_IRQHandler(void);    /**< USART4_RX IRQ Handler */
128 void USART4_TX_IRQHandler(void);    /**< USART4_TX IRQ Handler */
129 void WTIMER0_IRQHandler(void);      /**< WTIMER0 IRQ Handler */
130 void WTIMER1_IRQHandler(void);      /**< WTIMER1 IRQ Handler */
131 void WTIMER2_IRQHandler(void);      /**< WTIMER2 IRQ Handler */
132 void WTIMER3_IRQHandler(void);      /**< WTIMER3 IRQ Handler */
133 void I2C2_IRQHandler(void);         /**< I2C2 IRQ Handler */
134 void VDAC0_IRQHandler(void);        /**< VDAC0 IRQ Handler */
135 void TIMER4_IRQHandler(void);       /**< TIMER4 IRQ Handler */
136 void TIMER5_IRQHandler(void);       /**< TIMER5 IRQ Handler */
137 void TIMER6_IRQHandler(void);       /**< TIMER6 IRQ Handler */
138 void USART5_RX_IRQHandler(void);    /**< USART5_RX IRQ Handler */
139 void USART5_TX_IRQHandler(void);    /**< USART5_TX IRQ Handler */
140 void CSEN_IRQHandler(void);         /**< CSEN IRQ Handler */
141 void LESENSE_IRQHandler(void);      /**< LESENSE IRQ Handler */
142 void EBI_IRQHandler(void);          /**< EBI IRQ Handler */
143 void ACMP2_IRQHandler(void);        /**< ACMP2 IRQ Handler */
144 void ADC1_IRQHandler(void);         /**< ADC1 IRQ Handler */
145 void LCD_IRQHandler(void);          /**< LCD IRQ Handler */
146 void SDIO_IRQHandler(void);         /**< SDIO IRQ Handler */
147 void ETH_IRQHandler(void);          /**< ETH IRQ Handler */
148 void CAN0_IRQHandler(void);         /**< CAN0 IRQ Handler */
149 void CAN1_IRQHandler(void);         /**< CAN1 IRQ Handler */
150 void USB_IRQHandler(void);          /**< USB IRQ Handler */
151 void RTC_IRQHandler(void);          /**< RTC IRQ Handler */
152 void WDOG1_IRQHandler(void);        /**< WDOG1 IRQ Handler */
153 void LETIMER1_IRQHandler(void);     /**< LETIMER1 IRQ Handler */
154 void TRNG0_IRQHandler(void);        /**< TRNG0 IRQ Handler */
155 void QSPI0_IRQHandler(void);        /**< QSPI0 IRQ Handler */
156 
157 uint32_t SystemCoreClockGet(void);
158 
159 /***************************************************************************//**
160  * @brief
161  *   Update CMSIS SystemCoreClock variable.
162  *
163  * @details
164  *   CMSIS defines a global variable SystemCoreClock that shall hold the
165  *   core frequency in Hz. If the core frequency is dynamically changed, the
166  *   variable must be kept updated in order to be CMSIS compliant.
167  *
168  *   Notice that only if changing the core clock frequency through the EFM32 CMU
169  *   API, this variable will be kept updated. This function is only provided
170  *   for CMSIS compliance and if a user modifies the the core clock outside
171  *   the CMU API.
172  ******************************************************************************/
SystemCoreClockUpdate(void)173 static __INLINE void SystemCoreClockUpdate(void)
174 {
175   (void)SystemCoreClockGet();
176 }
177 
178 uint32_t SystemMaxCoreClockGet(void);
179 
180 void SystemInit(void);
181 uint32_t SystemHFClockGet(void);
182 
183 uint32_t SystemHFXOClockGet(void);
184 void SystemHFXOClockSet(uint32_t freq);
185 
186 uint32_t SystemLFRCOClockGet(void);
187 uint32_t SystemULFRCOClockGet(void);
188 
189 uint32_t SystemLFXOClockGet(void);
190 void SystemLFXOClockSet(uint32_t freq);
191 
192 /** @} End of group */
193 /** @} End of group Parts */
194 
195 #ifdef __cplusplus
196 }
197 #endif
198 #endif /* SYSTEM_EFM32_H */
199