1 /*
2 ** ###################################################################
3 **     Processors:          MIMX9352AVTXM_cm33
4 **                          MIMX9352CVVXM_cm33
5 **                          MIMX9352DVVXM_cm33
6 **                          MIMX9352XVVXM_cm33
7 **
8 **     Compilers:           GNU C Compiler
9 **                          IAR ANSI C/C++ Compiler for ARM
10 **                          Keil ARM C/C++ Compiler
11 **
12 **     Reference manual:    IMX93RM, Internal, November. 2021
13 **     Version:             rev. 1.0, 2021-11-16
14 **     Build:               b231019
15 **
16 **     Abstract:
17 **         Provides a system configuration function and a global variable that
18 **         contains the system frequency. It configures the device and initializes
19 **         the oscillator (PLL) that is part of the microcontroller device.
20 **
21 **     Copyright 2016 Freescale Semiconductor, Inc.
22 **     Copyright 2016-2023 NXP
23 **     SPDX-License-Identifier: BSD-3-Clause
24 **
25 **     http:                 www.nxp.com
26 **     mail:                 support@nxp.com
27 **
28 **     Revisions:
29 **     - rev. 1.0 (2021-11-16)
30 **         Initial version.
31 **
32 ** ###################################################################
33 */
34 
35 #include "system_MIMX9352_cm33.h"
36 
37 /* ----------------------------------------------------------------------------
38    -- Core clock
39    ---------------------------------------------------------------------------- */
40 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
41 
42 /* ----------------------------------------------------------------------------
43    -- SystemInit()
44    ---------------------------------------------------------------------------- */
45 
SystemInit(void)46 void SystemInit(void)
47 {
48 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
49     SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access in Secure mode */
50 #if defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
51     SCB_NS->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10, CP11 Full Access in Non-secure mode */
52 #endif                                                    /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
53 #endif                                                    /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
54 
55     SystemInitHook();
56 }
57 
58 /* ----------------------------------------------------------------------------
59    -- SystemInitHook()
60    ---------------------------------------------------------------------------- */
61 
SystemInitHook(void)62 __attribute__((weak)) void SystemInitHook(void)
63 {
64     /* Void implementation of the weak function. */
65 }
66 
67 /* ----------------------------------------------------------------------------
68    -- SystemCoreClockUpdate()
69    ---------------------------------------------------------------------------- */
70 
SystemCoreClockUpdate(void)71 void SystemCoreClockUpdate(void)
72 {
73 }
74