1 /*
2 ** ###################################################################
3 ** Processors: LPC55S36JBD100
4 ** LPC55S36JHI48
5 **
6 ** Compilers: GNU C Compiler
7 ** IAR ANSI C/C++ Compiler for ARM
8 ** Keil ARM C/C++ Compiler
9 ** MCUXpresso Compiler
10 **
11 ** Reference manual: LPC55S3x Reference Manual Rev. DraftG, 07/2021
12 ** Version: rev. 1.1, 2021-08-04
13 ** Build: b230705
14 **
15 ** Abstract:
16 ** Provides a system configuration function and a global variable that
17 ** contains the system frequency. It configures the device and initializes
18 ** the oscillator (PLL) that is part of the microcontroller device.
19 **
20 ** Copyright 2016 Freescale Semiconductor, Inc.
21 ** Copyright 2016-2023 NXP
22 ** SPDX-License-Identifier: BSD-3-Clause
23 **
24 ** http: www.nxp.com
25 ** mail: support@nxp.com
26 **
27 ** Revisions:
28 ** - rev. 1.0 (2021-04-12)
29 ** Initial version based on RM DraftF
30 ** - rev. 1.1 (2021-08-04)
31 ** Initial version based on RM DraftG
32 **
33 ** ###################################################################
34 */
35
36 /*!
37 * @file LPC55S36
38 * @version 1.1
39 * @date 2021-08-04
40 * @brief Device specific configuration file for LPC55S36 (implementation file)
41 *
42 * Provides a system configuration function and a global variable that contains
43 * the system frequency. It configures the device and initializes the oscillator
44 * (PLL) that is part of the microcontroller device.
45 */
46
47 #include <stdint.h>
48 #include "fsl_device_registers.h"
49
50
51
52 /* ----------------------------------------------------------------------------
53 -- Core clock
54 ---------------------------------------------------------------------------- */
55
56 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
57
58 /* ----------------------------------------------------------------------------
59 -- SystemInit()
60 ---------------------------------------------------------------------------- */
61
SystemInit(void)62 __attribute__ ((weak)) void SystemInit (void) {
63 #if ((__FPU_PRESENT == 1) && (__FPU_USED == 1))
64 SCB->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Secure mode */
65 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
66 SCB_NS->CPACR |= ((3UL << 10*2) | (3UL << 11*2)); /* set CP10, CP11 Full Access in Non-secure mode */
67 #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
68 #endif /* ((__FPU_PRESENT == 1) && (__FPU_USED == 1)) */
69
70 SCB->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
71 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
72 SCB_NS->CPACR |= ((3UL << 0*2) | (3UL << 1*2)); /* set CP0, CP1 Full Access in Normal mode (enable PowerQuad) */
73 #endif /* (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
74
75 SCB->NSACR |= ((3UL << 0) | (3UL << 10)); /* enable CP0, CP1, CP10, CP11 Non-secure Access */
76
77 #if defined(__MCUXPRESSO)
78 extern void(*const g_pfnVectors[]) (void);
79 SCB->VTOR = (uint32_t) &g_pfnVectors;
80 #else
81 extern void *__Vectors;
82 SCB->VTOR = (uint32_t) &__Vectors;
83 #endif
84 SYSCON->TRACECLKDIV = 0;
85 /* Optionally enable RAM banks that may be off by default at reset */
86 #if !defined(DONT_ENABLE_DISABLED_RAMBANKS)
87 SYSCON->AHBCLKCTRLSET[0] = SYSCON_AHBCLKCTRL0_SRAM_CTRL1_MASK | SYSCON_AHBCLKCTRL0_SRAM_CTRL2_MASK
88 | SYSCON_AHBCLKCTRL0_SRAM_CTRL3_MASK | SYSCON_AHBCLKCTRL0_SRAM_CTRL4_MASK;
89 #endif
90 /* enable the flash cache LPCAC */
91 SYSCON->LPCAC_CTRL &= ~SYSCON_LPCAC_CTRL_DIS_LPCAC_MASK;
92
93 /* De-select GDET as source for CHIP_RESET */
94 ITRC0->OUT_SEL[4][0] = 0xAAAAAAAAUL;
95 ITRC0->OUT_SEL[4][1] = 0xAAAAAAAAUL;
96 /* Disable GDET_IRQ (bit 1) in ELS_INT_ENABLE */
97 ELS->ELS_INT_ENABLE &= ~S50_ELS_INT_ENABLE_GDET_INT_EN_MASK;
98 SystemInitHook();
99 }
100
101 /* ----------------------------------------------------------------------------
102 -- SystemCoreClockUpdate()
103 ---------------------------------------------------------------------------- */
104
SystemCoreClockUpdate(void)105 void SystemCoreClockUpdate (void) {
106
107 }
108
109 /* ----------------------------------------------------------------------------
110 -- SystemInitHook()
111 ---------------------------------------------------------------------------- */
112
SystemInitHook(void)113 __attribute__ ((weak)) void SystemInitHook (void) {
114 /* Void implementation of the weak function. */
115 }
116
