1 /*
2 ** ###################################################################
3 **     Processors:          K32L2A31VLH1A
4 **                          K32L2A31VLL1A
5 **
6 **     Compilers:           Freescale C/C++ for Embedded ARM
7 **                          GNU C Compiler
8 **                          IAR ANSI C/C++ Compiler for ARM
9 **                          Keil ARM C/C++ Compiler
10 **                          MCUXpresso Compiler
11 **
12 **     Reference manual:    K32L2AxRM, Rev. 1, 12/2019
13 **     Version:             rev. 1.0, 2019-10-30
14 **     Build:               b201013
15 **
16 **     Abstract:
17 **         Provides a system configuration function and a global variable that
18 **         contains the system frequency. It configures the device and initializes
19 **         the oscillator (PLL) that is part of the microcontroller device.
20 **
21 **     Copyright 2016 Freescale Semiconductor, Inc.
22 **     Copyright 2016-2020 NXP
23 **     All rights reserved.
24 **
25 **     SPDX-License-Identifier: BSD-3-Clause
26 **
27 **     http:                 www.nxp.com
28 **     mail:                 support@nxp.com
29 **
30 **     Revisions:
31 **     - rev. 1.0 (2019-10-30)
32 **         Initial version.
33 **
34 ** ###################################################################
35 */
36 
37 /*!
38  * @file K32L2A31A
39  * @version 1.0
40  * @date 2019-10-30
41  * @brief Device specific configuration file for K32L2A31A (implementation file)
42  *
43  * Provides a system configuration function and a global variable that contains
44  * the system frequency. It configures the device and initializes the oscillator
45  * (PLL) that is part of the microcontroller device.
46  */
47 
48 #include <stdint.h>
49 #include "fsl_device_registers.h"
50 
51 /* ----------------------------------------------------------------------------
52    -- Core clock
53    ---------------------------------------------------------------------------- */
54 
55 uint32_t SystemCoreClock = DEFAULT_SYSTEM_CLOCK;
56 
57 /* ----------------------------------------------------------------------------
58    -- SystemInit()
59    ---------------------------------------------------------------------------- */
60 
SystemInit(void)61 void SystemInit(void)
62 {
63 #if (DISABLE_WDOG)
64     if ((WDOG0->CS & WDOG_CS_CMD32EN_MASK) != 0U)
65     {
66         WDOG0->CNT = WDOG_UPDATE_KEY;
67     }
68     else
69     {
70         WDOG0->CNT = WDOG_UPDATE_KEY & 0xFFFFU;
71         WDOG0->CNT = (WDOG_UPDATE_KEY >> 16U) & 0xFFFFU;
72     }
73     WDOG0->TOVAL = 0xFFFFU;
74     WDOG0->CS    = (uint32_t)((WDOG0->CS) & ~WDOG_CS_EN_MASK) | WDOG_CS_UPDATE_MASK;
75 #endif /* (DISABLE_WDOG) */
76 
77     SystemInitHook();
78 }
79 
80 /* ----------------------------------------------------------------------------
81    -- SystemCoreClockUpdate()
82    ---------------------------------------------------------------------------- */
83 
SystemCoreClockUpdate(void)84 void SystemCoreClockUpdate(void)
85 {
86     uint32_t SCGOUTClock; /* Variable to store output clock frequency of the SCG module */
87     uint16_t Divider, prediv, multi;
88     Divider = (uint16_t)(((SCG->CSR & SCG_CSR_DIVCORE_MASK) >> SCG_CSR_DIVCORE_SHIFT) + 1U);
89 
90     switch ((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT)
91     {
92         case 0x1:
93             /* System OSC */
94             SCGOUTClock = CPU_XTAL_CLK_HZ;
95             break;
96         case 0x2:
97             /* Slow IRC */
98             SCGOUTClock =
99                 ((((SCG->SIRCCFG & SCG_SIRCCFG_RANGE_MASK) >> SCG_SIRCCFG_RANGE_SHIFT) != 0U) ? 8000000U : 2000000U);
100             break;
101         case 0x3:
102             /* Fast IRC */
103             SCGOUTClock = 48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000U;
104             break;
105         case 0x6:
106             /* System PLL */
107             if (((SCG->SPLLCFG & SCG_SPLLCFG_SOURCE_MASK) >> SCG_SPLLCFG_SOURCE_SHIFT) != 0U)
108             {
109                 SCGOUTClock =
110                     48000000U + ((SCG->FIRCCFG & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_RANGE_SHIFT) * 4000000U;
111             }
112             else
113             {
114                 SCGOUTClock = CPU_XTAL_CLK_HZ;
115             }
116             prediv      = (uint16_t)(((SCG->SPLLCFG & SCG_SPLLCFG_PREDIV_MASK) >> SCG_SPLLCFG_PREDIV_SHIFT) + 1U);
117             multi       = (uint16_t)(((SCG->SPLLCFG & SCG_SPLLCFG_MULT_MASK) >> SCG_SPLLCFG_MULT_SHIFT) + 16U);
118             SCGOUTClock = SCGOUTClock * multi / (prediv * 2U);
119             break;
120         default:
121             SCGOUTClock = 0U;
122             break;
123     }
124     SystemCoreClock = (SCGOUTClock / Divider);
125 }
126 
127 /* ----------------------------------------------------------------------------
128    -- SystemInitHook()
129    ---------------------------------------------------------------------------- */
130 
SystemInitHook(void)131 __attribute__((weak)) void SystemInitHook(void)
132 {
133     /* Void implementation of the weak function. */
134 }
135