1 /**
2 ******************************************************************************
3 * @file stm32wlxx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2020 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef __STM32WLxx_LL_EXTI_H
21 #define __STM32WLxx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wlxx.h"
29
30 /** @addtogroup STM32WLxx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /* Private Macros ------------------------------------------------------------*/
44 #if defined(USE_FULL_LL_DRIVER)
45 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
46 * @{
47 */
48 /**
49 * @}
50 */
51 #endif /*USE_FULL_LL_DRIVER*/
52 /* Exported types ------------------------------------------------------------*/
53 #if defined(USE_FULL_LL_DRIVER)
54 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
55 * @{
56 */
57 typedef struct
58 {
59
60 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
61 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
62
63 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
64 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
65
66 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
67 This parameter can be set either to ENABLE or DISABLE */
68
69 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
70 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
71
72 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
73 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
74 } LL_EXTI_InitTypeDef;
75
76 /**
77 * @}
78 */
79 #endif /*USE_FULL_LL_DRIVER*/
80
81 /* Exported constants --------------------------------------------------------*/
82 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
83 * @{
84 */
85
86 /** @defgroup EXTI_LL_EC_LINE LINE
87 * @{
88 */
89 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
90 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
91 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
92 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
93 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
94 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
95 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
96 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
97 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
98 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
99 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
100 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
101 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
102 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
103 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
104 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
105 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
106 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
107 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
108 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
109 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
110 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
111 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
112 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
113 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
114 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
115 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
116 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
117 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
118 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
119 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
120 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
121 #define LL_EXTI_LINE_ALL_0_31 0xFFFFFFFFU /*!< All Extended line not reserved*/
122
123 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
124 #if defined(DUAL_CORE)
125 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
126 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
127 #endif /* DUAL_CORE */
128 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
129 #if defined(DUAL_CORE)
130 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
131 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
132 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
133 #endif /* DUAL_CORE */
134 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
135 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */
136 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */
137 #define LL_EXTI_LINE_45 EXTI_IMR2_IM45 /*!< Extended line 45 */
138 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */
139 #if defined(DUAL_CORE)
140 #define LL_EXTI_LINE_ALL_32_63 (EXTI_IMR2_IM34 | EXTI_IMR2_IM36 | EXTI_IMR2_IM37 | \
141 EXTI_IMR2_IM38 | EXTI_IMR2_IM39 | EXTI_IMR2_IM40 | \
142 EXTI_IMR2_IM41 | EXTI_IMR2_IM42 | EXTI_IMR2_IM43 | \
143 EXTI_IMR2_IM44 | EXTI_IMR2_IM45 | EXTI_IMR2_IM46) /*!< All Extended line not reserved*/
144 #else
145 #define LL_EXTI_LINE_ALL_32_63 (EXTI_IMR2_IM34 | EXTI_IMR2_IM38 | EXTI_IMR2_IM42 | \
146 EXTI_IMR2_IM43 | EXTI_IMR2_IM44 | EXTI_IMR2_IM45 | \
147 EXTI_IMR2_IM46) /*!< All Extended line not reserved*/
148 #endif /* DUAL_CORE */
149
150 #if defined(USE_FULL_LL_DRIVER)
151 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
152 #endif /*USE_FULL_LL_DRIVER*/
153
154 /**
155 * @}
156 */
157 #if defined(USE_FULL_LL_DRIVER)
158 /** @defgroup EXTI_LL_EC_MODE Mode
159 * @{
160 */
161 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
162 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
163 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
164 /**
165 * @}
166 */
167
168 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
169 * @{
170 */
171 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
172 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
173 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
174 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
175 /**
176 * @}
177 */
178 #endif /*USE_FULL_LL_DRIVER*/
179
180 /**
181 * @}
182 */
183
184 /* Exported macro ------------------------------------------------------------*/
185 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
186 * @{
187 */
188
189 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
190 * @{
191 */
192
193 /**
194 * @brief Write a value in EXTI register
195 * @param __REG__ Register to be written
196 * @param __VALUE__ Value to be written in the register
197 * @retval None
198 */
199 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
200
201 /**
202 * @brief Read a value in EXTI register
203 * @param __REG__ Register to be read
204 * @retval Register value
205 */
206 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
207 /**
208 * @}
209 */
210
211
212 /**
213 * @}
214 */
215
216
217
218 /* Exported functions --------------------------------------------------------*/
219 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
220 * @{
221 */
222 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
223 * @{
224 */
225
226 /**
227 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
228 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
229 * @param ExtiLine This parameter can be one of the following values:
230 * @arg @ref LL_EXTI_LINE_0
231 * @arg @ref LL_EXTI_LINE_1
232 * @arg @ref LL_EXTI_LINE_2
233 * @arg @ref LL_EXTI_LINE_3
234 * @arg @ref LL_EXTI_LINE_4
235 * @arg @ref LL_EXTI_LINE_5
236 * @arg @ref LL_EXTI_LINE_6
237 * @arg @ref LL_EXTI_LINE_7
238 * @arg @ref LL_EXTI_LINE_8
239 * @arg @ref LL_EXTI_LINE_9
240 * @arg @ref LL_EXTI_LINE_10
241 * @arg @ref LL_EXTI_LINE_11
242 * @arg @ref LL_EXTI_LINE_12
243 * @arg @ref LL_EXTI_LINE_13
244 * @arg @ref LL_EXTI_LINE_14
245 * @arg @ref LL_EXTI_LINE_15
246 * @arg @ref LL_EXTI_LINE_16
247 * @arg @ref LL_EXTI_LINE_17
248 * @arg @ref LL_EXTI_LINE_18
249 * @arg @ref LL_EXTI_LINE_19
250 * @arg @ref LL_EXTI_LINE_20
251 * @arg @ref LL_EXTI_LINE_21
252 * @arg @ref LL_EXTI_LINE_22
253 * @arg @ref LL_EXTI_LINE_23
254 * @arg @ref LL_EXTI_LINE_24
255 * @arg @ref LL_EXTI_LINE_25
256 * @arg @ref LL_EXTI_LINE_26
257 * @arg @ref LL_EXTI_LINE_27
258 * @arg @ref LL_EXTI_LINE_28
259 * @arg @ref LL_EXTI_LINE_29
260 * @arg @ref LL_EXTI_LINE_30
261 * @arg @ref LL_EXTI_LINE_31
262 * @arg @ref LL_EXTI_LINE_ALL_0_31
263 * @retval None
264 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)265 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
266 {
267 SET_BIT(EXTI->IMR1, ExtiLine);
268 }
269
270 #if defined(DUAL_CORE)
271 /**
272 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
273 * @rmtoll C2IMR1 IMx LL_C2_EXTI_EnableIT_0_31
274 * @param ExtiLine This parameter can be one of the following values:
275 * @arg @ref LL_EXTI_LINE_0
276 * @arg @ref LL_EXTI_LINE_1
277 * @arg @ref LL_EXTI_LINE_2
278 * @arg @ref LL_EXTI_LINE_3
279 * @arg @ref LL_EXTI_LINE_4
280 * @arg @ref LL_EXTI_LINE_5
281 * @arg @ref LL_EXTI_LINE_6
282 * @arg @ref LL_EXTI_LINE_7
283 * @arg @ref LL_EXTI_LINE_8
284 * @arg @ref LL_EXTI_LINE_9
285 * @arg @ref LL_EXTI_LINE_10
286 * @arg @ref LL_EXTI_LINE_11
287 * @arg @ref LL_EXTI_LINE_12
288 * @arg @ref LL_EXTI_LINE_13
289 * @arg @ref LL_EXTI_LINE_14
290 * @arg @ref LL_EXTI_LINE_15
291 * @arg @ref LL_EXTI_LINE_16
292 * @arg @ref LL_EXTI_LINE_17
293 * @arg @ref LL_EXTI_LINE_18
294 * @arg @ref LL_EXTI_LINE_19
295 * @arg @ref LL_EXTI_LINE_20
296 * @arg @ref LL_EXTI_LINE_21
297 * @arg @ref LL_EXTI_LINE_22
298 * @arg @ref LL_EXTI_LINE_23
299 * @arg @ref LL_EXTI_LINE_24
300 * @arg @ref LL_EXTI_LINE_25
301 * @arg @ref LL_EXTI_LINE_26
302 * @arg @ref LL_EXTI_LINE_27
303 * @arg @ref LL_EXTI_LINE_28
304 * @arg @ref LL_EXTI_LINE_29
305 * @arg @ref LL_EXTI_LINE_30
306 * @arg @ref LL_EXTI_LINE_31
307 * @arg @ref LL_EXTI_LINE_ALL_0_31
308 * @retval None
309 */
LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)310 __STATIC_INLINE void LL_C2_EXTI_EnableIT_0_31(uint32_t ExtiLine)
311 {
312 SET_BIT(EXTI->C2IMR1, ExtiLine);
313 }
314 #endif /* DUAL_CORE */
315
316 /**
317 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
318 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
319 * @param ExtiLine This parameter can be one of the following values:
320 * @arg @ref LL_EXTI_LINE_34
321 * @arg @ref LL_EXTI_LINE_36 (*)
322 * @arg @ref LL_EXTI_LINE_37 (*)
323 * @arg @ref LL_EXTI_LINE_38
324 * @arg @ref LL_EXTI_LINE_39 (*)
325 * @arg @ref LL_EXTI_LINE_40 (*)
326 * @arg @ref LL_EXTI_LINE_41 (*)
327 * @arg @ref LL_EXTI_LINE_42
328 * @arg @ref LL_EXTI_LINE_43
329 * @arg @ref LL_EXTI_LINE_44
330 * @arg @ref LL_EXTI_LINE_45
331 * @arg @ref LL_EXTI_LINE_46
332 * @arg @ref LL_EXTI_LINE_ALL_32_63
333 * (*) value not defined in all devices
334 * @retval None
335 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)336 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
337 {
338 SET_BIT(EXTI->IMR2, ExtiLine);
339 }
340
341 #if defined(DUAL_CORE)
342 /**
343 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
344 * @rmtoll C2IMR2 IMx LL_C2_EXTI_EnableIT_32_63
345 * @param ExtiLine This parameter can be one of the following values:
346 * @arg @ref LL_EXTI_LINE_34
347 * @arg @ref LL_EXTI_LINE_36 (*)
348 * @arg @ref LL_EXTI_LINE_37 (*)
349 * @arg @ref LL_EXTI_LINE_38
350 * @arg @ref LL_EXTI_LINE_39 (*)
351 * @arg @ref LL_EXTI_LINE_40 (*)
352 * @arg @ref LL_EXTI_LINE_41 (*)
353 * @arg @ref LL_EXTI_LINE_42
354 * @arg @ref LL_EXTI_LINE_43
355 * @arg @ref LL_EXTI_LINE_44
356 * @arg @ref LL_EXTI_LINE_45
357 * @arg @ref LL_EXTI_LINE_46
358 * @arg @ref LL_EXTI_LINE_ALL_32_63
359 * (*) value not defined in all devices
360 * @retval None
361 */
LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)362 __STATIC_INLINE void LL_C2_EXTI_EnableIT_32_63(uint32_t ExtiLine)
363 {
364 SET_BIT(EXTI->C2IMR2, ExtiLine);
365 }
366 #endif /* DUAL_CORE */
367
368 /**
369 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
370 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
371 * @param ExtiLine This parameter can be one of the following values:
372 * @arg @ref LL_EXTI_LINE_0
373 * @arg @ref LL_EXTI_LINE_1
374 * @arg @ref LL_EXTI_LINE_2
375 * @arg @ref LL_EXTI_LINE_3
376 * @arg @ref LL_EXTI_LINE_4
377 * @arg @ref LL_EXTI_LINE_5
378 * @arg @ref LL_EXTI_LINE_6
379 * @arg @ref LL_EXTI_LINE_7
380 * @arg @ref LL_EXTI_LINE_8
381 * @arg @ref LL_EXTI_LINE_9
382 * @arg @ref LL_EXTI_LINE_10
383 * @arg @ref LL_EXTI_LINE_11
384 * @arg @ref LL_EXTI_LINE_12
385 * @arg @ref LL_EXTI_LINE_13
386 * @arg @ref LL_EXTI_LINE_14
387 * @arg @ref LL_EXTI_LINE_15
388 * @arg @ref LL_EXTI_LINE_16
389 * @arg @ref LL_EXTI_LINE_17
390 * @arg @ref LL_EXTI_LINE_18
391 * @arg @ref LL_EXTI_LINE_19
392 * @arg @ref LL_EXTI_LINE_20
393 * @arg @ref LL_EXTI_LINE_21
394 * @arg @ref LL_EXTI_LINE_22
395 * @arg @ref LL_EXTI_LINE_23
396 * @arg @ref LL_EXTI_LINE_24
397 * @arg @ref LL_EXTI_LINE_25
398 * @arg @ref LL_EXTI_LINE_26
399 * @arg @ref LL_EXTI_LINE_27
400 * @arg @ref LL_EXTI_LINE_28
401 * @arg @ref LL_EXTI_LINE_29
402 * @arg @ref LL_EXTI_LINE_30
403 * @arg @ref LL_EXTI_LINE_31
404 * @arg @ref LL_EXTI_LINE_ALL_0_31
405 * @retval None
406 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)407 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
408 {
409 CLEAR_BIT(EXTI->IMR1, ExtiLine);
410 }
411
412 #if defined(DUAL_CORE)
413 /**
414 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31 for cpu2
415 * @rmtoll C2IMR1 IMx LL_C2_EXTI_DisableIT_0_31
416 * @param ExtiLine This parameter can be one of the following values:
417 * @arg @ref LL_EXTI_LINE_0
418 * @arg @ref LL_EXTI_LINE_1
419 * @arg @ref LL_EXTI_LINE_2
420 * @arg @ref LL_EXTI_LINE_3
421 * @arg @ref LL_EXTI_LINE_4
422 * @arg @ref LL_EXTI_LINE_5
423 * @arg @ref LL_EXTI_LINE_6
424 * @arg @ref LL_EXTI_LINE_7
425 * @arg @ref LL_EXTI_LINE_8
426 * @arg @ref LL_EXTI_LINE_9
427 * @arg @ref LL_EXTI_LINE_10
428 * @arg @ref LL_EXTI_LINE_11
429 * @arg @ref LL_EXTI_LINE_12
430 * @arg @ref LL_EXTI_LINE_13
431 * @arg @ref LL_EXTI_LINE_14
432 * @arg @ref LL_EXTI_LINE_15
433 * @arg @ref LL_EXTI_LINE_16
434 * @arg @ref LL_EXTI_LINE_17
435 * @arg @ref LL_EXTI_LINE_18
436 * @arg @ref LL_EXTI_LINE_19
437 * @arg @ref LL_EXTI_LINE_20
438 * @arg @ref LL_EXTI_LINE_21
439 * @arg @ref LL_EXTI_LINE_22
440 * @arg @ref LL_EXTI_LINE_23
441 * @arg @ref LL_EXTI_LINE_24
442 * @arg @ref LL_EXTI_LINE_25
443 * @arg @ref LL_EXTI_LINE_26
444 * @arg @ref LL_EXTI_LINE_27
445 * @arg @ref LL_EXTI_LINE_28
446 * @arg @ref LL_EXTI_LINE_29
447 * @arg @ref LL_EXTI_LINE_30
448 * @arg @ref LL_EXTI_LINE_31
449 * @arg @ref LL_EXTI_LINE_ALL_0_31
450 * @retval None
451 */
LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)452 __STATIC_INLINE void LL_C2_EXTI_DisableIT_0_31(uint32_t ExtiLine)
453 {
454 CLEAR_BIT(EXTI->C2IMR1, ExtiLine);
455 }
456 #endif /* DUAL_CORE */
457
458 /**
459 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
460 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
461 * @param ExtiLine This parameter can be one of the following values:
462 * @arg @ref LL_EXTI_LINE_34
463 * @arg @ref LL_EXTI_LINE_36 (*)
464 * @arg @ref LL_EXTI_LINE_37 (*)
465 * @arg @ref LL_EXTI_LINE_38
466 * @arg @ref LL_EXTI_LINE_39 (*)
467 * @arg @ref LL_EXTI_LINE_40 (*)
468 * @arg @ref LL_EXTI_LINE_41 (*)
469 * @arg @ref LL_EXTI_LINE_42
470 * @arg @ref LL_EXTI_LINE_43
471 * @arg @ref LL_EXTI_LINE_44
472 * @arg @ref LL_EXTI_LINE_45
473 * @arg @ref LL_EXTI_LINE_46
474 * @arg @ref LL_EXTI_LINE_ALL_32_63
475 * (*) value not defined in all devices
476 * @retval None
477 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)478 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
479 {
480 CLEAR_BIT(EXTI->IMR2, ExtiLine);
481 }
482
483 #if defined(DUAL_CORE)
484 /**
485 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63 for cpu2
486 * @rmtoll C2IMR2 IMx LL_C2_EXTI_DisableIT_32_63
487 * @param ExtiLine This parameter can be one of the following values:
488 * @arg @ref LL_EXTI_LINE_34
489 * @arg @ref LL_EXTI_LINE_36 (*)
490 * @arg @ref LL_EXTI_LINE_37 (*)
491 * @arg @ref LL_EXTI_LINE_38
492 * @arg @ref LL_EXTI_LINE_39 (*)
493 * @arg @ref LL_EXTI_LINE_40 (*)
494 * @arg @ref LL_EXTI_LINE_41 (*)
495 * @arg @ref LL_EXTI_LINE_42
496 * @arg @ref LL_EXTI_LINE_43
497 * @arg @ref LL_EXTI_LINE_44
498 * @arg @ref LL_EXTI_LINE_45
499 * @arg @ref LL_EXTI_LINE_46
500 * @arg @ref LL_EXTI_LINE_ALL_32_63
501 * (*) value not defined in all devices
502 * @retval None
503 */
LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)504 __STATIC_INLINE void LL_C2_EXTI_DisableIT_32_63(uint32_t ExtiLine)
505 {
506 CLEAR_BIT(EXTI->C2IMR2, ExtiLine);
507 }
508 #endif /* DUAL_CORE */
509
510 /**
511 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
512 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
513 * @param ExtiLine This parameter can be one of the following values:
514 * @arg @ref LL_EXTI_LINE_0
515 * @arg @ref LL_EXTI_LINE_1
516 * @arg @ref LL_EXTI_LINE_2
517 * @arg @ref LL_EXTI_LINE_3
518 * @arg @ref LL_EXTI_LINE_4
519 * @arg @ref LL_EXTI_LINE_5
520 * @arg @ref LL_EXTI_LINE_6
521 * @arg @ref LL_EXTI_LINE_7
522 * @arg @ref LL_EXTI_LINE_8
523 * @arg @ref LL_EXTI_LINE_9
524 * @arg @ref LL_EXTI_LINE_10
525 * @arg @ref LL_EXTI_LINE_11
526 * @arg @ref LL_EXTI_LINE_12
527 * @arg @ref LL_EXTI_LINE_13
528 * @arg @ref LL_EXTI_LINE_14
529 * @arg @ref LL_EXTI_LINE_15
530 * @arg @ref LL_EXTI_LINE_16
531 * @arg @ref LL_EXTI_LINE_17
532 * @arg @ref LL_EXTI_LINE_18
533 * @arg @ref LL_EXTI_LINE_19
534 * @arg @ref LL_EXTI_LINE_20
535 * @arg @ref LL_EXTI_LINE_21
536 * @arg @ref LL_EXTI_LINE_22
537 * @arg @ref LL_EXTI_LINE_23
538 * @arg @ref LL_EXTI_LINE_24
539 * @arg @ref LL_EXTI_LINE_25
540 * @arg @ref LL_EXTI_LINE_26
541 * @arg @ref LL_EXTI_LINE_27
542 * @arg @ref LL_EXTI_LINE_28
543 * @arg @ref LL_EXTI_LINE_29
544 * @arg @ref LL_EXTI_LINE_30
545 * @arg @ref LL_EXTI_LINE_31
546 * @arg @ref LL_EXTI_LINE_ALL_0_31
547 * @retval State of bit (1 or 0).
548 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)549 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
550 {
551 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
552 }
553
554 #if defined(DUAL_CORE)
555 /**
556 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31 for cpu2
557 * @rmtoll C2IMR1 IMx LL_C2_EXTI_IsEnabledIT_0_31
558 * @param ExtiLine This parameter can be one of the following values:
559 * @arg @ref LL_EXTI_LINE_0
560 * @arg @ref LL_EXTI_LINE_1
561 * @arg @ref LL_EXTI_LINE_2
562 * @arg @ref LL_EXTI_LINE_3
563 * @arg @ref LL_EXTI_LINE_4
564 * @arg @ref LL_EXTI_LINE_5
565 * @arg @ref LL_EXTI_LINE_6
566 * @arg @ref LL_EXTI_LINE_7
567 * @arg @ref LL_EXTI_LINE_8
568 * @arg @ref LL_EXTI_LINE_9
569 * @arg @ref LL_EXTI_LINE_10
570 * @arg @ref LL_EXTI_LINE_11
571 * @arg @ref LL_EXTI_LINE_12
572 * @arg @ref LL_EXTI_LINE_13
573 * @arg @ref LL_EXTI_LINE_14
574 * @arg @ref LL_EXTI_LINE_15
575 * @arg @ref LL_EXTI_LINE_16
576 * @arg @ref LL_EXTI_LINE_17
577 * @arg @ref LL_EXTI_LINE_18
578 * @arg @ref LL_EXTI_LINE_19
579 * @arg @ref LL_EXTI_LINE_20
580 * @arg @ref LL_EXTI_LINE_21
581 * @arg @ref LL_EXTI_LINE_22
582 * @arg @ref LL_EXTI_LINE_23
583 * @arg @ref LL_EXTI_LINE_24
584 * @arg @ref LL_EXTI_LINE_25
585 * @arg @ref LL_EXTI_LINE_26
586 * @arg @ref LL_EXTI_LINE_27
587 * @arg @ref LL_EXTI_LINE_28
588 * @arg @ref LL_EXTI_LINE_29
589 * @arg @ref LL_EXTI_LINE_30
590 * @arg @ref LL_EXTI_LINE_31
591 * @arg @ref LL_EXTI_LINE_ALL_0_31
592 * @retval State of bit (1 or 0).
593 */
LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)594 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
595 {
596 return ((READ_BIT(EXTI->C2IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
597 }
598 #endif /* DUAL_CORE */
599
600 /**
601 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
602 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
603 * @param ExtiLine This parameter can be one of the following values:
604 * @arg @ref LL_EXTI_LINE_34
605 * @arg @ref LL_EXTI_LINE_36 (*)
606 * @arg @ref LL_EXTI_LINE_37 (*)
607 * @arg @ref LL_EXTI_LINE_38
608 * @arg @ref LL_EXTI_LINE_39 (*)
609 * @arg @ref LL_EXTI_LINE_40 (*)
610 * @arg @ref LL_EXTI_LINE_41 (*)
611 * @arg @ref LL_EXTI_LINE_42
612 * @arg @ref LL_EXTI_LINE_43
613 * @arg @ref LL_EXTI_LINE_44
614 * @arg @ref LL_EXTI_LINE_45
615 * @arg @ref LL_EXTI_LINE_46
616 * @arg @ref LL_EXTI_LINE_ALL_32_63
617 * (*) value not defined in all devices
618 * @retval State of bit (1 or 0).
619 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)620 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
621 {
622 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
623 }
624
625 #if defined(DUAL_CORE)
626 /**
627 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63 for cpu2
628 * @rmtoll C2IMR2 IMx LL_C2_EXTI_IsEnabledIT_32_63
629 * @param ExtiLine This parameter can be one of the following values:
630 * @arg @ref LL_EXTI_LINE_34
631 * @arg @ref LL_EXTI_LINE_36 (*)
632 * @arg @ref LL_EXTI_LINE_37 (*)
633 * @arg @ref LL_EXTI_LINE_38
634 * @arg @ref LL_EXTI_LINE_39 (*)
635 * @arg @ref LL_EXTI_LINE_40 (*)
636 * @arg @ref LL_EXTI_LINE_41 (*)
637 * @arg @ref LL_EXTI_LINE_42
638 * @arg @ref LL_EXTI_LINE_43
639 * @arg @ref LL_EXTI_LINE_44
640 * @arg @ref LL_EXTI_LINE_45
641 * @arg @ref LL_EXTI_LINE_46
642 * @arg @ref LL_EXTI_LINE_ALL_32_63
643 * (*) value not defined in all devices
644 * @retval State of bit (1 or 0).
645 */
LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)646 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
647 {
648 return ((READ_BIT(EXTI->C2IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
649 }
650 #endif /* DUAL_CORE */
651
652 /**
653 * @}
654 */
655
656 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
657 * @{
658 */
659
660 /**
661 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
662 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
663 * @param ExtiLine This parameter can be one of the following values:
664 * @arg @ref LL_EXTI_LINE_0
665 * @arg @ref LL_EXTI_LINE_1
666 * @arg @ref LL_EXTI_LINE_2
667 * @arg @ref LL_EXTI_LINE_3
668 * @arg @ref LL_EXTI_LINE_4
669 * @arg @ref LL_EXTI_LINE_5
670 * @arg @ref LL_EXTI_LINE_6
671 * @arg @ref LL_EXTI_LINE_7
672 * @arg @ref LL_EXTI_LINE_8
673 * @arg @ref LL_EXTI_LINE_9
674 * @arg @ref LL_EXTI_LINE_10
675 * @arg @ref LL_EXTI_LINE_11
676 * @arg @ref LL_EXTI_LINE_12
677 * @arg @ref LL_EXTI_LINE_13
678 * @arg @ref LL_EXTI_LINE_14
679 * @arg @ref LL_EXTI_LINE_15
680 * @arg @ref LL_EXTI_LINE_17
681 * @arg @ref LL_EXTI_LINE_19
682 * @arg @ref LL_EXTI_LINE_20
683 * @arg @ref LL_EXTI_LINE_21
684 * @arg @ref LL_EXTI_LINE_22
685 * @retval None
686 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)687 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
688 {
689 SET_BIT(EXTI->EMR1, ExtiLine);
690 }
691
692 #if defined(DUAL_CORE)
693 /**
694 * @brief Enable ExtiLine Event request for Lines in range 0 to 31 for cpu2
695 * @rmtoll C2EMR1 EMx LL_C2_EXTI_EnableEvent_0_31
696 * @param ExtiLine This parameter can be one of the following values:
697 * @arg @ref LL_EXTI_LINE_0
698 * @arg @ref LL_EXTI_LINE_1
699 * @arg @ref LL_EXTI_LINE_2
700 * @arg @ref LL_EXTI_LINE_3
701 * @arg @ref LL_EXTI_LINE_4
702 * @arg @ref LL_EXTI_LINE_5
703 * @arg @ref LL_EXTI_LINE_6
704 * @arg @ref LL_EXTI_LINE_7
705 * @arg @ref LL_EXTI_LINE_8
706 * @arg @ref LL_EXTI_LINE_9
707 * @arg @ref LL_EXTI_LINE_10
708 * @arg @ref LL_EXTI_LINE_11
709 * @arg @ref LL_EXTI_LINE_12
710 * @arg @ref LL_EXTI_LINE_13
711 * @arg @ref LL_EXTI_LINE_14
712 * @arg @ref LL_EXTI_LINE_15
713 * @arg @ref LL_EXTI_LINE_17
714 * @arg @ref LL_EXTI_LINE_19
715 * @arg @ref LL_EXTI_LINE_20
716 * @arg @ref LL_EXTI_LINE_21
717 * @arg @ref LL_EXTI_LINE_22
718 * @retval None
719 */
LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)720 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
721 {
722 SET_BIT(EXTI->C2EMR1, ExtiLine);
723 }
724 #endif /* DUAL_CORE */
725
726 /**
727 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
728 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
729 * @param ExtiLine This parameter can be a combination of the following values:
730 * @arg @ref LL_EXTI_LINE_40 (*)
731 * @arg @ref LL_EXTI_LINE_41 (*)
732 * (*) value not defined in all devices
733 * @retval None
734 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)735 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
736 {
737 SET_BIT(EXTI->EMR2, ExtiLine);
738 }
739
740 #if defined(DUAL_CORE)
741 /**
742 * @brief Enable ExtiLine Event request for Lines in range 32 to 63 for cpu2
743 * @rmtoll C2EMR2 EMx LL_C2_EXTI_EnableEvent_32_63
744 * @param ExtiLine This parameter can be a combination of the following values:
745 * @arg @ref LL_EXTI_LINE_40 (*)
746 * @arg @ref LL_EXTI_LINE_41 (*)
747 * (*) value not defined in all devices
748 * @retval None
749 */
LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)750 __STATIC_INLINE void LL_C2_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
751 {
752 SET_BIT(EXTI->C2EMR2, ExtiLine);
753 }
754 #endif /* DUAL_CORE */
755
756 /**
757 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
758 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
759 * @param ExtiLine This parameter can be one of the following values:
760 * @arg @ref LL_EXTI_LINE_0
761 * @arg @ref LL_EXTI_LINE_1
762 * @arg @ref LL_EXTI_LINE_2
763 * @arg @ref LL_EXTI_LINE_3
764 * @arg @ref LL_EXTI_LINE_4
765 * @arg @ref LL_EXTI_LINE_5
766 * @arg @ref LL_EXTI_LINE_6
767 * @arg @ref LL_EXTI_LINE_7
768 * @arg @ref LL_EXTI_LINE_8
769 * @arg @ref LL_EXTI_LINE_9
770 * @arg @ref LL_EXTI_LINE_10
771 * @arg @ref LL_EXTI_LINE_11
772 * @arg @ref LL_EXTI_LINE_12
773 * @arg @ref LL_EXTI_LINE_13
774 * @arg @ref LL_EXTI_LINE_14
775 * @arg @ref LL_EXTI_LINE_15
776 * @arg @ref LL_EXTI_LINE_17
777 * @arg @ref LL_EXTI_LINE_19
778 * @arg @ref LL_EXTI_LINE_20
779 * @arg @ref LL_EXTI_LINE_21
780 * @arg @ref LL_EXTI_LINE_22
781 * @retval None
782 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)783 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
784 {
785 CLEAR_BIT(EXTI->EMR1, ExtiLine);
786 }
787
788 #if defined(DUAL_CORE)
789 /**
790 * @brief Disable ExtiLine Event request for Lines in range 0 to 31 for cpu2
791 * @rmtoll C2EMR1 EMx LL_C2_EXTI_DisableEvent_0_31
792 * @param ExtiLine This parameter can be one of the following values:
793 * @arg @ref LL_EXTI_LINE_0
794 * @arg @ref LL_EXTI_LINE_1
795 * @arg @ref LL_EXTI_LINE_2
796 * @arg @ref LL_EXTI_LINE_3
797 * @arg @ref LL_EXTI_LINE_4
798 * @arg @ref LL_EXTI_LINE_5
799 * @arg @ref LL_EXTI_LINE_6
800 * @arg @ref LL_EXTI_LINE_7
801 * @arg @ref LL_EXTI_LINE_8
802 * @arg @ref LL_EXTI_LINE_9
803 * @arg @ref LL_EXTI_LINE_10
804 * @arg @ref LL_EXTI_LINE_11
805 * @arg @ref LL_EXTI_LINE_12
806 * @arg @ref LL_EXTI_LINE_13
807 * @arg @ref LL_EXTI_LINE_14
808 * @arg @ref LL_EXTI_LINE_15
809 * @arg @ref LL_EXTI_LINE_17
810 * @arg @ref LL_EXTI_LINE_19
811 * @arg @ref LL_EXTI_LINE_20
812 * @arg @ref LL_EXTI_LINE_21
813 * @arg @ref LL_EXTI_LINE_22
814 * @retval None
815 */
LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)816 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
817 {
818 CLEAR_BIT(EXTI->C2EMR1, ExtiLine);
819 }
820 #endif /* DUAL_CORE */
821
822 /**
823 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
824 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
825 * @param ExtiLine This parameter can be a combination of the following values:
826 * @arg @ref LL_EXTI_LINE_40 (*)
827 * @arg @ref LL_EXTI_LINE_41 (*)
828 * (*) value not defined in all devices
829 * @retval None
830 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)831 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
832 {
833 CLEAR_BIT(EXTI->EMR2, ExtiLine);
834 }
835
836 #if defined(DUAL_CORE)
837 /**
838 * @brief Disable ExtiLine Event request for Lines in range 32 to 63 for cpu2
839 * @rmtoll C2EMR2 EMx LL_C2_EXTI_DisableEvent_32_63
840 * @param ExtiLine This parameter can be a combination of the following values:
841 * @arg @ref LL_EXTI_LINE_40 (*)
842 * @arg @ref LL_EXTI_LINE_41 (*)
843 * (*) value not defined in all devices
844 * @retval None
845 */
LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)846 __STATIC_INLINE void LL_C2_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
847 {
848 CLEAR_BIT(EXTI->C2EMR2, ExtiLine);
849 }
850 #endif /* DUAL_CORE */
851
852 /**
853 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
854 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
855 * @param ExtiLine This parameter can be one of the following values:
856 * @arg @ref LL_EXTI_LINE_0
857 * @arg @ref LL_EXTI_LINE_1
858 * @arg @ref LL_EXTI_LINE_2
859 * @arg @ref LL_EXTI_LINE_3
860 * @arg @ref LL_EXTI_LINE_4
861 * @arg @ref LL_EXTI_LINE_5
862 * @arg @ref LL_EXTI_LINE_6
863 * @arg @ref LL_EXTI_LINE_7
864 * @arg @ref LL_EXTI_LINE_8
865 * @arg @ref LL_EXTI_LINE_9
866 * @arg @ref LL_EXTI_LINE_10
867 * @arg @ref LL_EXTI_LINE_11
868 * @arg @ref LL_EXTI_LINE_12
869 * @arg @ref LL_EXTI_LINE_13
870 * @arg @ref LL_EXTI_LINE_14
871 * @arg @ref LL_EXTI_LINE_15
872 * @arg @ref LL_EXTI_LINE_17
873 * @arg @ref LL_EXTI_LINE_19
874 * @arg @ref LL_EXTI_LINE_20
875 * @arg @ref LL_EXTI_LINE_21
876 * @arg @ref LL_EXTI_LINE_22
877 * @retval State of bit (1 or 0).
878 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)879 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
880 {
881 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
882 }
883
884 #if defined(DUAL_CORE)
885 /**
886 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31 for cpu2
887 * @rmtoll C2EMR1 EMx LL_C2_EXTI_IsEnabledEvent_0_31
888 * @param ExtiLine This parameter can be one of the following values:
889 * @arg @ref LL_EXTI_LINE_0
890 * @arg @ref LL_EXTI_LINE_1
891 * @arg @ref LL_EXTI_LINE_2
892 * @arg @ref LL_EXTI_LINE_3
893 * @arg @ref LL_EXTI_LINE_4
894 * @arg @ref LL_EXTI_LINE_5
895 * @arg @ref LL_EXTI_LINE_6
896 * @arg @ref LL_EXTI_LINE_7
897 * @arg @ref LL_EXTI_LINE_8
898 * @arg @ref LL_EXTI_LINE_9
899 * @arg @ref LL_EXTI_LINE_10
900 * @arg @ref LL_EXTI_LINE_11
901 * @arg @ref LL_EXTI_LINE_12
902 * @arg @ref LL_EXTI_LINE_13
903 * @arg @ref LL_EXTI_LINE_14
904 * @arg @ref LL_EXTI_LINE_15
905 * @arg @ref LL_EXTI_LINE_17
906 * @arg @ref LL_EXTI_LINE_19
907 * @arg @ref LL_EXTI_LINE_20
908 * @arg @ref LL_EXTI_LINE_21
909 * @arg @ref LL_EXTI_LINE_22
910 * @retval State of bit (1 or 0).
911 */
LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)912 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
913 {
914 return ((READ_BIT(EXTI->C2EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
915 }
916 #endif /* DUAL_CORE */
917
918 /**
919 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
920 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
921 * @param ExtiLine This parameter can be a combination of the following values:
922 * @arg @ref LL_EXTI_LINE_40 (*)
923 * @arg @ref LL_EXTI_LINE_41 (*)
924 * (*) value not defined in all devices
925 * @retval State of bit (1 or 0).
926 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)927 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
928 {
929 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
930 }
931
932 #if defined(DUAL_CORE)
933 /**
934 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63 for cpu2
935 * @rmtoll EMR2 EMx LL_C2_EXTI_IsEnabledEvent_32_63
936 * @param ExtiLine This parameter can be a combination of the following values:
937 * @arg @ref LL_EXTI_LINE_40 (*)
938 * @arg @ref LL_EXTI_LINE_41 (*)
939 * (*) value not defined in all devices
940 * @retval State of bit (1 or 0).
941 */
LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)942 __STATIC_INLINE uint32_t LL_C2_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
943 {
944 return ((READ_BIT(EXTI->C2EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
945 }
946 #endif /* DUAL_CORE */
947
948 /**
949 * @}
950 */
951
952 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
953 * @{
954 */
955
956 /**
957 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
958 * @note The configurable wakeup lines are edge-triggered. No glitch must be
959 * generated on these lines. If a rising edge on a configurable interrupt
960 * line occurs during a write operation in the EXTI_RTSR register, the
961 * pending bit is not set.
962 * Rising and falling edge triggers can be set for
963 * the same interrupt line. In this case, both generate a trigger
964 * condition.
965 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
966 * @param ExtiLine This parameter can be a combination of the following values:
967 * @arg @ref LL_EXTI_LINE_0
968 * @arg @ref LL_EXTI_LINE_1
969 * @arg @ref LL_EXTI_LINE_2
970 * @arg @ref LL_EXTI_LINE_3
971 * @arg @ref LL_EXTI_LINE_4
972 * @arg @ref LL_EXTI_LINE_5
973 * @arg @ref LL_EXTI_LINE_6
974 * @arg @ref LL_EXTI_LINE_7
975 * @arg @ref LL_EXTI_LINE_8
976 * @arg @ref LL_EXTI_LINE_9
977 * @arg @ref LL_EXTI_LINE_10
978 * @arg @ref LL_EXTI_LINE_11
979 * @arg @ref LL_EXTI_LINE_12
980 * @arg @ref LL_EXTI_LINE_13
981 * @arg @ref LL_EXTI_LINE_14
982 * @arg @ref LL_EXTI_LINE_15
983 * @arg @ref LL_EXTI_LINE_16
984 * @arg @ref LL_EXTI_LINE_17
985 * @arg @ref LL_EXTI_LINE_21
986 * @arg @ref LL_EXTI_LINE_22
987 * @retval None
988 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)989 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
990 {
991 SET_BIT(EXTI->RTSR1, ExtiLine);
992
993 }
994
995 /**
996 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
997 * @note The configurable wakeup lines are edge-triggered. No glitch must be
998 * generated on these lines. If a rising edge on a configurable interrupt
999 * line occurs during a write operation in the EXTI_RTSR register, the
1000 * pending bit is not set.Rising and falling edge triggers can be set for
1001 * the same interrupt line. In this case, both generate a trigger
1002 * condition.
1003 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
1004 * @param ExtiLine This parameter can be a combination of the following values:
1005 * @arg @ref LL_EXTI_LINE_34
1006 * @arg @ref LL_EXTI_LINE_40
1007 * @arg @ref LL_EXTI_LINE_41
1008 * @arg @ref LL_EXTI_LINE_45
1009 * @retval None
1010 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)1011 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
1012 {
1013 SET_BIT(EXTI->RTSR2, ExtiLine);
1014 }
1015
1016 /**
1017 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
1018 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1019 * generated on these lines. If a rising edge on a configurable interrupt
1020 * line occurs during a write operation in the EXTI_RTSR register, the
1021 * pending bit is not set.
1022 * Rising and falling edge triggers can be set for
1023 * the same interrupt line. In this case, both generate a trigger
1024 * condition.
1025 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
1026 * @param ExtiLine This parameter can be a combination of the following values:
1027 * @arg @ref LL_EXTI_LINE_0
1028 * @arg @ref LL_EXTI_LINE_1
1029 * @arg @ref LL_EXTI_LINE_2
1030 * @arg @ref LL_EXTI_LINE_3
1031 * @arg @ref LL_EXTI_LINE_4
1032 * @arg @ref LL_EXTI_LINE_5
1033 * @arg @ref LL_EXTI_LINE_6
1034 * @arg @ref LL_EXTI_LINE_7
1035 * @arg @ref LL_EXTI_LINE_8
1036 * @arg @ref LL_EXTI_LINE_9
1037 * @arg @ref LL_EXTI_LINE_10
1038 * @arg @ref LL_EXTI_LINE_11
1039 * @arg @ref LL_EXTI_LINE_12
1040 * @arg @ref LL_EXTI_LINE_13
1041 * @arg @ref LL_EXTI_LINE_14
1042 * @arg @ref LL_EXTI_LINE_15
1043 * @arg @ref LL_EXTI_LINE_16
1044 * @arg @ref LL_EXTI_LINE_17
1045 * @arg @ref LL_EXTI_LINE_21
1046 * @arg @ref LL_EXTI_LINE_22
1047 * @retval None
1048 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)1049 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
1050 {
1051 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
1052
1053 }
1054
1055 /**
1056 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1057 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1058 * generated on these lines. If a rising edge on a configurable interrupt
1059 * line occurs during a write operation in the EXTI_RTSR register, the
1060 * pending bit is not set.
1061 * Rising and falling edge triggers can be set for
1062 * the same interrupt line. In this case, both generate a trigger
1063 * condition.
1064 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
1065 * @param ExtiLine This parameter can be a combination of the following values:
1066 * @arg @ref LL_EXTI_LINE_34
1067 * @arg @ref LL_EXTI_LINE_40
1068 * @arg @ref LL_EXTI_LINE_41
1069 * @arg @ref LL_EXTI_LINE_45
1070 * @retval None
1071 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)1072 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
1073 {
1074 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
1075 }
1076
1077 /**
1078 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
1079 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
1080 * @param ExtiLine This parameter can be a combination of the following values:
1081 * @arg @ref LL_EXTI_LINE_0
1082 * @arg @ref LL_EXTI_LINE_1
1083 * @arg @ref LL_EXTI_LINE_2
1084 * @arg @ref LL_EXTI_LINE_3
1085 * @arg @ref LL_EXTI_LINE_4
1086 * @arg @ref LL_EXTI_LINE_5
1087 * @arg @ref LL_EXTI_LINE_6
1088 * @arg @ref LL_EXTI_LINE_7
1089 * @arg @ref LL_EXTI_LINE_8
1090 * @arg @ref LL_EXTI_LINE_9
1091 * @arg @ref LL_EXTI_LINE_10
1092 * @arg @ref LL_EXTI_LINE_11
1093 * @arg @ref LL_EXTI_LINE_12
1094 * @arg @ref LL_EXTI_LINE_13
1095 * @arg @ref LL_EXTI_LINE_14
1096 * @arg @ref LL_EXTI_LINE_15
1097 * @arg @ref LL_EXTI_LINE_16
1098 * @arg @ref LL_EXTI_LINE_17
1099 * @arg @ref LL_EXTI_LINE_21
1100 * @arg @ref LL_EXTI_LINE_22
1101 * @retval State of bit (1 or 0).
1102 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)1103 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
1104 {
1105 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1106 }
1107
1108 /**
1109 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
1110 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
1111 * @param ExtiLine This parameter can be a combination of the following values:
1112 * @arg @ref LL_EXTI_LINE_34
1113 * @arg @ref LL_EXTI_LINE_40
1114 * @arg @ref LL_EXTI_LINE_41
1115 * @arg @ref LL_EXTI_LINE_45
1116 * @retval State of bit (1 or 0).
1117 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)1118 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
1119 {
1120 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1121 }
1122
1123 /**
1124 * @}
1125 */
1126
1127 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
1128 * @{
1129 */
1130
1131 /**
1132 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1133 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1134 * generated on these lines. If a falling edge on a configurable interrupt
1135 * line occurs during a write operation in the EXTI_FTSR register, the
1136 * pending bit is not set.
1137 * Rising and falling edge triggers can be set for
1138 * the same interrupt line. In this case, both generate a trigger
1139 * condition.
1140 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
1141 * @param ExtiLine This parameter can be a combination of the following values:
1142 * @arg @ref LL_EXTI_LINE_0
1143 * @arg @ref LL_EXTI_LINE_1
1144 * @arg @ref LL_EXTI_LINE_2
1145 * @arg @ref LL_EXTI_LINE_3
1146 * @arg @ref LL_EXTI_LINE_4
1147 * @arg @ref LL_EXTI_LINE_5
1148 * @arg @ref LL_EXTI_LINE_6
1149 * @arg @ref LL_EXTI_LINE_7
1150 * @arg @ref LL_EXTI_LINE_8
1151 * @arg @ref LL_EXTI_LINE_9
1152 * @arg @ref LL_EXTI_LINE_10
1153 * @arg @ref LL_EXTI_LINE_11
1154 * @arg @ref LL_EXTI_LINE_12
1155 * @arg @ref LL_EXTI_LINE_13
1156 * @arg @ref LL_EXTI_LINE_14
1157 * @arg @ref LL_EXTI_LINE_15
1158 * @arg @ref LL_EXTI_LINE_16
1159 * @arg @ref LL_EXTI_LINE_17
1160 * @arg @ref LL_EXTI_LINE_21
1161 * @arg @ref LL_EXTI_LINE_22
1162 * @retval None
1163 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)1164 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
1165 {
1166 SET_BIT(EXTI->FTSR1, ExtiLine);
1167 }
1168
1169 /**
1170 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1171 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1172 * generated on these lines. If a Falling edge on a configurable interrupt
1173 * line occurs during a write operation in the EXTI_FTSR register, the
1174 * pending bit is not set.
1175 * Rising and falling edge triggers can be set for
1176 * the same interrupt line. In this case, both generate a trigger
1177 * condition.
1178 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
1179 * @param ExtiLine This parameter can be a combination of the following values:
1180 * @arg @ref LL_EXTI_LINE_34
1181 * @arg @ref LL_EXTI_LINE_40
1182 * @arg @ref LL_EXTI_LINE_41
1183 * @arg @ref LL_EXTI_LINE_45
1184 * @retval None
1185 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)1186 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
1187 {
1188 SET_BIT(EXTI->FTSR2, ExtiLine);
1189 }
1190
1191 /**
1192 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1193 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1194 * generated on these lines. If a Falling edge on a configurable interrupt
1195 * line occurs during a write operation in the EXTI_FTSR register, the
1196 * pending bit is not set.
1197 * Rising and falling edge triggers can be set for the same interrupt line.
1198 * In this case, both generate a trigger condition.
1199 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1200 * @param ExtiLine This parameter can be a combination of the following values:
1201 * @arg @ref LL_EXTI_LINE_0
1202 * @arg @ref LL_EXTI_LINE_1
1203 * @arg @ref LL_EXTI_LINE_2
1204 * @arg @ref LL_EXTI_LINE_3
1205 * @arg @ref LL_EXTI_LINE_4
1206 * @arg @ref LL_EXTI_LINE_5
1207 * @arg @ref LL_EXTI_LINE_6
1208 * @arg @ref LL_EXTI_LINE_7
1209 * @arg @ref LL_EXTI_LINE_8
1210 * @arg @ref LL_EXTI_LINE_9
1211 * @arg @ref LL_EXTI_LINE_10
1212 * @arg @ref LL_EXTI_LINE_11
1213 * @arg @ref LL_EXTI_LINE_12
1214 * @arg @ref LL_EXTI_LINE_13
1215 * @arg @ref LL_EXTI_LINE_14
1216 * @arg @ref LL_EXTI_LINE_15
1217 * @arg @ref LL_EXTI_LINE_16
1218 * @arg @ref LL_EXTI_LINE_17
1219 * @arg @ref LL_EXTI_LINE_21
1220 * @arg @ref LL_EXTI_LINE_22
1221 * @retval None
1222 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1223 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1224 {
1225 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1226 }
1227
1228 /**
1229 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1230 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1231 * generated on these lines. If a Falling edge on a configurable interrupt
1232 * line occurs during a write operation in the EXTI_FTSR register, the
1233 * pending bit is not set.
1234 * Rising and falling edge triggers can be set for the same interrupt line.
1235 * In this case, both generate a trigger condition.
1236 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1237 * @param ExtiLine This parameter can be a combination of the following values:
1238 * @arg @ref LL_EXTI_LINE_34
1239 * @arg @ref LL_EXTI_LINE_40
1240 * @arg @ref LL_EXTI_LINE_41
1241 * @arg @ref LL_EXTI_LINE_45
1242 * @retval None
1243 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1244 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1245 {
1246 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1247 }
1248
1249 /**
1250 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1251 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1252 * @param ExtiLine This parameter can be a combination of the following values:
1253 * @arg @ref LL_EXTI_LINE_0
1254 * @arg @ref LL_EXTI_LINE_1
1255 * @arg @ref LL_EXTI_LINE_2
1256 * @arg @ref LL_EXTI_LINE_3
1257 * @arg @ref LL_EXTI_LINE_4
1258 * @arg @ref LL_EXTI_LINE_5
1259 * @arg @ref LL_EXTI_LINE_6
1260 * @arg @ref LL_EXTI_LINE_7
1261 * @arg @ref LL_EXTI_LINE_8
1262 * @arg @ref LL_EXTI_LINE_9
1263 * @arg @ref LL_EXTI_LINE_10
1264 * @arg @ref LL_EXTI_LINE_11
1265 * @arg @ref LL_EXTI_LINE_12
1266 * @arg @ref LL_EXTI_LINE_13
1267 * @arg @ref LL_EXTI_LINE_14
1268 * @arg @ref LL_EXTI_LINE_15
1269 * @arg @ref LL_EXTI_LINE_16
1270 * @arg @ref LL_EXTI_LINE_17
1271 * @arg @ref LL_EXTI_LINE_21
1272 * @arg @ref LL_EXTI_LINE_22
1273 * @retval State of bit (1 or 0).
1274 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1275 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1276 {
1277 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1278 }
1279
1280 /**
1281 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1282 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1283 * @param ExtiLine This parameter can be a combination of the following values:
1284 * @arg @ref LL_EXTI_LINE_34
1285 * @arg @ref LL_EXTI_LINE_40
1286 * @arg @ref LL_EXTI_LINE_41
1287 * @arg @ref LL_EXTI_LINE_45
1288 * @retval State of bit (1 or 0).
1289 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1290 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1291 {
1292 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1293 }
1294
1295 /**
1296 * @}
1297 */
1298
1299 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1300 * @{
1301 */
1302
1303 /**
1304 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1305 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1306 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1307 * resulting in an interrupt request generation.
1308 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1309 * register (by writing a 1 into the bit)
1310 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1311 * @param ExtiLine This parameter can be a combination of the following values:
1312 * @arg @ref LL_EXTI_LINE_0
1313 * @arg @ref LL_EXTI_LINE_1
1314 * @arg @ref LL_EXTI_LINE_2
1315 * @arg @ref LL_EXTI_LINE_3
1316 * @arg @ref LL_EXTI_LINE_4
1317 * @arg @ref LL_EXTI_LINE_5
1318 * @arg @ref LL_EXTI_LINE_6
1319 * @arg @ref LL_EXTI_LINE_7
1320 * @arg @ref LL_EXTI_LINE_8
1321 * @arg @ref LL_EXTI_LINE_9
1322 * @arg @ref LL_EXTI_LINE_10
1323 * @arg @ref LL_EXTI_LINE_11
1324 * @arg @ref LL_EXTI_LINE_12
1325 * @arg @ref LL_EXTI_LINE_13
1326 * @arg @ref LL_EXTI_LINE_14
1327 * @arg @ref LL_EXTI_LINE_15
1328 * @arg @ref LL_EXTI_LINE_16
1329 * @arg @ref LL_EXTI_LINE_17
1330 * @arg @ref LL_EXTI_LINE_21
1331 * @arg @ref LL_EXTI_LINE_22
1332 * @retval None
1333 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1334 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1335 {
1336 SET_BIT(EXTI->SWIER1, ExtiLine);
1337 }
1338
1339 /**
1340 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1341 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1342 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1343 * resulting in an interrupt request generation.
1344 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1345 * register (by writing a 1 into the bit)
1346 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1347 * @param ExtiLine This parameter can be a combination of the following values:
1348 * @arg @ref LL_EXTI_LINE_34
1349 * @arg @ref LL_EXTI_LINE_40
1350 * @arg @ref LL_EXTI_LINE_41
1351 * @arg @ref LL_EXTI_LINE_45
1352 * @retval None
1353 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1354 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1355 {
1356 SET_BIT(EXTI->SWIER2, ExtiLine);
1357 }
1358
1359 /**
1360 * @}
1361 */
1362
1363 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1364 * @{
1365 */
1366
1367 /**
1368 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1369 * @note This bit is set when the selected edge event arrives on the interrupt
1370 * line. This bit is cleared by writing a 1 to the bit.
1371 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1372 * @param ExtiLine This parameter can be a combination of the following values:
1373 * @arg @ref LL_EXTI_LINE_0
1374 * @arg @ref LL_EXTI_LINE_1
1375 * @arg @ref LL_EXTI_LINE_2
1376 * @arg @ref LL_EXTI_LINE_3
1377 * @arg @ref LL_EXTI_LINE_4
1378 * @arg @ref LL_EXTI_LINE_5
1379 * @arg @ref LL_EXTI_LINE_6
1380 * @arg @ref LL_EXTI_LINE_7
1381 * @arg @ref LL_EXTI_LINE_8
1382 * @arg @ref LL_EXTI_LINE_9
1383 * @arg @ref LL_EXTI_LINE_10
1384 * @arg @ref LL_EXTI_LINE_11
1385 * @arg @ref LL_EXTI_LINE_12
1386 * @arg @ref LL_EXTI_LINE_13
1387 * @arg @ref LL_EXTI_LINE_14
1388 * @arg @ref LL_EXTI_LINE_15
1389 * @arg @ref LL_EXTI_LINE_16
1390 * @arg @ref LL_EXTI_LINE_17
1391 * @arg @ref LL_EXTI_LINE_21
1392 * @arg @ref LL_EXTI_LINE_22
1393 * @retval State of bit (1 or 0).
1394 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1395 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1396 {
1397 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1398 }
1399
1400 /**
1401 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1402 * @note This bit is set when the selected edge event arrives on the interrupt
1403 * line. This bit is cleared by writing a 1 to the bit.
1404 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1405 * @param ExtiLine This parameter can be a combination of the following values:
1406 * @arg @ref LL_EXTI_LINE_34
1407 * @arg @ref LL_EXTI_LINE_40
1408 * @arg @ref LL_EXTI_LINE_41
1409 * @arg @ref LL_EXTI_LINE_45
1410 * @retval State of bit (1 or 0).
1411 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1412 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1413 {
1414 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1415 }
1416
1417 /**
1418 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1419 * @note This bit is set when the selected edge event arrives on the interrupt
1420 * line. This bit is cleared by writing a 1 to the bit.
1421 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1422 * @param ExtiLine This parameter can be a combination of the following values:
1423 * @arg @ref LL_EXTI_LINE_0
1424 * @arg @ref LL_EXTI_LINE_0
1425 * @arg @ref LL_EXTI_LINE_1
1426 * @arg @ref LL_EXTI_LINE_2
1427 * @arg @ref LL_EXTI_LINE_3
1428 * @arg @ref LL_EXTI_LINE_4
1429 * @arg @ref LL_EXTI_LINE_5
1430 * @arg @ref LL_EXTI_LINE_6
1431 * @arg @ref LL_EXTI_LINE_7
1432 * @arg @ref LL_EXTI_LINE_8
1433 * @arg @ref LL_EXTI_LINE_9
1434 * @arg @ref LL_EXTI_LINE_10
1435 * @arg @ref LL_EXTI_LINE_11
1436 * @arg @ref LL_EXTI_LINE_12
1437 * @arg @ref LL_EXTI_LINE_13
1438 * @arg @ref LL_EXTI_LINE_14
1439 * @arg @ref LL_EXTI_LINE_15
1440 * @arg @ref LL_EXTI_LINE_16
1441 * @arg @ref LL_EXTI_LINE_17
1442 * @arg @ref LL_EXTI_LINE_21
1443 * @arg @ref LL_EXTI_LINE_22
1444 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1445 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1446 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1447 {
1448 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1449 }
1450
1451 /**
1452 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1453 * @note This bit is set when the selected edge event arrives on the interrupt
1454 * line. This bit is cleared by writing a 1 to the bit.
1455 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1456 * @param ExtiLine This parameter can be a combination of the following values:
1457 * @arg @ref LL_EXTI_LINE_34
1458 * @arg @ref LL_EXTI_LINE_40
1459 * @arg @ref LL_EXTI_LINE_41
1460 * @arg @ref LL_EXTI_LINE_45
1461 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1462 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1463 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1464 {
1465 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1466 }
1467
1468 /**
1469 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1470 * @note This bit is set when the selected edge event arrives on the interrupt
1471 * line. This bit is cleared by writing a 1 to the bit.
1472 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1473 * @param ExtiLine This parameter can be a combination of the following values:
1474 * @arg @ref LL_EXTI_LINE_0
1475 * @arg @ref LL_EXTI_LINE_1
1476 * @arg @ref LL_EXTI_LINE_2
1477 * @arg @ref LL_EXTI_LINE_3
1478 * @arg @ref LL_EXTI_LINE_4
1479 * @arg @ref LL_EXTI_LINE_5
1480 * @arg @ref LL_EXTI_LINE_6
1481 * @arg @ref LL_EXTI_LINE_7
1482 * @arg @ref LL_EXTI_LINE_8
1483 * @arg @ref LL_EXTI_LINE_9
1484 * @arg @ref LL_EXTI_LINE_10
1485 * @arg @ref LL_EXTI_LINE_11
1486 * @arg @ref LL_EXTI_LINE_12
1487 * @arg @ref LL_EXTI_LINE_13
1488 * @arg @ref LL_EXTI_LINE_14
1489 * @arg @ref LL_EXTI_LINE_15
1490 * @arg @ref LL_EXTI_LINE_16
1491 * @arg @ref LL_EXTI_LINE_17
1492 * @arg @ref LL_EXTI_LINE_21
1493 * @arg @ref LL_EXTI_LINE_22
1494 * @retval None
1495 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1496 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1497 {
1498 WRITE_REG(EXTI->PR1, ExtiLine);
1499 }
1500
1501 /**
1502 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1503 * @note This bit is set when the selected edge event arrives on the interrupt
1504 * line. This bit is cleared by writing a 1 to the bit.
1505 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1506 * @param ExtiLine This parameter can be a combination of the following values:
1507 * @arg @ref LL_EXTI_LINE_34
1508 * @arg @ref LL_EXTI_LINE_40
1509 * @arg @ref LL_EXTI_LINE_41
1510 * @arg @ref LL_EXTI_LINE_45
1511 * @retval None
1512 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1513 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1514 {
1515 WRITE_REG(EXTI->PR2, ExtiLine);
1516 }
1517
1518 /**
1519 * @}
1520 */
1521
1522 #if defined(USE_FULL_LL_DRIVER)
1523 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1524 * @{
1525 */
1526 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1527 ErrorStatus LL_EXTI_DeInit(void);
1528 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1529 /**
1530 * @}
1531 */
1532 #endif /* USE_FULL_LL_DRIVER */
1533
1534 /**
1535 * @}
1536 */
1537
1538 /**
1539 * @}
1540 */
1541
1542 #endif /* EXTI */
1543
1544 /**
1545 * @}
1546 */
1547
1548 #ifdef __cplusplus
1549 }
1550 #endif
1551
1552 #endif /* __STM32WLxx_LL_EXTI_H */
1553
