1 /**
2 ******************************************************************************
3 * @file stm32wbaxx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2022 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef __STM32WBAxx_LL_UTILS_H
34 #define __STM32WBAxx_LL_UTILS_H
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32wbaxx.h"
42
43 /** @addtogroup STM32WBAxx_LL_Driver
44 * @{
45 */
46
47 /** @defgroup UTILS_LL UTILS
48 * @{
49 */
50
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
57 */
58
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61
62 /**
63 * @brief Unique device ID register base address
64 */
65 #define UID_BASE_ADDRESS UID_BASE
66
67 /**
68 * @brief Flash size data register base address
69 */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71
72 /**
73 * @brief Package data register base address
74 */
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
76
77 /**
78 * @}
79 */
80
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
83 * @{
84 */
85 /**
86 * @}
87 */
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
90 * @{
91 */
92
93 /**
94 * @brief UTILS PLL structure definition
95 */
96 typedef struct
97 {
98 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
99 This parameter can be a number between Min_Data = 1 and Max_Data = 16
100
101 This feature can be modified afterwards using one of these functions
102 @ref LL_RCC_PLL1_ConfigDomain_PLL1P(), @ref LL_RCC_PLL1_ConfigDomain_PLL1R(), @ref LL_RCC_PLL1_ConfigDomain_PLL1Q(). */
103
104 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
105 This parameter must be a number between Min_Data = 4 and Max_Data = 512
106
107 This feature can be modified afterwards using one of these functions
108 @ref LL_RCC_PLL1_ConfigDomain_PLL1P(), @ref LL_RCC_PLL1_ConfigDomain_PLL1R(), @ref LL_RCC_PLL1_ConfigDomain_PLL1Q(). */
109
110 uint32_t PLLR; /*!< Division for the main system clock.
111 This parameter can be a number between Min_Data = 1 and Max_Data = 128
112
113 This feature can be modified afterwards using unitary function
114 @ref LL_RCC_PLL1_ConfigDomain_PLL1R(). */
115 } LL_UTILS_PLLInitTypeDef;
116
117 /**
118 * @brief UTILS System, AHB and APB buses clock configuration structure definition
119 */
120 typedef struct
121 {
122 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
123 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
124
125 This feature can be modified afterwards using unitary function
126 @ref LL_RCC_SetAHBPrescaler(). */
127
128 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
129 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
130
131 This feature can be modified afterwards using unitary function
132 @ref LL_RCC_SetAPB1Prescaler(). */
133
134 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
135 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
136
137 This feature can be modified afterwards using unitary function
138 @ref LL_RCC_SetAPB2Prescaler(). */
139
140 uint32_t APB7CLKDivider; /*!< The APB7 clock (PCLK7) divider. This clock is derived from the AHB clock (HCLK).
141 This parameter can be a value of @ref RCC_LL_EC_APB7_DIV
142
143 This feature can be modified afterwards using unitary function
144 @ref LL_RCC_SetAPB7Prescaler(). */
145
146 } LL_UTILS_ClkInitTypeDef;
147
148 /**
149 * @}
150 */
151
152 /* Exported constants --------------------------------------------------------*/
153 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
154 * @{
155 */
156
157 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
158 * @{
159 */
160 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx)
161 #define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000000U /*!< UFQFPN32 package type */
162 #define LL_UTILS_PACKAGETYPE_UFQFPN48 0x00000002U /*!< UFQFPN48 package type */
163 #define LL_UTILS_PACKAGETYPE_WLCSP41_SMPS 0x00000009U /*!< WLCSP41 with internal SMPS package type */
164 #define LL_UTILS_PACKAGETYPE_UFQFPN48_SMPS 0x0000000AU /*!< UFQFPN48 with internal SMPS package type */
165 #define LL_UTILS_PACKAGETYPE_UFBGA59 0x0000000BU /*!< UFBGA59 package type */
166 #endif /* defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx) */
167 /**
168 * @}
169 */
170
171 /**
172 * @}
173 */
174
175 /* Exported macro ------------------------------------------------------------*/
176
177 /* Exported functions --------------------------------------------------------*/
178 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
179 * @{
180 */
181
182 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
183 * @{
184 */
185
186 /**
187 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
188 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
189 */
LL_GetUID_Word0(void)190 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
191 {
192 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
193 }
194
195 /**
196 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
197 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
198 */
LL_GetUID_Word1(void)199 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
200 {
201 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
202 }
203
204 /**
205 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
206 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
207 */
LL_GetUID_Word2(void)208 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
209 {
210 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
211 }
212
213 /**
214 * @brief Get Flash memory size
215 * @note This bitfield indicates the size of the device Flash memory expressed in
216 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
217 * @retval FLASH_SIZE[15:0]: Flash memory size in Kbytes
218 */
LL_GetFlashSize(void)219 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
220 {
221 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU);
222 }
223
224 /**
225 * @brief Get Package type
226 * @retval Returned value can be one of the following values:
227 #if defined(STM32WBA52xx) || defined(STM32WBA54xx) || defined(STM32WBA55xx) || defined(STM32WBA5Mxx)
228 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32
229 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48
230 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP41_SMPS
231 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48_SMPS
232 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA59
233 #endif
234 */
LL_GetPackageType(void)235 __STATIC_INLINE uint32_t LL_GetPackageType(void)
236 {
237 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU);
238 }
239
240 /**
241 * @}
242 */
243
244 /** @defgroup UTILS_LL_EF_DELAY DELAY
245 * @{
246 */
247
248 /**
249 * @brief This function configures the Cortex-M SysTick source of the time base.
250 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
251 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
252 * configuration by calling this function, for a delay use rather osDelay RTOS service.
253 * @param Ticks Number of ticks
254 * @retval None
255 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)256 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
257 {
258 /* Configure the SysTick to have interrupt in 1ms time base */
259 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
260 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
261 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
262 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
263 }
264
265 void LL_Init1msTick(uint32_t HCLKFrequency);
266 void LL_Init1msTick_HCLK_Div8(uint32_t HCLKFrequency);
267 void LL_Init1msTick_LSE(void);
268 void LL_Init1msTick_LSI(void);
269 void LL_mDelay(uint32_t Delay);
270
271 /**
272 * @}
273 */
274
275 /** @defgroup UTILS_EF_SYSTEM SYSTEM
276 * @{
277 */
278
279 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
280 ErrorStatus LL_PLL1_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
281 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
282 ErrorStatus LL_PLL1_ConfigSystemClock_HSE(uint32_t HSEFrequency,
283 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
284 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
285 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
286 /**
287 * @}
288 */
289
290 /**
291 * @}
292 */
293
294 /**
295 * @}
296 */
297
298 /**
299 * @}
300 */
301
302 #ifdef __cplusplus
303 }
304 #endif
305
306 #endif /* __STM32WBAxx_LL_UTILS_H */
307
308
