1 /** 2 ****************************************************************************** 3 * @file stm32wb0x_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2024 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WB0x_HAL_UART_H 21 #define STM32WB0x_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wb0x_hal_def.h" 29 30 /** @addtogroup STM32WB0x_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 #if defined(HAL_DMA_MODULE_ENABLED) 126 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 127 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 128 129 #endif /* HAL_DMA_MODULE_ENABLED */ 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 /** 142 * @brief HAL UART State definition 143 * @note HAL UART State value is a combination of 2 different substates: 144 * gState and RxState (see @ref UART_State_Definition). 145 * - gState contains UART state information related to global Handle management 146 * and also information related to Tx operations. 147 * gState value coding follow below described bitmap : 148 * b7-b6 Error information 149 * 00 : No Error 150 * 01 : (Not Used) 151 * 10 : Timeout 152 * 11 : Error 153 * b5 Peripheral initialization status 154 * 0 : Reset (Peripheral not initialized) 155 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 156 * b4-b3 (not used) 157 * xx : Should be set to 00 158 * b2 Intrinsic process state 159 * 0 : Ready 160 * 1 : Busy (Peripheral busy with some configuration or internal operations) 161 * b1 (not used) 162 * x : Should be set to 0 163 * b0 Tx state 164 * 0 : Ready (no Tx operation ongoing) 165 * 1 : Busy (Tx operation ongoing) 166 * - RxState contains information related to Rx operations. 167 * RxState value coding follow below described bitmap : 168 * b7-b6 (not used) 169 * xx : Should be set to 00 170 * b5 Peripheral initialization status 171 * 0 : Reset (Peripheral not initialized) 172 * 1 : Init done (Peripheral initialized) 173 * b4-b2 (not used) 174 * xxx : Should be set to 000 175 * b1 Rx state 176 * 0 : Ready (no Rx operation ongoing) 177 * 1 : Busy (Rx operation ongoing) 178 * b0 (not used) 179 * x : Should be set to 0. 180 */ 181 typedef uint32_t HAL_UART_StateTypeDef; 182 183 /** 184 * @brief HAL UART Reception type definition 185 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 186 * This parameter can be a value of @ref UART_Reception_Type_Values : 187 * HAL_UART_RECEPTION_STANDARD = 0x00U, 188 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 189 * HAL_UART_RECEPTION_TORTO = 0x02U, 190 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 191 */ 192 typedef uint32_t HAL_UART_RxTypeTypeDef; 193 194 /** 195 * @brief HAL UART Rx Event type definition 196 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 197 * leading to call of the RxEvent callback. 198 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 199 * HAL_UART_RXEVENT_TC = 0x00U, 200 * HAL_UART_RXEVENT_HT = 0x01U, 201 * HAL_UART_RXEVENT_IDLE = 0x02U, 202 */ 203 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 204 205 /** 206 * @brief UART handle Structure definition 207 */ 208 typedef struct __UART_HandleTypeDef 209 { 210 USART_TypeDef *Instance; /*!< UART registers base address */ 211 212 UART_InitTypeDef Init; /*!< UART communication parameters */ 213 214 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 215 216 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 217 218 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 219 220 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 221 222 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 223 224 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 225 226 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 227 228 uint16_t Mask; /*!< UART Rx RDR register mask */ 229 230 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 231 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 232 233 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 234 235 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 236 237 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 238 239 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 240 241 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 242 243 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 244 245 #if defined(HAL_DMA_MODULE_ENABLED) 246 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 247 248 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 249 250 #endif /* HAL_DMA_MODULE_ENABLED */ 251 HAL_LockTypeDef Lock; /*!< Locking object */ 252 253 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 254 and also related to Tx operations. This parameter 255 can be a value of @ref HAL_UART_StateTypeDef */ 256 257 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 258 parameter can be a value of @ref HAL_UART_StateTypeDef */ 259 260 __IO uint32_t ErrorCode; /*!< UART Error code */ 261 262 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 263 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 264 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 265 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 266 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 267 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 268 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 269 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 270 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 271 #if defined(USART_CR1_UESM) 272 #if defined(USART_CR3_WUFIE) 273 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 274 #endif /* USART_CR3_WUFIE */ 275 #endif /* USART_CR1_UESM */ 276 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 277 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 278 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 279 280 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 281 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 282 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 283 284 } UART_HandleTypeDef; 285 286 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 287 /** 288 * @brief HAL UART Callback ID enumeration definition 289 */ 290 typedef enum 291 { 292 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 293 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 294 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 295 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 296 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 297 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 298 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 299 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 300 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 301 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 302 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 303 304 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 305 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 306 307 } HAL_UART_CallbackIDTypeDef; 308 309 /** 310 * @brief HAL UART Callback pointer definition 311 */ 312 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 313 typedef void (*pUART_RxEventCallbackTypeDef) 314 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 315 316 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 317 318 /** 319 * @} 320 */ 321 322 /* Exported constants --------------------------------------------------------*/ 323 /** @defgroup UART_Exported_Constants UART Exported Constants 324 * @{ 325 */ 326 327 /** @defgroup UART_State_Definition UART State Code Definition 328 * @{ 329 */ 330 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 331 Value is allowed for gState and RxState */ 332 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 333 Value is allowed for gState and RxState */ 334 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 335 Value is allowed for gState only */ 336 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 337 Value is allowed for gState only */ 338 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 339 Value is allowed for RxState only */ 340 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 341 Not to be used for neither gState nor RxState.Value is result 342 of combination (Or) between gState and RxState values */ 343 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 344 Value is allowed for gState only */ 345 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 346 Value is allowed for gState only */ 347 /** 348 * @} 349 */ 350 351 /** @defgroup UART_Error_Definition UART Error Definition 352 * @{ 353 */ 354 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 355 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 356 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 357 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 358 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 359 #if defined(HAL_DMA_MODULE_ENABLED) 360 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 361 #endif /* HAL_DMA_MODULE_ENABLED */ 362 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 363 364 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 365 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 366 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 367 /** 368 * @} 369 */ 370 371 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 372 * @{ 373 */ 374 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 375 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 376 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 377 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 378 /** 379 * @} 380 */ 381 382 /** @defgroup UART_Parity UART Parity 383 * @{ 384 */ 385 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 386 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 387 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 388 /** 389 * @} 390 */ 391 392 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 393 * @{ 394 */ 395 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 396 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 397 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 398 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 399 /** 400 * @} 401 */ 402 403 /** @defgroup UART_Mode UART Transfer Mode 404 * @{ 405 */ 406 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 407 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 408 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 409 /** 410 * @} 411 */ 412 413 /** @defgroup UART_State UART State 414 * @{ 415 */ 416 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 417 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 418 /** 419 * @} 420 */ 421 422 /** @defgroup UART_Over_Sampling UART Over Sampling 423 * @{ 424 */ 425 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 426 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 427 /** 428 * @} 429 */ 430 431 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 432 * @{ 433 */ 434 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 435 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 436 /** 437 * @} 438 */ 439 440 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 441 * @{ 442 */ 443 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 444 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 445 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 446 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 447 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 448 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 449 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 450 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 451 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 452 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 453 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 454 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 455 /** 456 * @} 457 */ 458 459 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 460 * @{ 461 */ 462 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 463 on start bit */ 464 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 465 on falling edge */ 466 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 467 on 0x7F frame detection */ 468 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 469 on 0x55 frame detection */ 470 /** 471 * @} 472 */ 473 474 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 475 * @{ 476 */ 477 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 478 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 479 /** 480 * @} 481 */ 482 483 /** @defgroup UART_LIN UART Local Interconnection Network mode 484 * @{ 485 */ 486 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 487 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 488 /** 489 * @} 490 */ 491 492 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 493 * @{ 494 */ 495 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 496 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 497 /** 498 * @} 499 */ 500 501 #if defined(HAL_DMA_MODULE_ENABLED) 502 /** @defgroup UART_DMA_Tx UART DMA Tx 503 * @{ 504 */ 505 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 506 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 507 /** 508 * @} 509 */ 510 511 /** @defgroup UART_DMA_Rx UART DMA Rx 512 * @{ 513 */ 514 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 515 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 516 /** 517 * @} 518 */ 519 #endif /* HAL_DMA_MODULE_ENABLED */ 520 521 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 522 * @{ 523 */ 524 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 525 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 526 /** 527 * @} 528 */ 529 530 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 531 * @{ 532 */ 533 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 534 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 535 /** 536 * @} 537 */ 538 539 /** @defgroup UART_Request_Parameters UART Request Parameters 540 * @{ 541 */ 542 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 543 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 544 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 545 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 546 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 547 /** 548 * @} 549 */ 550 551 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 552 * @{ 553 */ 554 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 555 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 556 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 557 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 558 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 559 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 560 #if defined(HAL_DMA_MODULE_ENABLED) 561 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 562 #endif /* HAL_DMA_MODULE_ENABLED */ 563 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 564 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 565 /** 566 * @} 567 */ 568 569 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 570 * @{ 571 */ 572 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 573 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 574 /** 575 * @} 576 */ 577 578 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 579 * @{ 580 */ 581 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 582 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 583 /** 584 * @} 585 */ 586 587 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 588 * @{ 589 */ 590 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 591 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 592 /** 593 * @} 594 */ 595 596 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 597 * @{ 598 */ 599 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 600 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 601 /** 602 * @} 603 */ 604 605 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 606 * @{ 607 */ 608 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 609 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 610 /** 611 * @} 612 */ 613 614 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 615 * @{ 616 */ 617 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 618 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 619 /** 620 * @} 621 */ 622 623 #if defined(HAL_DMA_MODULE_ENABLED) 624 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 625 * @{ 626 */ 627 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 628 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 629 /** 630 * @} 631 */ 632 #endif /* HAL_DMA_MODULE_ENABLED */ 633 634 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 635 * @{ 636 */ 637 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 638 first disable */ 639 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 640 first enable */ 641 /** 642 * @} 643 */ 644 #if defined(USART_CR1_UESM) 645 646 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 647 * @{ 648 */ 649 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 650 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 651 /** 652 * @} 653 */ 654 #endif /* USART_CR1_UESM */ 655 656 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 657 * @{ 658 */ 659 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 660 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 661 /** 662 * @} 663 */ 664 665 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 666 * @{ 667 */ 668 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 669 /** 670 * @} 671 */ 672 #if defined(USART_CR1_UESM) 673 674 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 675 * @{ 676 */ 677 #if defined(USART_CR3_WUS) 678 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 679 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 680 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 681 not empty or RXFIFO is not empty */ 682 #else 683 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 684 #define UART_WAKEUP_ON_READDATA_NONEMPTY 0x00000001U /*!< UART wake-up on receive data register 685 not empty or RXFIFO is not empty */ 686 #endif /* USART_CR3_WUS */ 687 /** 688 * @} 689 */ 690 #endif /* USART_CR1_UESM */ 691 692 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 693 * @{ 694 */ 695 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 696 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 697 /** 698 * @} 699 */ 700 701 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 702 * @{ 703 */ 704 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 705 position in CR1 register */ 706 /** 707 * @} 708 */ 709 710 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 711 * @{ 712 */ 713 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 714 position in CR1 register */ 715 /** 716 * @} 717 */ 718 719 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 720 * @{ 721 */ 722 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 723 /** 724 * @} 725 */ 726 727 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 728 * @{ 729 */ 730 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 731 /** 732 * @} 733 */ 734 735 /** @defgroup UART_Flags UART Status Flags 736 * Elements values convention: 0xXXXX 737 * - 0xXXXX : Flag mask in the ISR register 738 * @{ 739 */ 740 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 741 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 742 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 743 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 744 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 745 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 746 #if defined(USART_CR1_UESM) 747 #if defined(USART_CR3_WUFIE) 748 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 749 #endif /* USART_CR3_WUFIE */ 750 #endif /* USART_CR1_UESM */ 751 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 752 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 753 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 754 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 755 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 756 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 757 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 758 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 759 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 760 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 761 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 762 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 763 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 764 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 765 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 766 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 767 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 768 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 769 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 770 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 771 /** 772 * @} 773 */ 774 775 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 776 * Elements values convention: 000ZZZZZ0XXYYYYYb 777 * - YYYYY : Interrupt source position in the XX register (5bits) 778 * - XX : Interrupt source register (2bits) 779 * - 01: CR1 register 780 * - 10: CR2 register 781 * - 11: CR3 register 782 * - ZZZZZ : Flag position in the ISR register(5bits) 783 * Elements values convention: 000000000XXYYYYYb 784 * - YYYYY : Interrupt source position in the XX register (5bits) 785 * - XX : Interrupt source register (2bits) 786 * - 01: CR1 register 787 * - 10: CR2 register 788 * - 11: CR3 register 789 * Elements values convention: 0000ZZZZ00000000b 790 * - ZZZZ : Flag position in the ISR register(4bits) 791 * @{ 792 */ 793 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 794 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 795 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 796 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 797 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 798 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 799 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 800 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 801 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 802 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 803 #if defined(USART_CR1_UESM) 804 #if defined(USART_CR3_WUFIE) 805 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 806 #endif /* USART_CR3_WUFIE */ 807 #endif /* USART_CR1_UESM */ 808 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 809 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 810 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 811 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 812 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 813 814 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 815 816 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 817 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 818 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 819 /** 820 * @} 821 */ 822 823 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 824 * @{ 825 */ 826 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 827 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 828 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 829 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 830 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 831 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 832 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 833 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 834 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 835 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 836 #if defined(USART_CR1_UESM) 837 #if defined(USART_CR3_WUFIE) 838 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 839 #endif /* USART_CR3_WUFIE */ 840 #endif /* USART_CR1_UESM */ 841 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 842 /** 843 * @} 844 */ 845 846 /** @defgroup UART_Reception_Type_Values UART Reception type values 847 * @{ 848 */ 849 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 850 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 851 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 852 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 853 /** 854 * @} 855 */ 856 857 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 858 * @{ 859 */ 860 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 861 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 862 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 863 /** 864 * @} 865 */ 866 867 /** 868 * @} 869 */ 870 871 /* Exported macros -----------------------------------------------------------*/ 872 /** @defgroup UART_Exported_Macros UART Exported Macros 873 * @{ 874 */ 875 876 /** @brief Reset UART handle states. 877 * @param __HANDLE__ UART handle. 878 * @retval None 879 */ 880 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 881 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 882 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 883 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 884 (__HANDLE__)->MspInitCallback = NULL; \ 885 (__HANDLE__)->MspDeInitCallback = NULL; \ 886 } while(0U) 887 #else 888 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 889 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 890 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 891 } while(0U) 892 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 893 894 /** @brief Flush the UART Data registers. 895 * @param __HANDLE__ specifies the UART Handle. 896 * @retval None 897 */ 898 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 899 do{ \ 900 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 901 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 902 } while(0U) 903 904 /** @brief Clear the specified UART pending flag. 905 * @param __HANDLE__ specifies the UART Handle. 906 * @param __FLAG__ specifies the flag to check. 907 * This parameter can be any combination of the following values: 908 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 909 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 910 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 911 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 912 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 913 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 914 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 915 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 916 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 917 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 918 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 919 #if defined(USART_CR1_UESM) 920 #if defined(USART_CR3_WUFIE) 921 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 922 #endif 923 #endif 924 * @retval None 925 */ 926 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 927 928 /** @brief Clear the UART PE pending flag. 929 * @param __HANDLE__ specifies the UART Handle. 930 * @retval None 931 */ 932 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 933 934 /** @brief Clear the UART FE pending flag. 935 * @param __HANDLE__ specifies the UART Handle. 936 * @retval None 937 */ 938 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 939 940 /** @brief Clear the UART NE pending flag. 941 * @param __HANDLE__ specifies the UART Handle. 942 * @retval None 943 */ 944 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 945 946 /** @brief Clear the UART ORE pending flag. 947 * @param __HANDLE__ specifies the UART Handle. 948 * @retval None 949 */ 950 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 951 952 /** @brief Clear the UART IDLE pending flag. 953 * @param __HANDLE__ specifies the UART Handle. 954 * @retval None 955 */ 956 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 957 958 /** @brief Clear the UART TX FIFO empty clear flag. 959 * @param __HANDLE__ specifies the UART Handle. 960 * @retval None 961 */ 962 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 963 964 /** @brief Check whether the specified UART flag is set or not. 965 * @param __HANDLE__ specifies the UART Handle. 966 * @param __FLAG__ specifies the flag to check. 967 * This parameter can be one of the following values: 968 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 969 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 970 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 971 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 972 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 973 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 974 #if defined(USART_CR1_UESM) 975 #if defined(USART_CR3_WUFIE) 976 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 977 #endif 978 #endif 979 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 980 * @arg @ref UART_FLAG_SBKF Send Break flag 981 * @arg @ref UART_FLAG_CMF Character match flag 982 * @arg @ref UART_FLAG_BUSY Busy flag 983 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 984 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 985 * @arg @ref UART_FLAG_CTS CTS Change flag 986 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 987 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 988 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 989 * @arg @ref UART_FLAG_TC Transmission Complete flag 990 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 991 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 992 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 993 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 994 * @arg @ref UART_FLAG_ORE Overrun Error flag 995 * @arg @ref UART_FLAG_NE Noise Error flag 996 * @arg @ref UART_FLAG_FE Framing Error flag 997 * @arg @ref UART_FLAG_PE Parity Error flag 998 * @retval The new state of __FLAG__ (TRUE or FALSE). 999 */ 1000 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 1001 1002 /** @brief Enable the specified UART interrupt. 1003 * @param __HANDLE__ specifies the UART Handle. 1004 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 1005 * This parameter can be one of the following values: 1006 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1007 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1008 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1009 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1010 #if defined(USART_CR1_UESM) 1011 #if defined(USART_CR3_WUFIE) 1012 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1013 #endif 1014 #endif 1015 * @arg @ref UART_IT_CM Character match interrupt 1016 * @arg @ref UART_IT_CTS CTS change interrupt 1017 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1018 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1019 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1020 * @arg @ref UART_IT_TC Transmission complete interrupt 1021 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1022 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1023 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1024 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1025 * @arg @ref UART_IT_PE Parity Error interrupt 1026 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1027 * @retval None 1028 */ 1029 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1030 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1031 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1032 ((__INTERRUPT__) & UART_IT_MASK))): \ 1033 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1034 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1035 ((__INTERRUPT__) & UART_IT_MASK))): \ 1036 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1037 ((__INTERRUPT__) & UART_IT_MASK)))) 1038 1039 /** @brief Disable the specified UART interrupt. 1040 * @param __HANDLE__ specifies the UART Handle. 1041 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1042 * This parameter can be one of the following values: 1043 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1044 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1045 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1046 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1047 #if defined(USART_CR1_UESM) 1048 #if defined(USART_CR3_WUFIE) 1049 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1050 #endif 1051 #endif 1052 * @arg @ref UART_IT_CM Character match interrupt 1053 * @arg @ref UART_IT_CTS CTS change interrupt 1054 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1055 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1056 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1057 * @arg @ref UART_IT_TC Transmission complete interrupt 1058 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1059 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1060 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1061 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1062 * @arg @ref UART_IT_PE Parity Error interrupt 1063 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1064 * @retval None 1065 */ 1066 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1067 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1068 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1069 ((__INTERRUPT__) & UART_IT_MASK))): \ 1070 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1071 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1072 ((__INTERRUPT__) & UART_IT_MASK))): \ 1073 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1074 ((__INTERRUPT__) & UART_IT_MASK)))) 1075 1076 /** @brief Check whether the specified UART interrupt has occurred or not. 1077 * @param __HANDLE__ specifies the UART Handle. 1078 * @param __INTERRUPT__ specifies the UART interrupt to check. 1079 * This parameter can be one of the following values: 1080 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1081 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1082 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1083 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1084 #if defined(USART_CR1_UESM) 1085 #if defined(USART_CR3_WUFIE) 1086 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1087 #endif 1088 #endif 1089 * @arg @ref UART_IT_CM Character match interrupt 1090 * @arg @ref UART_IT_CTS CTS change interrupt 1091 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1092 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1093 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1094 * @arg @ref UART_IT_TC Transmission complete interrupt 1095 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1096 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1097 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1098 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1099 * @arg @ref UART_IT_PE Parity Error interrupt 1100 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1101 * @retval The new state of __INTERRUPT__ (SET or RESET). 1102 */ 1103 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1104 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1105 1106 /** @brief Check whether the specified UART interrupt source is enabled or not. 1107 * @param __HANDLE__ specifies the UART Handle. 1108 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1109 * This parameter can be one of the following values: 1110 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1111 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1112 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1113 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1114 #if defined(USART_CR1_UESM) 1115 #if defined(USART_CR3_WUFIE) 1116 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1117 #endif 1118 #endif 1119 * @arg @ref UART_IT_CM Character match interrupt 1120 * @arg @ref UART_IT_CTS CTS change interrupt 1121 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1122 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1123 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1124 * @arg @ref UART_IT_TC Transmission complete interrupt 1125 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1126 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1127 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1128 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1129 * @arg @ref UART_IT_PE Parity Error interrupt 1130 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1131 * @retval The new state of __INTERRUPT__ (SET or RESET). 1132 */ 1133 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1134 (__HANDLE__)->Instance->CR1 : \ 1135 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1136 (__HANDLE__)->Instance->CR2 : \ 1137 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1138 (((uint16_t)(__INTERRUPT__)) &\ 1139 UART_IT_MASK))) != RESET) ? SET : RESET) 1140 1141 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1142 * @param __HANDLE__ specifies the UART Handle. 1143 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1144 * to clear the corresponding interrupt 1145 * This parameter can be one of the following values: 1146 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1147 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1148 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1149 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1150 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1151 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1152 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1153 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1154 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1155 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1156 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1157 #if defined(USART_CR1_UESM) 1158 #if defined(USART_CR3_WUFIE) 1159 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1160 #endif 1161 #endif 1162 * @retval None 1163 */ 1164 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1165 1166 /** @brief Set a specific UART request flag. 1167 * @param __HANDLE__ specifies the UART Handle. 1168 * @param __REQ__ specifies the request flag to set 1169 * This parameter can be one of the following values: 1170 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1171 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1172 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1173 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1174 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1175 * @retval None 1176 */ 1177 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1178 1179 /** @brief Enable the UART one bit sample method. 1180 * @param __HANDLE__ specifies the UART Handle. 1181 * @retval None 1182 */ 1183 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1184 1185 /** @brief Disable the UART one bit sample method. 1186 * @param __HANDLE__ specifies the UART Handle. 1187 * @retval None 1188 */ 1189 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1190 1191 /** @brief Enable UART. 1192 * @param __HANDLE__ specifies the UART Handle. 1193 * @retval None 1194 */ 1195 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1196 1197 /** @brief Disable UART. 1198 * @param __HANDLE__ specifies the UART Handle. 1199 * @retval None 1200 */ 1201 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1202 1203 /** @brief Enable CTS flow control. 1204 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1205 * without need to call HAL_UART_Init() function. 1206 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1207 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1208 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1209 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1210 * - macro could only be called when corresponding UART instance is disabled 1211 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1212 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1213 * @param __HANDLE__ specifies the UART Handle. 1214 * @retval None 1215 */ 1216 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1217 do{ \ 1218 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1219 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1220 } while(0U) 1221 1222 /** @brief Disable CTS flow control. 1223 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1224 * without need to call HAL_UART_Init() function. 1225 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1226 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1227 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1228 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1229 * - macro could only be called when corresponding UART instance is disabled 1230 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1231 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1232 * @param __HANDLE__ specifies the UART Handle. 1233 * @retval None 1234 */ 1235 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1236 do{ \ 1237 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1238 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1239 } while(0U) 1240 1241 /** @brief Enable RTS flow control. 1242 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1243 * without need to call HAL_UART_Init() function. 1244 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1245 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1246 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1247 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1248 * - macro could only be called when corresponding UART instance is disabled 1249 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1250 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1251 * @param __HANDLE__ specifies the UART Handle. 1252 * @retval None 1253 */ 1254 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1255 do{ \ 1256 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1257 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1258 } while(0U) 1259 1260 /** @brief Disable RTS flow control. 1261 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1262 * without need to call HAL_UART_Init() function. 1263 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1264 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1265 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1266 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1267 * - macro could only be called when corresponding UART instance is disabled 1268 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1269 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1270 * @param __HANDLE__ specifies the UART Handle. 1271 * @retval None 1272 */ 1273 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1274 do{ \ 1275 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1276 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1277 } while(0U) 1278 /** 1279 * @} 1280 */ 1281 1282 /* Private macros --------------------------------------------------------*/ 1283 /** @defgroup UART_Private_Macros UART Private Macros 1284 * @{ 1285 */ 1286 /** @brief Get UART clok division factor from clock prescaler value. 1287 * @param __CLOCKPRESCALER__ UART prescaler value. 1288 * @retval UART clock division factor 1289 */ 1290 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1291 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1292 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1293 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1294 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1295 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1296 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1297 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1298 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1299 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1300 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1301 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1302 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1303 1304 /** @brief BRR division operation to set BRR register with LPUART. 1305 * @param __PCLK__ LPUART clock. 1306 * @param __BAUD__ Baud rate set by the user. 1307 * @param __CLOCKPRESCALER__ UART prescaler value. 1308 * @retval Division result 1309 */ 1310 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1311 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1312 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1313 ) 1314 1315 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1316 * @param __PCLK__ UART clock. 1317 * @param __BAUD__ Baud rate set by the user. 1318 * @param __CLOCKPRESCALER__ UART prescaler value. 1319 * @retval Division result 1320 */ 1321 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1322 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1323 1324 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1325 * @param __PCLK__ UART clock. 1326 * @param __BAUD__ Baud rate set by the user. 1327 * @param __CLOCKPRESCALER__ UART prescaler value. 1328 * @retval Division result 1329 */ 1330 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1331 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1332 1333 /** @brief Check whether or not UART instance is Low Power UART. 1334 * @param __HANDLE__ specifies the UART Handle. 1335 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1336 */ 1337 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1338 1339 /** @brief Check UART Baud rate. 1340 * @param __BAUDRATE__ Baudrate specified by the user. 1341 * The maximum Baud Rate is derived from the maximum clock on WB0 (i.e. 16 MHz) 1342 * divided by the smallest oversampling used on the USART (i.e. 8) 1343 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1344 */ 1345 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 2000001U) 1346 1347 /** @brief Check UART assertion time. 1348 * @param __TIME__ 5-bit value assertion time. 1349 * @retval Test result (TRUE or FALSE). 1350 */ 1351 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1352 1353 /** @brief Check UART deassertion time. 1354 * @param __TIME__ 5-bit value deassertion time. 1355 * @retval Test result (TRUE or FALSE). 1356 */ 1357 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1358 1359 /** 1360 * @brief Ensure that UART frame number of stop bits is valid. 1361 * @param __STOPBITS__ UART frame number of stop bits. 1362 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1363 */ 1364 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1365 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1366 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1367 ((__STOPBITS__) == UART_STOPBITS_2)) 1368 1369 /** 1370 * @brief Ensure that LPUART frame number of stop bits is valid. 1371 * @param __STOPBITS__ LPUART frame number of stop bits. 1372 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1373 */ 1374 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1375 ((__STOPBITS__) == UART_STOPBITS_2)) 1376 1377 /** 1378 * @brief Ensure that UART frame parity is valid. 1379 * @param __PARITY__ UART frame parity. 1380 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1381 */ 1382 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1383 ((__PARITY__) == UART_PARITY_EVEN) || \ 1384 ((__PARITY__) == UART_PARITY_ODD)) 1385 1386 /** 1387 * @brief Ensure that UART hardware flow control is valid. 1388 * @param __CONTROL__ UART hardware flow control. 1389 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1390 */ 1391 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1392 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1393 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1394 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1395 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1396 1397 /** 1398 * @brief Ensure that UART communication mode is valid. 1399 * @param __MODE__ UART communication mode. 1400 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1401 */ 1402 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1403 1404 /** 1405 * @brief Ensure that UART state is valid. 1406 * @param __STATE__ UART state. 1407 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1408 */ 1409 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1410 ((__STATE__) == UART_STATE_ENABLE)) 1411 1412 /** 1413 * @brief Ensure that UART oversampling is valid. 1414 * @param __SAMPLING__ UART oversampling. 1415 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1416 */ 1417 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1418 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1419 1420 /** 1421 * @brief Ensure that UART frame sampling is valid. 1422 * @param __ONEBIT__ UART frame sampling. 1423 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1424 */ 1425 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1426 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1427 1428 /** 1429 * @brief Ensure that UART auto Baud rate detection mode is valid. 1430 * @param __MODE__ UART auto Baud rate detection mode. 1431 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1432 */ 1433 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1434 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1435 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1436 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1437 1438 /** 1439 * @brief Ensure that UART receiver timeout setting is valid. 1440 * @param __TIMEOUT__ UART receiver timeout setting. 1441 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1442 */ 1443 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1444 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1445 1446 /** @brief Check the receiver timeout value. 1447 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1448 * @param __TIMEOUTVALUE__ receiver timeout value. 1449 * @retval Test result (TRUE or FALSE) 1450 */ 1451 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1452 1453 /** 1454 * @brief Ensure that UART LIN state is valid. 1455 * @param __LIN__ UART LIN state. 1456 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1457 */ 1458 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1459 ((__LIN__) == UART_LIN_ENABLE)) 1460 1461 /** 1462 * @brief Ensure that UART LIN break detection length is valid. 1463 * @param __LENGTH__ UART LIN break detection length. 1464 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1465 */ 1466 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1467 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1468 1469 #if defined(HAL_DMA_MODULE_ENABLED) 1470 /** 1471 * @brief Ensure that UART DMA TX state is valid. 1472 * @param __DMATX__ UART DMA TX state. 1473 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1474 */ 1475 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1476 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1477 1478 /** 1479 * @brief Ensure that UART DMA RX state is valid. 1480 * @param __DMARX__ UART DMA RX state. 1481 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1482 */ 1483 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1484 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1485 1486 #endif /* HAL_DMA_MODULE_ENABLED */ 1487 /** 1488 * @brief Ensure that UART half-duplex state is valid. 1489 * @param __HDSEL__ UART half-duplex state. 1490 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1491 */ 1492 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1493 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1494 1495 /** 1496 * @brief Ensure that UART wake-up method is valid. 1497 * @param __WAKEUP__ UART wake-up method . 1498 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1499 */ 1500 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1501 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1502 1503 /** 1504 * @brief Ensure that UART request parameter is valid. 1505 * @param __PARAM__ UART request parameter. 1506 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1507 */ 1508 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1509 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1510 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1511 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1512 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1513 1514 /** 1515 * @brief Ensure that UART advanced features initialization is valid. 1516 * @param __INIT__ UART advanced features initialization. 1517 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1518 */ 1519 #if defined(HAL_DMA_MODULE_ENABLED) 1520 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1521 UART_ADVFEATURE_TXINVERT_INIT | \ 1522 UART_ADVFEATURE_RXINVERT_INIT | \ 1523 UART_ADVFEATURE_DATAINVERT_INIT | \ 1524 UART_ADVFEATURE_SWAP_INIT | \ 1525 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1526 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1527 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1528 UART_ADVFEATURE_MSBFIRST_INIT)) 1529 #else 1530 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1531 UART_ADVFEATURE_TXINVERT_INIT | \ 1532 UART_ADVFEATURE_RXINVERT_INIT | \ 1533 UART_ADVFEATURE_DATAINVERT_INIT | \ 1534 UART_ADVFEATURE_SWAP_INIT | \ 1535 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1536 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1537 UART_ADVFEATURE_MSBFIRST_INIT)) 1538 #endif /* HAL_DMA_MODULE_ENABLED */ 1539 1540 /** 1541 * @brief Ensure that UART frame TX inversion setting is valid. 1542 * @param __TXINV__ UART frame TX inversion setting. 1543 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1544 */ 1545 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1546 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1547 1548 /** 1549 * @brief Ensure that UART frame RX inversion setting is valid. 1550 * @param __RXINV__ UART frame RX inversion setting. 1551 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1552 */ 1553 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1554 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1555 1556 /** 1557 * @brief Ensure that UART frame data inversion setting is valid. 1558 * @param __DATAINV__ UART frame data inversion setting. 1559 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1560 */ 1561 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1562 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1563 1564 /** 1565 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1566 * @param __SWAP__ UART frame RX/TX pins swap setting. 1567 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1568 */ 1569 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1570 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1571 1572 /** 1573 * @brief Ensure that UART frame overrun setting is valid. 1574 * @param __OVERRUN__ UART frame overrun setting. 1575 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1576 */ 1577 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1578 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1579 1580 /** 1581 * @brief Ensure that UART auto Baud rate state is valid. 1582 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1583 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1584 */ 1585 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1586 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1587 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1588 1589 #if defined(HAL_DMA_MODULE_ENABLED) 1590 /** 1591 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1592 * @param __DMA__ UART DMA enabling or disabling on error setting. 1593 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1594 */ 1595 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1596 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1597 #endif /* HAL_DMA_MODULE_ENABLED */ 1598 1599 /** 1600 * @brief Ensure that UART frame MSB first setting is valid. 1601 * @param __MSBFIRST__ UART frame MSB first setting. 1602 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1603 */ 1604 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1605 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1606 1607 #if defined(USART_CR1_UESM) 1608 /** 1609 * @brief Ensure that UART stop mode state is valid. 1610 * @param __STOPMODE__ UART stop mode state. 1611 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1612 */ 1613 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1614 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1615 1616 #endif /* USART_CR1_UESM */ 1617 /** 1618 * @brief Ensure that UART mute mode state is valid. 1619 * @param __MUTE__ UART mute mode state. 1620 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1621 */ 1622 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1623 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1624 #if defined(USART_CR1_UESM) 1625 1626 /** 1627 * @brief Ensure that UART wake-up selection is valid. 1628 * @param __WAKE__ UART wake-up selection. 1629 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1630 */ 1631 #if defined(USART_CR3_WUFIE) 1632 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1633 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1634 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1635 #else 1636 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1637 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1638 #endif /* USART_CR3_WUFIE */ 1639 #endif /* USART_CR1_UESM */ 1640 1641 /** 1642 * @brief Ensure that UART driver enable polarity is valid. 1643 * @param __POLARITY__ UART driver enable polarity. 1644 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1645 */ 1646 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1647 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1648 1649 /** 1650 * @brief Ensure that UART Prescaler is valid. 1651 * @param __CLOCKPRESCALER__ UART Prescaler value. 1652 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1653 */ 1654 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1655 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1656 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1657 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1658 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1659 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1660 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1661 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1662 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1663 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1664 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1665 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1666 1667 /** 1668 * @} 1669 */ 1670 1671 /* Include UART HAL Extended module */ 1672 #include "stm32wb0x_hal_uart_ex.h" 1673 1674 /* Exported functions --------------------------------------------------------*/ 1675 /** @addtogroup UART_Exported_Functions UART Exported Functions 1676 * @{ 1677 */ 1678 1679 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1680 * @{ 1681 */ 1682 1683 /* Initialization and de-initialization functions ****************************/ 1684 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1685 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1686 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1687 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1688 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1689 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1690 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1691 1692 /* Callbacks Register/UnRegister functions ***********************************/ 1693 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1694 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1695 pUART_CallbackTypeDef pCallback); 1696 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1697 1698 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1699 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1700 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1701 1702 /** 1703 * @} 1704 */ 1705 1706 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1707 * @{ 1708 */ 1709 1710 /* IO operation functions *****************************************************/ 1711 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1712 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1713 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1714 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1715 #if defined(HAL_DMA_MODULE_ENABLED) 1716 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1717 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1718 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1719 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1720 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1721 #endif /* HAL_DMA_MODULE_ENABLED */ 1722 /* Transfer Abort functions */ 1723 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1724 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1725 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1726 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1727 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1728 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1729 1730 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1731 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1732 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1733 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1734 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1735 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1736 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1737 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1738 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1739 1740 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1741 1742 /** 1743 * @} 1744 */ 1745 1746 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1747 * @{ 1748 */ 1749 1750 /* Peripheral Control functions ************************************************/ 1751 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1752 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1753 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1754 1755 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1756 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1757 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1758 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1759 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1760 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1761 1762 /** 1763 * @} 1764 */ 1765 1766 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1767 * @{ 1768 */ 1769 1770 /* Peripheral State and Errors functions **************************************************/ 1771 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1772 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1773 1774 /** 1775 * @} 1776 */ 1777 1778 /** 1779 * @} 1780 */ 1781 1782 /* Private functions -----------------------------------------------------------*/ 1783 /** @addtogroup UART_Private_Functions UART Private Functions 1784 * @{ 1785 */ 1786 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1787 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1788 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1789 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1790 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1791 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1792 uint32_t Tickstart, uint32_t Timeout); 1793 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1794 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1795 #if defined(HAL_DMA_MODULE_ENABLED) 1796 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1797 #endif /* HAL_DMA_MODULE_ENABLED */ 1798 1799 /** 1800 * @} 1801 */ 1802 1803 /* Private variables -----------------------------------------------------------*/ 1804 /** @defgroup UART_Private_variables UART Private variables 1805 * @{ 1806 */ 1807 /* Prescaler Table used in BRR computation macros. 1808 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1809 extern const uint16_t UARTPrescTable[12]; 1810 /** 1811 * @} 1812 */ 1813 1814 /** 1815 * @} 1816 */ 1817 1818 /** 1819 * @} 1820 */ 1821 1822 #ifdef __cplusplus 1823 } 1824 #endif 1825 1826 #endif /* STM32WB0x_HAL_UART_H */ 1827
