1 /**
2 ******************************************************************************
3 * @file stm32wb0x_hal_adc.c
4 * @author GPM Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Converter (ADC)
7 * peripheral:
8 * + Initialization and de-initialization functions
9 * + Peripheral Control functions
10 * + Peripheral State functions
11 * Other functions (extended functions) are available in file
12 * "stm32wb0x_hal_adc_ex.c".
13 *
14 ******************************************************************************
15 * @attention
16 *
17 * Copyright (c) 2024 STMicroelectronics.
18 * All rights reserved.
19 *
20 * This software is licensed under terms that can be found in the LICENSE file
21 * in the root directory of this software component.
22 * If no LICENSE file comes with this software, it is provided AS-IS.
23 *
24 ******************************************************************************
25 @verbatim
26 ==============================================================================
27 ##### ADC peripheral features #####
28 ==============================================================================
29 [..]
30 (+) Conversion frequency is up to 1 Msps.
31
32 (+) Three input voltage ranges are supported (0V : 1.2V, 0V : 2.4V, 0V : 3.6V).
33
34 (+) Up to eight analog single ended channels or four analog differential inputs or a mix of
35 both.
36
37 (+) Temperature sensor conversion.
38
39 (+) Battery level conversion up to 3.6V.
40
41 (+) Continuous or single acquisition.
42
43 (+) ADC Down Sampler for multi-purpose applications to improve analog performance
44 while off-loading the CPU (ratio adjustable from 1 to 128).
45
46 (+) A watchdog feature to inform when data is outside thresholds.
47
48 (+) DMA capability.
49
50 (+) Interrupt sources with flags.
51
52 ##### How to use this driver #####
53 ==============================================================================
54 [..]
55
56 *** Configuration of top level parameters related to ADC ***
57 ============================================================
58 [..]
59
60 (#) Enable the ADC interface
61 (++) As prerequisite, ADC clock must be configured at RCC top level.
62
63 (++) Example:
64 Into HAL_ADC_MspInit() (recommended code location) or with
65 other device clock parameters configuration:
66 (+++) __HAL_RCC_ADC_CLK_ENABLE(); (mandatory)
67
68 (#) ADC pins configuration
69 (++) Enable the clock for the ADC GPIOs
70 using macro __HAL_RCC_GPIOx_CLK_ENABLE()
71 (++) Configure these ADC pins in analog mode
72 using function HAL_GPIO_Init()
73
74 (#) Optionally, in case of usage of ADC with interruptions:
75 (++) Configure the NVIC for ADC
76 using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
77 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
78 into the function of corresponding ADC interruption vector
79 ADC_IRQHandler().
80
81 (#) Optionally, in case of usage of DMA:
82 (++) Configure the DMA (DMA channel, mode normal or circular, ...)
83 using function HAL_DMA_Init().
84 (++) Configure the NVIC for DMA
85 using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
86 (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
87 into the function of corresponding DMA interruption vector
88 DMAx_Channelx_IRQHandler().
89
90 *** Configuration of ADC, channels parameters ***
91 ================================================================
92 [..]
93
94 (#) Configure the ADC parameters using function HAL_ADC_Init().
95
96 (#) Configure the channels using the function HAL_ADC_ConfigChannel().
97
98 (#) Optionally, configure the analog watchdog parameters (channels
99 monitored, thresholds, ...)
100 using function HAL_ADC_AWDConfig().
101
102 *** Execution of ADC conversions ***
103 ====================================
104 [..]
105
106 (#) ADC driver can be used among three modes: polling, interruption,
107 transfer by DMA.
108
109 (++) ADC conversion by polling:
110 (+++) Activate the ADC peripheral and start conversions
111 using function HAL_ADC_Start()
112 (+++) Wait for ADC conversion completion
113 using function HAL_ADC_PollForConversion()
114 (+++) Retrieve conversion results
115 using function HAL_ADC_GetValue()
116 (+++) Stop conversion and disable the ADC peripheral
117 using function HAL_ADC_Stop()
118
119 (++) ADC conversion by interruption:
120 (+++) Activate the ADC peripheral and start conversions
121 using function HAL_ADC_Start_IT()
122 (+++) Wait for ADC conversion completion by call of function
123 HAL_ADC_ConvCpltCallback()
124 (this function must be implemented in user program)
125 (+++) Retrieve conversion results
126 using function HAL_ADC_GetValue()
127 (+++) Stop conversion and disable the ADC peripheral
128 using function HAL_ADC_Stop_IT()
129
130 (++) ADC conversion with transfer by DMA:
131 (+++) Activate the ADC peripheral and start conversions
132 using function HAL_ADC_Start_DMA()
133 (+++) Wait for ADC conversion completion by call of function
134 HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
135 (these functions must be implemented in user program)
136 (+++) Conversion results are automatically transferred by DMA into
137 destination variable address.
138 (+++) Stop conversion and disable the ADC peripheral
139 using function HAL_ADC_Stop_DMA()
140
141 [..]
142
143 (@) Callback functions must be implemented in user program:
144 (+@) HAL_ADC_ErrorCallback()
145 (+@) LevelOutOfWindowCallback() (callback of analog watchdog)
146 (+@) HAL_ADC_ConvCpltCallback()
147 (+@) HAL_ADC_ConvHalfCpltCallback
148
149 *** Deinitialization of ADC ***
150 ============================================================
151 [..]
152
153 (#) Disable the ADC interface
154 (++) ADC clock can be hard reset and disabled at RCC top level.
155 (++) Hard reset of ADC peripherals
156 using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
157 (++) ADC clock disable
158 using the equivalent macro/functions as configuration step.
159 (+++) Example:
160 Into HAL_ADC_MspDeInit() (recommended code location).
161
162 (#) ADC pins configuration
163 (++) Disable the clock for the ADC GPIOs
164 using macro __HAL_RCC_GPIOx_CLK_DISABLE()
165
166 (#) Optionally, in case of usage of ADC with interruptions:
167 (++) Disable the NVIC for ADC
168 using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
169
170 (#) Optionally, in case of usage of DMA:
171 (++) Deinitialize the DMA
172 using function HAL_DMA_Init().
173 (++) Disable the NVIC for DMA
174 using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
175
176 [..]
177
178 *** Callback registration ***
179 =============================================
180 [..]
181
182 The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
183 allows the user to configure dynamically the driver callbacks.
184 Use Functions @ref HAL_ADC_RegisterCallback() to register an interrupt callback.
185 [..]
186
187 Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
188 (+) ConvCpltCallback : ADC conversion complete callback
189 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
190 (+) LevelOutOfWindowCallback : ADC analog watchdog callback
191 (+) ErrorCallback : ADC error callback
192 (+) MspInitCallback : ADC Msp Init callback
193 (+) MspDeInitCallback : ADC Msp DeInit callback
194 This function takes as parameters the HAL peripheral handle, the Callback ID
195 and a pointer to the user callback function.
196 [..]
197
198 Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
199 weak function.
200 [..]
201
202 @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
203 and the Callback ID.
204 This function allows to reset following callbacks:
205 (+) ConvCpltCallback : ADC conversion complete callback
206 (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
207 (+) LevelOutOfWindowCallback : ADC analog watchdog callback
208 (+) ErrorCallback : ADC error callback
209 (+) MspInitCallback : ADC Msp Init callback
210 (+) MspDeInitCallback : ADC Msp DeInit callback
211 [..]
212
213 By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
214 all callbacks are set to the corresponding weak functions:
215 examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
216 Exception done for MspInit and MspDeInit functions that are
217 reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
218 these callbacks are null (not registered beforehand).
219 [..]
220
221 If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
222 keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
223 [..]
224
225 Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
226 Exception done MspInit/MspDeInit functions that can be registered/unregistered
227 in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
228 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
229 [..]
230
231 Then, the user first registers the MspInit/MspDeInit user callbacks
232 using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
233 or @ref HAL_ADC_Init() function.
234 [..]
235
236 When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
237 not defined, the callback registration feature is not available and all callbacks
238 are set to the corresponding weak functions.
239
240 @endverbatim
241 */
242
243 /* Includes ------------------------------------------------------------------*/
244 #include "stm32wb0x_hal.h"
245
246 /** @addtogroup STM32WB0x_HAL_Driver
247 * @{
248 */
249
250 /** @defgroup ADC ADC
251 * @brief ADC HAL module driver
252 * @{
253 */
254
255 #ifdef HAL_ADC_MODULE_ENABLED
256
257 /* Private typedef -----------------------------------------------------------*/
258 /* Private define ------------------------------------------------------------*/
259
260 #define ADC_VBIAS_PRECH_DELAY_PRESC_MAX_VALUE (1020UL) /*!< Used to configure the VBIAS precharge pulse duration.
261 With PRECH_DELAY_SEL=0, the maximum delay is 1.02 ms
262 (255 x 4 us). */
263
264 /* Private macro -------------------------------------------------------------*/
265 /* Private variables ---------------------------------------------------------*/
266 /* Private function prototypes -----------------------------------------------*/
267 HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc);
268 HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc);
269 HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc);
270 void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
271 void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
272 void ADC_DMAError(DMA_HandleTypeDef *hdma);
273
274 /* Exported functions --------------------------------------------------------*/
275
276 /** @defgroup ADC_Exported_Functions ADC Exported Functions
277 * @{
278 */
279
280 /** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions
281 * @brief ADC Initialization and Configuration functions
282 *
283 @verbatim
284 ===============================================================================
285 ##### Initialization and de-initialization functions #####
286 ===============================================================================
287 [..] This section provides functions allowing to:
288 (+) Initialize and configure the ADC.
289 (+) De-initialize the ADC.
290 @endverbatim
291 * @{
292 */
293
294 /**
295 * @brief Initialize the ADC peripheral according to
296 * parameters specified in structure "ADC_InitTypeDef".
297 * @note As prerequisite, ADC clock must be configured at RCC top level
298 * (refer to description of RCC configuration for ADC
299 * in header of this file).
300 * @note Possibility to update parameters on the fly:
301 * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
302 * coming from ADC state reset. Following calls to this function can
303 * be used to reconfigure some parameters of ADC_InitTypeDef
304 * structure on the fly, without modifying MSP configuration. If ADC
305 * MSP has to be modified again, HAL_ADC_DeInit() must be called
306 * before HAL_ADC_Init().
307 * The setting of these parameters is conditioned to ADC state.
308 * For parameters constraints, see comments of structure
309 * "ADC_InitTypeDef".
310 * @param hadc ADC handle
311 * @retval HAL status
312 */
HAL_ADC_Init(ADC_HandleTypeDef * hadc)313 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc)
314 {
315 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
316
317 /* Check ADC handle */
318 if (hadc == NULL)
319 {
320 return HAL_ERROR;
321 }
322
323 /* Check the parameters */
324 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
325 assert_param(IS_ADC_SAMPLERATE(hadc->Init.SampleRate));
326 assert_param(IS_ADC_SAMPLINGMODE(hadc->Init.SamplingMode));
327 assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
328 assert_param(IS_ADC_DATA_INVERT(hadc->Init.InvertOutputMode));
329 assert_param(IS_ADC_DATAWIDTH(hadc->Init.DownSamplerConfig.DataWidth));
330 assert_param(IS_ADC_DATARATIO(hadc->Init.DownSamplerConfig.DataRatio));
331 assert_param(IS_ADC_NB_CONV(hadc->Init.SequenceLength));
332 assert_param(IS_ADC_CONVERSIONTYPE(hadc->Init.ConversionType));
333
334 /* Actions performed only if ADC is coming from state reset: */
335 /* - Initialization of ADC MSP */
336 if (hadc->State == HAL_ADC_STATE_RESET)
337 {
338 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
339 /* Init the ADC Callback settings */
340 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak callback */
341 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak callback */
342 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak callback */
343 hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak callback */
344
345 if (hadc->MspInitCallback == NULL)
346 {
347 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
348 }
349
350 /* Init the low level hardware */
351 hadc->MspInitCallback(hadc);
352 #else
353 /* Init the low level hardware */
354 HAL_ADC_MspInit(hadc);
355 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
356
357 /* Set ADC error code to none */
358 ADC_CLEAR_ERRORCODE(hadc);
359
360 /* Initialize Lock */
361 hadc->Lock = HAL_UNLOCKED;
362 }
363
364 #if defined(ADC_CTRL_ADC_LDO_ENA)
365 if (LL_ADC_IsInternalRegulatorEnabled(hadc->Instance) == 0UL)
366 {
367 /* Enable ADC internal voltage regulator */
368 LL_ADC_EnableInternalRegulator(hadc->Instance);
369 }
370 #endif /* ADC_CTRL_ADC_LDO_ENA */
371
372 /* Configuration of ADC parameters if there is no conversion on going */
373 /* (ADC may already be enabled at this point if HAL_ADC_Init() is */
374 /* called to update a parameter on the fly). */
375 if (((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL) && (LL_ADC_IsConversionOngoing(hadc->Instance) == 0UL))
376 {
377 /* Set ADC state */
378 ADC_STATE_CLR_SET(hadc->State,
379 HAL_ADC_STATE_DS_BUSY,
380 HAL_ADC_STATE_BUSY_INTERNAL);
381
382 /* Configuration of ADC: */
383 /* - Sample Rate Init.SampleRate */
384 /* - Sample Rate MSB Init.SampleRateMsb */
385 /* - Sampling Mode Init.SamplingMode */
386 /* - Overrun Mode Init.Overrun */
387 /* - Invert Output Bit Mode Init.InvertOutputMode */
388 /* - Conversion Type Init.ConversionType */
389
390 /* Configure the sample rate */
391 LL_ADC_SetSampleRate(hadc->Instance, hadc->Init.SampleRate);
392
393 /* Configure the input sampling mode */
394 LL_ADC_SetInputSamplingMode(hadc->Instance, hadc->Init.SamplingMode);
395
396 /* Configure the continuous mode */
397 if (hadc->Init.ContinuousConvMode == ENABLE)
398 {
399 LL_ADC_ContinuousModeEnable(hadc->Instance);
400 }
401 else
402 {
403 LL_ADC_ContinuousModeDisable(hadc->Instance);
404 }
405
406
407 /* Configure the overrun mode for the output data */
408 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
409 if (hadc->Init.ConversionType == ADC_CONVERSION_WITH_DS)
410 {
411 LL_ADC_SetOverrunDS(hadc->Instance, hadc->Init.Overrun);
412 }
413 else
414 {
415 LL_ADC_SetOverrunDF(hadc->Instance, hadc->Init.Overrun);
416 }
417 #else
418 LL_ADC_SetOverrunDS(hadc->Instance, hadc->Init.Overrun);
419 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
420
421 /* Configure the bit to bit inversion (1' complement) mode */
422 if (hadc->Init.InvertOutputMode == ADC_DATA_INVERT_NONE)
423 {
424 LL_ADC_InvertOutputDiffModeDisable(hadc->Instance);
425 LL_ADC_InvertOutputSingleNegModeDisable(hadc->Instance);
426 }
427 else if (hadc->Init.InvertOutputMode == ADC_DATA_INVERT_DIFF)
428 {
429 LL_ADC_InvertOutputDiffModeEnable(hadc->Instance);
430 LL_ADC_InvertOutputSingleNegModeDisable(hadc->Instance);
431 }
432 else if (hadc->Init.InvertOutputMode == ADC_DATA_INVERT_SING)
433 {
434 LL_ADC_InvertOutputDiffModeDisable(hadc->Instance);
435 LL_ADC_InvertOutputSingleNegModeEnable(hadc->Instance);
436 }
437 else
438 {
439 LL_ADC_InvertOutputDiffModeEnable(hadc->Instance);
440 LL_ADC_InvertOutputSingleNegModeEnable(hadc->Instance);
441 }
442
443 LL_ADC_ConfigureDSDataOutput(hadc->Instance, hadc->Init.DownSamplerConfig.DataWidth,
444 hadc->Init.DownSamplerConfig.DataRatio);
445
446 LL_ADC_SetSequenceLength(hadc->Instance, hadc->Init.SequenceLength);
447
448 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
449 /* Configure the overrun mode for the output data */
450 if (hadc->Init.ConversionType == ADC_CONVERSION_WITH_DS)
451 {
452 /* Configure the operation mode as ADC mode (static/low frequency signal) through the Down Sampler (DS) */
453 LL_ADC_SetADCMode(hadc->Instance, LL_ADC_OP_MODE_ADC);
454 }
455 else
456 {
457 /* Configure the operation mode as Full ADC mode through the Decimation Filter (DF) */
458 LL_ADC_SetADCMode(hadc->Instance, LL_ADC_OP_MODE_FULL);
459 }
460 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
461
462 /* Initialize the ADC state */
463 /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */
464 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY);
465 }
466 else
467 {
468 /* Update ADC state machine to error */
469 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
470
471 tmp_hal_status = HAL_ERROR;
472 }
473
474 /* Return function status */
475 return tmp_hal_status;
476 }
477
478 /**
479 * @brief Deinitialize the ADC peripheral registers to their default reset
480 * values, with deinitialization of the ADC MSP.
481 * @param hadc ADC handle
482 * @retval HAL status
483 */
HAL_ADC_DeInit(ADC_HandleTypeDef * hadc)484 HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc)
485 {
486 HAL_StatusTypeDef tmp_hal_status;
487
488 /* Check ADC handle */
489 if (hadc == NULL)
490 {
491 return HAL_ERROR;
492 }
493
494 /* Check the parameters */
495 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
496
497 /* Set ADC state */
498 SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
499
500 /* Stop potential conversion on going */
501 tmp_hal_status = ADC_ConversionStop(hadc);
502
503 /* Disable ADC peripheral if conversions are effectively stopped */
504 if (tmp_hal_status == HAL_OK)
505 {
506 /* Disable the ADC peripheral */
507 tmp_hal_status = ADC_Disable(hadc);
508
509 /* Check if ADC is effectively disabled */
510 if (tmp_hal_status == HAL_OK)
511 {
512 /* Change ADC state */
513 hadc->State = HAL_ADC_STATE_READY;
514 }
515 }
516
517 /* Note: HAL ADC deInit is done independently of ADC conversion stop */
518 /* and disable return status. In case of status fail, attempt to */
519 /* perform deinitialization anyway and it is up user code in */
520 /* in HAL_ADC_MspDeInit() to reset the ADC peripheral using */
521 /* system RCC hard reset. */
522
523 /* ========== Reset ADC registers ========== */
524 #if defined(ADC_IRQ_EN_MASK)
525 /* Reset register IER */
526 __HAL_ADC_DISABLE_IT(hadc, ADC_IRQ_EN_MASK);
527 #endif /* ADC_IRQ_EN_MASK */
528 #if defined(ADC_IRQ_FLAGS_MASK)
529 /* Reset register ISR */
530 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAGS_MASK);
531 #endif /* ADC_IRQ_FLAGS_MASK */
532
533 /* Reset all the registers */
534 CLEAR_BIT(hadc->Instance->CONF, (ADC_CONF_BIT_INVERT_DIFF
535 #if defined(ADC_CONF_SAMPLE_RATE_MSB)
536 | ADC_CONF_SAMPLE_RATE_MSB
537 #endif /* ADC_CONF_SAMPLE_RATE_MSB */
538 | ADC_CONF_OVR_DS_CFG | ADC_CONF_DMA_DS_ENA
539 | ADC_CONF_SAMPLE_RATE
540 | ADC_CONF_SMPS_SYNCHRO_ENA
541 | ADC_CONF_SEQ_LEN
542 | ADC_CONF_CONT
543 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
544 | ADC_CONF_VBIAS_PRECH_FORCE
545 | ADC_CONF_OVR_DF_CFG | ADC_CONF_DMA_DF_ENA
546 | ADC_CONF_OP_MODE
547 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
548 ));
549
550 SET_BIT(hadc->Instance->CONF, (ADC_CONF_ADC_CONT_1V2 | ADC_CONF_BIT_INVERT_SN | ADC_CONF_SEQUENCE));
551
552 CLEAR_BIT(hadc->Instance->CTRL, (ADC_CTRL_ADC_LDO_ENA
553 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
554 | ADC_CTRL_DIG_AUD_MODE
555 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
556 | ADC_CTRL_STOP_OP_MODE | ADC_CTRL_START_CONV
557 | ADC_CTRL_ADC_ON_OFF));
558
559 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
560 CLEAR_BIT(hadc->Instance->OCM_CTRL, (ADC_OCM_CTRL_OCM_ENA | ADC_OCM_CTRL_OCM_SRC));
561
562 CLEAR_BIT(hadc->Instance->PGA_CONF, (ADC_PGA_CONF_PGA_BIAS | ADC_PGA_CONF_PGA_GAIN));
563 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
564
565 CLEAR_BIT(hadc->Instance->SWITCH, (ADC_SWITCH_SE_VIN_7 | ADC_SWITCH_SE_VIN_6
566 | ADC_SWITCH_SE_VIN_5 | ADC_SWITCH_SE_VIN_4
567 | ADC_SWITCH_SE_VIN_3 | ADC_SWITCH_SE_VIN_2
568 | ADC_SWITCH_SE_VIN_1 | ADC_SWITCH_SE_VIN_0));
569
570 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
571 CLEAR_BIT(hadc->Instance->DF_CONF, (ADC_DF_CONF_DF_HALF_D_EN
572 | ADC_DF_CONF_DF_HPF_EN | ADC_DF_CONF_DF_MICROL_RN
573 | ADC_DF_CONF_PDM_RATE
574 | ADC_DF_CONF_DF_O_S2U
575 | ADC_DF_CONF_DF_I_U2S | ADC_DF_CONF_DF_ITP1P2
576 | ADC_DF_CONF_DF_CIC_DHF | ADC_DF_CONF_DF_CIC_DEC_FACTOR));
577
578 SET_BIT(hadc->Instance->DF_CONF, (ADC_DF_CONF_PDM_RATE_1 | ADC_DF_CONF_PDM_RATE_2));
579 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
580
581 CLEAR_BIT(hadc->Instance->DS_CONF, (ADC_DS_CONF_DS_WIDTH | ADC_DS_CONF_DS_RATIO));
582
583 CLEAR_BIT(hadc->Instance->SEQ_1, (ADC_SEQ_1_SEQ7 | ADC_SEQ_1_SEQ6
584 | ADC_SEQ_1_SEQ5 | ADC_SEQ_1_SEQ4
585 | ADC_SEQ_1_SEQ3 | ADC_SEQ_1_SEQ2
586 | ADC_SEQ_1_SEQ1 | ADC_SEQ_1_SEQ0));
587
588 CLEAR_BIT(hadc->Instance->SEQ_2, (ADC_SEQ_2_SEQ15 | ADC_SEQ_2_SEQ14
589 | ADC_SEQ_2_SEQ13 | ADC_SEQ_2_SEQ12
590 | ADC_SEQ_2_SEQ11 | ADC_SEQ_2_SEQ10
591 | ADC_SEQ_2_SEQ9 | ADC_SEQ_2_SEQ8));
592
593 MODIFY_REG(hadc->Instance->COMP_1, (ADC_COMP_1_OFFSET1 | ADC_COMP_1_GAIN1), 0x555UL);
594 MODIFY_REG(hadc->Instance->COMP_2, (ADC_COMP_1_OFFSET1 | ADC_COMP_1_GAIN1), 0x555UL);
595 MODIFY_REG(hadc->Instance->COMP_3, (ADC_COMP_1_OFFSET1 | ADC_COMP_1_GAIN1), 0x555UL);
596 MODIFY_REG(hadc->Instance->COMP_4, (ADC_COMP_1_OFFSET1 | ADC_COMP_1_GAIN1), 0x555UL);
597
598 CLEAR_BIT(hadc->Instance->COMP_SEL, (ADC_COMP_SEL_OFFSET_GAIN8 | ADC_COMP_SEL_OFFSET_GAIN7
599 | ADC_COMP_SEL_OFFSET_GAIN6 | ADC_COMP_SEL_OFFSET_GAIN5
600 | ADC_COMP_SEL_OFFSET_GAIN4 | ADC_COMP_SEL_OFFSET_GAIN3
601 | ADC_COMP_SEL_OFFSET_GAIN2 | ADC_COMP_SEL_OFFSET_GAIN1
602 | ADC_COMP_SEL_OFFSET_GAIN0));
603
604 MODIFY_REG(hadc->Instance->WD_TH, (ADC_WD_TH_WD_HT | ADC_WD_TH_WD_LT), ADC_WD_TH_WD_HT);
605
606 CLEAR_BIT(hadc->Instance->WD_CONF, (ADC_WD_CONF_AWD_CHX));
607
608 CLEAR_BIT(hadc->Instance->IRQ_STATUS, (ADC_IRQ_STATUS_OVR_DS_IRQ
609 | ADC_IRQ_STATUS_AWD_IRQ
610 | ADC_IRQ_STATUS_EOS_IRQ
611 | ADC_IRQ_STATUS_EODS_IRQ
612 | ADC_IRQ_STATUS_EOC_IRQ
613 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
614 | ADC_IRQ_STATUS_DF_OVRFL_IRQ
615 | ADC_IRQ_STATUS_OVR_DF_IRQ
616 | ADC_IRQ_STATUS_EODF_IRQ
617 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
618 ));
619
620 CLEAR_BIT(hadc->Instance->IRQ_ENABLE, (ADC_IRQ_ENABLE_OVR_DS_IRQ_ENA
621 | ADC_IRQ_ENABLE_AWD_IRQ_ENA
622 | ADC_IRQ_ENABLE_EOS_IRQ_ENA
623 | ADC_IRQ_ENABLE_EODS_IRQ_ENA
624 | ADC_IRQ_ENABLE_EOC_IRQ_ENA
625 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
626 | ADC_IRQ_ENABLE_DF_OVRFL_IRQ_ENA
627 | ADC_IRQ_ENABLE_OVR_DF_IRQ_ENA
628 | ADC_IRQ_ENABLE_EODF_IRQ_ENA
629 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
630 ));
631
632 CLEAR_BIT(hadc->Instance->TIMER_CONF, (ADC_TIMER_CONF_ADC_LDO_DELAY
633 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
634 | ADC_TIMER_CONF_PRECH_DELAY_SEL
635 | ADC_TIMER_CONF_VBIAS_PRECH_DELAY
636 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
637 ));
638 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
639 LL_ADC_SetVbiasPrechargeDelay(hadc->Instance, ADC_DEFAULT_VBIAS_PRECH_DELAY_US / 4UL);
640 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
641 LL_ADC_SetADCLDODelay(hadc->Instance, ADC_DEFAULT_LDO_DELAY_US / 4UL);
642
643 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
644 if (hadc->MspDeInitCallback == NULL)
645 {
646 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
647 }
648
649 /* DeInit the low level hardware: RCC clock, NVIC */
650 hadc->MspDeInitCallback(hadc);
651 #else
652 /* DeInit the low level hardware: RCC clock, NVIC */
653 HAL_ADC_MspDeInit(hadc);
654 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
655
656 /* Set ADC error code to none */
657 ADC_CLEAR_ERRORCODE(hadc);
658
659 /* Set ADC state */
660 hadc->State = HAL_ADC_STATE_RESET;
661
662 /* Process unlocked */
663 __HAL_UNLOCK(hadc);
664
665 /* Return function status */
666 return tmp_hal_status;
667 }
668
669 /**
670 * @brief Initialize the ADC MSP.
671 * @param hadc ADC handle
672 * @retval None
673 */
HAL_ADC_MspInit(ADC_HandleTypeDef * hadc)674 __weak void HAL_ADC_MspInit(ADC_HandleTypeDef *hadc)
675 {
676 /* Prevent unused argument(s) compilation warning */
677 UNUSED(hadc);
678
679 /* NOTE : This function should not be modified. When the callback is needed,
680 function HAL_ADC_MspInit must be implemented in the user file.
681 */
682 }
683
684 /**
685 * @brief DeInitialize the ADC MSP.
686 * @param hadc ADC handle
687 * @note All ADC instances use the same core clock at RCC level, disabling
688 * the core clock reset all ADC instances).
689 * @retval None
690 */
HAL_ADC_MspDeInit(ADC_HandleTypeDef * hadc)691 __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef *hadc)
692 {
693 /* Prevent unused argument(s) compilation warning */
694 UNUSED(hadc);
695
696 /* NOTE : This function should not be modified. When the callback is needed,
697 function HAL_ADC_MspDeInit must be implemented in the user file.
698 */
699 }
700
701 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
702 /**
703 * @brief Register a User ADC Callback
704 * To be used instead of the weak predefined callback
705 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
706 * the configuration information for the specified ADC.
707 * @param CallbackID ID of the callback to be registered
708 * This parameter can be one of the following values:
709 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
710 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
711 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC watchdog callback ID
712 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
713 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
714 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
715 * @param pCallback pointer to the Callback function
716 * @retval HAL status
717 */
HAL_ADC_RegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID,pADC_CallbackTypeDef pCallback)718 HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID,
719 pADC_CallbackTypeDef pCallback)
720 {
721 HAL_StatusTypeDef status = HAL_OK;
722
723 if (pCallback == NULL)
724 {
725 /* Update the error code */
726 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
727
728 return HAL_ERROR;
729 }
730
731 if ((hadc->State & HAL_ADC_STATE_READY) != 0UL)
732 {
733 switch (CallbackID)
734 {
735 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
736 hadc->ConvCpltCallback = pCallback;
737 break;
738
739 case HAL_ADC_CONVERSION_HALF_CB_ID :
740 hadc->ConvHalfCpltCallback = pCallback;
741 break;
742
743 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
744 hadc->LevelOutOfWindowCallback = pCallback;
745 break;
746
747 case HAL_ADC_ERROR_CB_ID :
748 hadc->ErrorCallback = pCallback;
749 break;
750
751 case HAL_ADC_MSPINIT_CB_ID :
752 hadc->MspInitCallback = pCallback;
753 break;
754
755 case HAL_ADC_MSPDEINIT_CB_ID :
756 hadc->MspDeInitCallback = pCallback;
757 break;
758
759 default :
760 /* Update the error code */
761 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
762
763 /* Return error status */
764 status = HAL_ERROR;
765 break;
766 }
767 }
768 else if (HAL_ADC_STATE_RESET == hadc->State)
769 {
770 switch (CallbackID)
771 {
772 case HAL_ADC_MSPINIT_CB_ID :
773 hadc->MspInitCallback = pCallback;
774 break;
775
776 case HAL_ADC_MSPDEINIT_CB_ID :
777 hadc->MspDeInitCallback = pCallback;
778 break;
779
780 default :
781 /* Update the error code */
782 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
783
784 /* Return error status */
785 status = HAL_ERROR;
786 break;
787 }
788 }
789 else
790 {
791 /* Update the error code */
792 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
793
794 /* Return error status */
795 status = HAL_ERROR;
796 }
797
798 return status;
799 }
800
801 /**
802 * @brief Unregister a ADC Callback
803 * ADC callback is redirected to the weak predefined callback
804 * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
805 * the configuration information for the specified ADC.
806 * @param CallbackID ID of the callback to be unregistered
807 * This parameter can be one of the following values:
808 * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
809 * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
810 * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC watchdog callback ID
811 * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
812 * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
813 * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
814 * @retval HAL status
815 */
HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef * hadc,HAL_ADC_CallbackIDTypeDef CallbackID)816 HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef CallbackID)
817 {
818 HAL_StatusTypeDef status = HAL_OK;
819
820 if ((hadc->State & HAL_ADC_STATE_READY) != 0UL)
821 {
822 switch (CallbackID)
823 {
824 case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
825 hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
826 break;
827
828 case HAL_ADC_CONVERSION_HALF_CB_ID :
829 hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
830 break;
831
832 case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
833 hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
834 break;
835
836 case HAL_ADC_ERROR_CB_ID :
837 hadc->ErrorCallback = HAL_ADC_ErrorCallback;
838 break;
839
840 case HAL_ADC_MSPINIT_CB_ID :
841 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
842 break;
843
844 case HAL_ADC_MSPDEINIT_CB_ID :
845 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
846 break;
847
848 default :
849 /* Update the error code */
850 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
851
852 /* Return error status */
853 status = HAL_ERROR;
854 break;
855 }
856 }
857 else if (HAL_ADC_STATE_RESET == hadc->State)
858 {
859 switch (CallbackID)
860 {
861 case HAL_ADC_MSPINIT_CB_ID :
862 hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
863 break;
864
865 case HAL_ADC_MSPDEINIT_CB_ID :
866 hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
867 break;
868
869 default :
870 /* Update the error code */
871 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
872
873 /* Return error status */
874 status = HAL_ERROR;
875 break;
876 }
877 }
878 else
879 {
880 /* Update the error code */
881 hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
882
883 /* Return error status */
884 status = HAL_ERROR;
885 }
886
887 return status;
888 }
889
890 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
891
892 /**
893 * @}
894 */
895
896 /** @defgroup ADC_Exported_Functions_Group2 ADC Input and Output operation functions
897 * @brief ADC IO operation functions
898 *
899 @verbatim
900 ===============================================================================
901 ##### IO operation functions #####
902 ===============================================================================
903 [..] This section provides functions allowing to:
904 (+) Start conversion.
905 (+) Stop conversion.
906 (+) Poll for conversion complete.
907 (+) Poll for conversion event.
908 (+) Get result of channel conversion.
909 (+) Start conversion and enable interruptions.
910 (+) Stop conversion and disable interruptions.
911 (+) Handle ADC interrupt request
912 (+) Start conversion and enable DMA transfer.
913 (+) Stop conversion and disable ADC DMA transfer.
914 @endverbatim
915 * @{
916 */
917
918 /**
919 * @brief Enable ADC, start conversion.
920 * @note Interruptions enabled in this function: None.
921 * @param hadc ADC handle
922 * @retval HAL status
923 */
HAL_ADC_Start(ADC_HandleTypeDef * hadc)924 HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef *hadc)
925 {
926 HAL_StatusTypeDef tmp_hal_status;
927
928 /* Check the parameters */
929 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
930
931 /* Process locked */
932 __HAL_LOCK(hadc);
933
934 /* Enable the ADC peripheral */
935 tmp_hal_status = ADC_Enable(hadc);
936
937 /* Start conversion if ADC is effectively enabled */
938 if (tmp_hal_status == HAL_OK)
939 {
940 /* Set ADC state */
941 ADC_STATE_CLR_SET(hadc->State,
942 HAL_ADC_STATE_READY | HAL_ADC_STATE_DS_EOC | HAL_ADC_STATE_DS_OVR,
943 HAL_ADC_STATE_DS_BUSY);
944
945 /* Reset all ADC error code fields */
946 ADC_CLEAR_ERRORCODE(hadc);
947 }
948
949 /* Clear ADC conversion flag and overrun flag */
950 /* (To ensure of no unknown state from potential previous ADC operations) */
951 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_IRQ_FLAG_EOS | ADC_IRQ_FLAG_EODS | ADC_IRQ_FLAG_OVRDS));
952
953 /* Process unlocked */
954 /* Unlock before starting ADC conversions: in case of potential */
955 /* interruption, to let the process to ADC IRQ Handler. */
956 __HAL_UNLOCK(hadc);
957
958 /* Start ADC conversion */
959 LL_ADC_StartConversion(hadc->Instance);
960
961 /* Return function status */
962 return tmp_hal_status;
963 }
964
965
966 /**
967 * @brief Stop ADC conversion and disable ADC peripheral.
968 * @note: ADC peripheral disable is forcing stop of potential conversion.
969 * @param hadc ADC handle
970 * @retval HAL status.
971 */
HAL_ADC_Stop(ADC_HandleTypeDef * hadc)972 HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef *hadc)
973 {
974 HAL_StatusTypeDef tmp_hal_status;
975
976 /* Check the parameters */
977 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
978
979 /* Process locked */
980 __HAL_LOCK(hadc);
981
982 /* Stop potential conversion on going*/
983 tmp_hal_status = ADC_ConversionStop(hadc);
984
985 /* Disable ADC peripheral if conversions are effectively stopped */
986 if (tmp_hal_status == HAL_OK)
987 {
988 /* Disable the ADC peripheral */
989 tmp_hal_status = ADC_Disable(hadc);
990
991 /* Check if ADC is effectively disabled */
992 if (tmp_hal_status == HAL_OK)
993 {
994 /* Set ADC state */
995 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_DS_BUSY, HAL_ADC_STATE_READY);
996 }
997 }
998
999 /* Process unlocked */
1000 __HAL_UNLOCK(hadc);
1001
1002 /* Return function status */
1003 return tmp_hal_status;
1004 }
1005
1006 /**
1007 * @brief Wait for a conversion to be completed.
1008 * @note ADC conversion flags EOS (end of sequence) and EOC (end of
1009 * conversion) are cleared by this function.
1010 * @note This function cannot be used in a particular setup: ADC configured
1011 * in DMA mode and polling for end of each conversion.
1012 * In this case, DMA resets the flag EOC and polling cannot be
1013 * performed on each conversion. Nevertheless, polling can still
1014 * be performed on the complete sequence.
1015 * @param hadc ADC handle
1016 * @param Timeout Timeout value in millisecond.
1017 * @retval HAL status
1018 */
HAL_ADC_PollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)1019 HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
1020 {
1021 uint32_t tickstart;
1022
1023 /* Check the parameters */
1024 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1025
1026 /* Get tick count */
1027 tickstart = HAL_GetTick();
1028
1029 /* Wait until End of unitary conversion or sequence conversions flag is raised */
1030 while (__HAL_ADC_GET_FLAG(hadc, ADC_IRQ_FLAG_EODS) == 0UL)
1031 {
1032 /* Check if timeout is disabled (set to infinite wait) */
1033 if (Timeout != HAL_MAX_DELAY)
1034 {
1035 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
1036 {
1037 /* Update ADC state machine to timeout */
1038 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1039
1040 /* Process unlocked */
1041 __HAL_UNLOCK(hadc);
1042
1043 return HAL_TIMEOUT;
1044 }
1045 }
1046 }
1047
1048 /* Update ADC state machine */
1049 SET_BIT(hadc->State, HAL_ADC_STATE_DS_EOC);
1050
1051 /* Check whether end of sequence is reached */
1052 if (__HAL_ADC_GET_FLAG(hadc, ADC_IRQ_FLAG_EOS))
1053 {
1054 /* Set ADC state */
1055 CLEAR_BIT(hadc->State, HAL_ADC_STATE_DS_BUSY);
1056 }
1057
1058 /* Clear polled flag */
1059 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_IRQ_FLAG_EODS | ADC_IRQ_FLAG_EOS));
1060
1061 /* Return function status */
1062 return HAL_OK;
1063 }
1064
1065 /**
1066 * @brief Poll for ADC event.
1067 * @param hadc ADC handle
1068 * @param EventType the ADC event type.
1069 * This parameter can be one of the following values:
1070 * ADC_IRQ_FLAG_OVRFL ADC decimation filter saturated event (1)
1071 * ADC_IRQ_FLAG_OVRDF ADC decimation filter overrun event (1)
1072 * ADC_IRQ_FLAG_EODF ADC decimation filter conversion completed event (1)
1073 * ADC_IRQ_FLAG_OVRDS ADC Down Sampler overrun event
1074 * ADC_IRQ_FLAG_AWD1 ADC analog watchdog event
1075 * ADC_IRQ_FLAG_EOS ADC sequence of conversion completed event
1076 * ADC_IRQ_FLAG_EODS ADC Down Sampler conversion completed Event
1077 * (1) todo: Only available on STM32WB0x
1078 * @param Timeout Timeout value in millisecond.
1079 * @note The relevant flag is cleared if found to be set, except for
1080 * ADC_IRQ_FLAG_OVRDS.
1081 * Indeed, the latter is reset only if hadc->Init.Overrun field is set
1082 * to ADC_NEW_DATA_IS_KEPT. Otherwise, data register may be
1083 * potentially overwritten by a new converted data as soon as OVR is
1084 * cleared.
1085 * To reset OVR flag once the preserved data is retrieved, the user can
1086 * resort to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_OVRDS);
1087 * @retval HAL status
1088 */
HAL_ADC_PollForEvent(ADC_HandleTypeDef * hadc,uint32_t EventType,uint32_t Timeout)1089 HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout)
1090 {
1091 uint32_t tickstart;
1092
1093 /* Check the parameters */
1094 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1095 assert_param(IS_ADC_EVENT_TYPE(EventType));
1096
1097 /* Get tick count */
1098 tickstart = HAL_GetTick();
1099
1100 /* Check selected event flag */
1101 while (__HAL_ADC_GET_FLAG(hadc, EventType) == 0UL)
1102 {
1103 /* Check if timeout is disabled (set to infinite wait) */
1104 if (Timeout != HAL_MAX_DELAY)
1105 {
1106 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
1107 {
1108 /* Update ADC state machine to timeout */
1109 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
1110
1111 /* Process unlocked */
1112 __HAL_UNLOCK(hadc);
1113
1114 return HAL_TIMEOUT;
1115 }
1116 }
1117 }
1118
1119 switch (EventType)
1120 {
1121 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
1122 /* Check decimation filter saturated flag */
1123 case ADC_IRQ_FLAG_OVRFL:
1124 /* If overrun is set to overwrite previous data, overrun event is not */
1125 /* considered as an error. */
1126 if (hadc->Init.Overrun == ADC_NEW_DATA_IS_KEPT)
1127 {
1128 /* Set ADC state */
1129 SET_BIT(hadc->State, HAL_ADC_STATE_DF_OVR);
1130
1131 /* Set ADC error code to overrun */
1132 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1133 }
1134 else
1135 {
1136 /* Clear ADC Overrun flag only if Overrun is set to ADC_NEW_DATA_IS_KEPT
1137 otherwise, data register is potentially overwritten by new converted data as soon
1138 as OVR is cleared. */
1139 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_OVRFL);
1140 }
1141
1142 break;
1143
1144 /* Check decimation filter overrun flag */
1145 case ADC_IRQ_FLAG_OVRDF:
1146 /* If overrun is set to overwrite previous data, overrun event is not */
1147 /* considered as an error. */
1148 if (hadc->Init.Overrun == ADC_NEW_DATA_IS_KEPT)
1149 {
1150 /* Set ADC state */
1151 SET_BIT(hadc->State, HAL_ADC_STATE_DF_OVR);
1152
1153 /* Set ADC error code to overrun */
1154 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1155 }
1156 else
1157 {
1158 /* Clear ADC Overrun flag only if Overrun is set to ADC_NEW_DATA_IS_KEPT
1159 otherwise, data register is potentially overwritten by new converted data as soon
1160 as OVR is cleared. */
1161 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_OVRDF);
1162 }
1163 break;
1164
1165 /* Check decimation filter conversion completed flag */
1166 case ADC_IRQ_FLAG_EODF:
1167 /* Set ADC state */
1168 SET_BIT(hadc->State, HAL_ADC_STATE_DF_EOC);
1169
1170 /* Clear ADC decimation filter conversion completed flag */
1171 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_EODF);
1172
1173 break;
1174 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
1175
1176 /* Check analog watchdog flag */
1177 case ADC_IRQ_FLAG_AWD1:
1178 /* Set ADC state */
1179 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1180
1181 /* Clear ADC analog watchdog flag */
1182 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_AWD1);
1183
1184 break;
1185
1186 /* Check sequence of conversion completed flag */
1187 case ADC_IRQ_FLAG_EOS:
1188 /* Set ADC state */
1189 SET_BIT(hadc->State, HAL_ADC_STATE_DS_EOC);
1190
1191 /* Clear ADC sequence of conversion completed flag */
1192 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_EOS);
1193
1194 break;
1195
1196 /* Check Down Sampler conversion completed flag */
1197 case ADC_IRQ_FLAG_EODS:
1198 /* Set ADC state */
1199 SET_BIT(hadc->State, HAL_ADC_STATE_DS_EOC);
1200
1201 /* Clear ADC Down Sampler conversion completed flag */
1202 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_EODS);
1203
1204 break;
1205
1206 /* Overrun event */
1207 default: /* Case ADC_OVR_EVENT */
1208 /* If overrun is set to overwrite previous data, overrun event is not */
1209 /* considered as an error. */
1210 if (hadc->Init.Overrun == ADC_NEW_DATA_IS_LOST)
1211 {
1212 /* Set ADC state */
1213 SET_BIT(hadc->State, HAL_ADC_STATE_DS_OVR);
1214
1215 /* Set ADC error code to overrun */
1216 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1217 }
1218 else
1219 {
1220 /* Clear ADC Overrun flag only if Overrun is set to ADC_NEW_DATA_IS_KEPT
1221 otherwise, data register is potentially overwritten by new converted data as soon
1222 as OVR is cleared. */
1223 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_OVRDS);
1224 }
1225 break;
1226 }
1227
1228 /* Return function status */
1229 return HAL_OK;
1230 }
1231
1232 /**
1233 * @brief Enable ADC and start conversion with interruption.
1234 * @note Interruptions enabled in this function according to initialization
1235 * setting : EOC (end of conversion), EOS (end of sequence),
1236 * OVR overrun.
1237 * Each of these interruptions has its dedicated callback function.
1238 * @note To guarantee a proper reset of all interruptions once all the needed
1239 * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure
1240 * a correct stop of the IT-based conversions.
1241 * @param hadc ADC handle
1242 * @retval HAL status
1243 */
HAL_ADC_Start_IT(ADC_HandleTypeDef * hadc)1244 HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef *hadc)
1245 {
1246 HAL_StatusTypeDef tmp_hal_status;
1247
1248 /* Check the parameters */
1249 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1250
1251 /* Process locked */
1252 __HAL_LOCK(hadc);
1253
1254 /* Enable the ADC peripheral */
1255 tmp_hal_status = ADC_Enable(hadc);
1256
1257 /* Start conversion if ADC is effectively enabled */
1258 if (tmp_hal_status == HAL_OK)
1259 {
1260 /* Set ADC state */
1261 /* - Clear state bitfield related to conversion results */
1262 /* - Set state bitfield related to operation */
1263 ADC_STATE_CLR_SET(hadc->State,
1264 HAL_ADC_STATE_READY | HAL_ADC_STATE_DS_EOC | HAL_ADC_STATE_DS_OVR,
1265 HAL_ADC_STATE_DS_BUSY);
1266
1267 /* Reset all ADC error code fields */
1268 ADC_CLEAR_ERRORCODE(hadc);
1269
1270 /* Clear ADC conversion flag and overrun flag */
1271 /* (To ensure of no unknown state from potential previous ADC operations) */
1272 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_IRQ_FLAG_EODS | ADC_IRQ_FLAG_EOS | ADC_IRQ_FLAG_OVRDS));
1273
1274 /* Process unlocked */
1275 /* Unlock before starting ADC conversions: in case of potential */
1276 /* interruption, to let the process to ADC IRQ Handler. */
1277 __HAL_UNLOCK(hadc);
1278
1279 /* Disable all interruptions before enabling the desired ones */
1280 __HAL_ADC_DISABLE_IT(hadc, (ADC_IRQ_EN_EODS | ADC_IRQ_EN_EOS | ADC_IRQ_EN_OVRDS));
1281
1282 /* Enable ADC end of conversion interrupt */
1283 __HAL_ADC_ENABLE_IT(hadc, ADC_IRQ_EN_EOS);
1284
1285 /* Enable ADC overrun interrupt */
1286 /* If hadc->Init.Overrun is set to ADC_NEW_DATA_IS_LOST, only then is */
1287 /* ADC_IRQ_EN_OVRDS enabled; otherwise data overwrite is considered as */
1288 /* normal behavior and no CPU time is lost for a non-processed */
1289 /* interruption. */
1290 if (hadc->Init.Overrun == ADC_NEW_DATA_IS_LOST)
1291 {
1292 __HAL_ADC_ENABLE_IT(hadc, ADC_IRQ_EN_OVRDS);
1293 }
1294
1295 /* Enable conversion. */
1296 /* If software start has been selected, conversion starts immediately. */
1297 /* If external trigger has been selected, conversion will start at next */
1298 /* trigger event. */
1299 /* Start ADC conversion */
1300 LL_ADC_StartConversion(hadc->Instance);
1301
1302 }
1303 else
1304 {
1305 tmp_hal_status = HAL_BUSY;
1306 }
1307
1308 /* Return function status */
1309 return tmp_hal_status;
1310 }
1311
1312
1313 /**
1314 * @brief Stop ADC conversion, disable interrution of
1315 * end-of-conversion, disable ADC peripheral.
1316 * @param hadc ADC handle
1317 * @retval HAL status.
1318 */
HAL_ADC_Stop_IT(ADC_HandleTypeDef * hadc)1319 HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef *hadc)
1320 {
1321 HAL_StatusTypeDef tmp_hal_status;
1322
1323 /* Check the parameters */
1324 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1325
1326 /* Process locked */
1327 __HAL_LOCK(hadc);
1328
1329 /* 1. Stop potential conversion on going*/
1330 tmp_hal_status = ADC_ConversionStop(hadc);
1331
1332 /* Disable ADC peripheral if conversions are effectively stopped */
1333 if (tmp_hal_status == HAL_OK)
1334 {
1335 /* Disable ADC end of conversion interrupt */
1336 /* Disable ADC overrun interrupt */
1337 __HAL_ADC_DISABLE_IT(hadc, (ADC_IRQ_EN_EODS | ADC_IRQ_EN_EOS | ADC_IRQ_EN_OVRDS));
1338
1339 /* 2. Disable the ADC peripheral */
1340 tmp_hal_status = ADC_Disable(hadc);
1341
1342 /* Check if ADC is effectively disabled */
1343 if (tmp_hal_status == HAL_OK)
1344 {
1345 /* Set ADC state */
1346 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_DS_BUSY, HAL_ADC_STATE_READY);
1347 }
1348 }
1349
1350 /* Process unlocked */
1351 __HAL_UNLOCK(hadc);
1352
1353 /* Return function status */
1354 return tmp_hal_status;
1355 }
1356
1357
1358 /**
1359 * @brief Enable ADC, start conversion and transfer result through DMA.
1360 * @note Interruptions enabled in this function:
1361 * overrun (if applicable), DMA half transfer, DMA transfer complete.
1362 * Each of these interruptions has its dedicated callback function.
1363 * The ADC continuous mode is enabled in this DMA acquisition mode.
1364 * @param hadc ADC handle
1365 * @param pData Destination Buffer address.
1366 * @param Length Number of data to be transferred from ADC peripheral to memory
1367 * @retval HAL status.
1368 */
HAL_ADC_Start_DMA(ADC_HandleTypeDef * hadc,const uint32_t * pData,uint32_t Length)1369 HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef *hadc, const uint32_t *pData, uint32_t Length)
1370 {
1371 HAL_StatusTypeDef tmp_hal_status;
1372
1373 /* Check the parameters */
1374 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1375
1376 /* Process locked */
1377 __HAL_LOCK(hadc);
1378
1379 /* Enable the ADC peripheral */
1380 tmp_hal_status = ADC_Enable(hadc);
1381
1382 /* Start conversion if ADC is effectively enabled */
1383 if (tmp_hal_status == HAL_OK)
1384 {
1385 /* Set ADC state */
1386 /* - Clear state bitfield related to conversion results */
1387 /* - Set state bitfield related to operation */
1388 ADC_STATE_CLR_SET(hadc->State,
1389 HAL_ADC_STATE_READY | HAL_ADC_STATE_DS_EOC | HAL_ADC_STATE_DS_OVR,
1390 HAL_ADC_STATE_DS_BUSY);
1391
1392 /* Reset all ADC error code fields */
1393 ADC_CLEAR_ERRORCODE(hadc);
1394
1395 /* Set the DMA transfer complete callback */
1396 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
1397
1398 /* Set the DMA half transfer complete callback */
1399 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
1400
1401 /* Set the DMA error callback */
1402 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
1403
1404 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, */
1405 /* ADC start (in case of SW start): */
1406
1407 /* Clear conversion flag and overrun flag */
1408 /* (To ensure of no unknown state from potential previous ADC */
1409 /* operations) */
1410 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_IRQ_FLAG_EODS | ADC_IRQ_FLAG_EOS | ADC_IRQ_FLAG_OVRDS));
1411
1412 /* Process unlocked */
1413 /* Unlock before starting ADC conversions: in case of potential */
1414 /* interruption, to let the process to ADC IRQ Handler. */
1415 __HAL_UNLOCK(hadc);
1416
1417 /* With DMA, overrun event is always considered as an error even if
1418 hadc->Init. Overrun is set to ADC_NEW_DATA_IS_KEPT. Therefore,
1419 ADC_IRQ_EN_OVRDS is enabled. */
1420 __HAL_ADC_ENABLE_IT(hadc, ADC_IRQ_EN_OVRDS);
1421
1422 /* Enable ADC DMA mode */
1423 LL_ADC_DMAModeDSEnable(hadc->Instance);
1424
1425 /* Start the DMA channel */
1426 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DS_DATAOUT, (uint32_t)pData,
1427 Length);
1428
1429 if (tmp_hal_status != HAL_ERROR)
1430 {
1431 /* Enable conversion. */
1432 /* If software start has been selected, conversion starts immediately. */
1433 /* If external trigger has been selected, conversion will start at next */
1434 /* trigger event. */
1435 /* Start ADC group conversion */
1436 LL_ADC_StartConversion(hadc->Instance);
1437 }
1438 }
1439 else
1440 {
1441 /* Process unlocked */
1442 __HAL_UNLOCK(hadc);
1443 }
1444
1445 /* Return function status */
1446 return tmp_hal_status;
1447 }
1448
1449
1450 /**
1451 * @brief Stop ADC conversion, disable ADC DMA transfer, disable
1452 * ADC peripheral.
1453 * @param hadc ADC handle
1454 * @retval HAL status.
1455 */
HAL_ADC_Stop_DMA(ADC_HandleTypeDef * hadc)1456 HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef *hadc)
1457 {
1458 HAL_StatusTypeDef tmp_hal_status;
1459
1460 /* Check the parameters */
1461 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1462
1463 /* Process locked */
1464 __HAL_LOCK(hadc);
1465
1466 /* 1. Stop potential ADC conversion on going */
1467 LL_ADC_ContinuousModeDisable(hadc->Instance);
1468 tmp_hal_status = ADC_ConversionStop(hadc);
1469
1470 /* Disable ADC peripheral if conversions are effectively stopped */
1471 if (tmp_hal_status == HAL_OK)
1472 {
1473
1474 /* Abort the ADC DMA channel */
1475 if (hadc->DMA_Handle != NULL)
1476 {
1477 /* Disable ADC DMA (ADC DMA configuration of continuous requests is kept) */
1478 LL_ADC_DMAModeDSDisable(hadc->Instance);
1479
1480 if (HAL_DMA_Abort_IT(hadc->DMA_Handle) != HAL_OK)
1481 {
1482 if (HAL_DMA_GetError(hadc->DMA_Handle) == HAL_DMA_ERROR_TIMEOUT)
1483 {
1484 /* Set error code to DMA */
1485 hadc->ErrorCode = HAL_ADC_ERROR_DMA;
1486
1487 /* Process Unlocked */
1488 __HAL_UNLOCK(hadc);
1489
1490 return HAL_TIMEOUT;
1491 }
1492 }
1493 }
1494
1495 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1496 /* while DMA transfer is on going) */
1497 if (hadc->DMA_Handle->State == HAL_DMA_STATE_BUSY)
1498 {
1499 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1500
1501 /* Check if DMA channel effectively disabled */
1502 if (tmp_hal_status != HAL_OK)
1503 {
1504 /* Update ADC state machine to error */
1505 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1506 }
1507 }
1508
1509 /* Disable ADC overrun interrupt */
1510 __HAL_ADC_DISABLE_IT(hadc, ADC_IRQ_EN_OVRDS);
1511
1512 /* 2. Disable the ADC peripheral */
1513 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1514 /* to keep in memory a potential failing status. */
1515 if (tmp_hal_status == HAL_OK)
1516 {
1517 tmp_hal_status = ADC_Disable(hadc);
1518 }
1519 else
1520 {
1521 (void)ADC_Disable(hadc);
1522 }
1523
1524 /* Check if ADC is effectively disabled */
1525 if (tmp_hal_status == HAL_OK)
1526 {
1527 /* Set ADC state */
1528 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_DS_BUSY, HAL_ADC_STATE_READY);
1529 }
1530
1531 }
1532
1533 /* Process unlocked */
1534 __HAL_UNLOCK(hadc);
1535
1536 /* Return function status */
1537 return tmp_hal_status;
1538 }
1539
1540 /**
1541 * @brief Get ADC conversion result (raw value).
1542 * @note Occurrence of flag EOS rising:
1543 * - If sequencer is composed of 1 rank, flag EOS is equivalent
1544 * to flag EOC.
1545 * - If sequencer is composed of several ranks, during the scan
1546 * sequence flag EOC only is raised, at the end of the scan sequence
1547 * both flags EOC and EOS are raised.
1548 * The flag EODS is rising when the Down Sampler conversion is
1549 * completed.
1550 * To clear those flags, either use function:
1551 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1552 * model polling: @ref HAL_ADC_PollForConversion()
1553 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_IRQ_FLAG_EOS).
1554 * @param hadc ADC handle
1555 * @retval ADC conversion data
1556 */
HAL_ADC_GetValue(const ADC_HandleTypeDef * hadc)1557 uint32_t HAL_ADC_GetValue(const ADC_HandleTypeDef *hadc)
1558 {
1559 /* Check the parameters */
1560 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1561
1562 /* Return ADC converted value */
1563 return LL_ADC_DSGetOutputData(hadc->Instance);
1564 }
1565
1566 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
1567 /**
1568 * @brief Get ADC conversion result from decimation filter(raw value).
1569 * @note Flag EODF is rising when decimation filter conversion is
1570 * completed.
1571 * To clear this flag, either use function:
1572 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1573 * model polling: @ref HAL_ADC_PollForConversion()
1574 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_IRQ_FLAG_EOS).
1575 * @param hadc ADC handle
1576 * @retval ADC conversion data
1577 */
HAL_ADC_GetValue_DF(const ADC_HandleTypeDef * hadc)1578 uint32_t HAL_ADC_GetValue_DF(const ADC_HandleTypeDef *hadc)
1579 {
1580 /* Check the parameters */
1581 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1582
1583 /* Return ADC converted value */
1584 return LL_ADC_DFGetOutputData(hadc->Instance);
1585 }
1586 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
1587
1588 /**
1589 * @brief Handle ADC interrupt request.
1590 * @param hadc ADC handle
1591 * @retval None
1592 */
HAL_ADC_IRQHandler(ADC_HandleTypeDef * hadc)1593 void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc)
1594 {
1595 uint32_t overrun_error = 0UL; /* flag set if overrun occurrence has to be considered as an error */
1596 uint32_t tmp_ier = hadc->Instance->IRQ_ENABLE;
1597 uint32_t tmp_isr = LL_ADC_GetActiveFlags(hadc->Instance);
1598
1599 /* Check the parameters */
1600 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1601
1602 /* ====== Check ADC end of unitary conversion sequence conversions ===== */
1603 if ((((tmp_isr & ADC_IRQ_FLAG_EODS) == ADC_IRQ_FLAG_EODS) && ((tmp_ier & ADC_IRQ_EN_EODS) == ADC_IRQ_EN_EODS)) ||
1604 (((tmp_isr & ADC_IRQ_FLAG_EOS) == ADC_IRQ_FLAG_EOS) && ((tmp_ier & ADC_IRQ_EN_EOS) == ADC_IRQ_EN_EOS)) ||
1605 (((tmp_isr & ADC_IRQ_FLAG_EOC) == ADC_IRQ_FLAG_EOC) && ((tmp_ier & ADC_IRQ_EN_EOC) == ADC_IRQ_EN_EOC)))
1606 {
1607 /* Update state machine on conversion status if not in error state */
1608 if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) == 0UL)
1609 {
1610 /* Set ADC state */
1611 SET_BIT(hadc->State, HAL_ADC_STATE_DS_EOC);
1612 }
1613
1614 /* Carry on if continuous mode is disabled */
1615 if (!LL_ADC_IsContinuousModeEnabled(hadc->Instance))
1616 {
1617 /* If End of Sequence is reached, disable interrupts */
1618 if (__HAL_ADC_GET_FLAG(hadc, ADC_IRQ_FLAG_EOS))
1619 {
1620 /* Disable ADC end of sequence conversion interrupt */
1621 /* Note: Overrun interrupt was enabled with EOC interrupt in */
1622 /* HAL_Start_IT(), but is not disabled here because can be used */
1623 /* by overrun IRQ process below. */
1624 __HAL_ADC_DISABLE_IT(hadc, ADC_IRQ_EN_EODS | ADC_IRQ_EN_EOS | ADC_IRQ_EN_EOC);
1625
1626 /* Set ADC state */
1627 CLEAR_BIT(hadc->State, HAL_ADC_STATE_DS_BUSY);
1628
1629 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
1630 }
1631 }
1632
1633 /* Conversion complete callback */
1634 /* Note: Into callback function "HAL_ADC_ConvCpltCallback()", */
1635 /* to determine if conversion has been triggered from EOC or EOS, */
1636 /* possibility to use: */
1637 /* " if (__HAL_ADC_GET_FLAG(&hadc, ADC_IRQ_FLAG_EOS)) " */
1638 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1639 hadc->ConvCpltCallback(hadc);
1640 #else
1641 HAL_ADC_ConvCpltCallback(hadc);
1642 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1643
1644 /* Clear conversion flag */
1645 /* Note: in case of overrun set to ADC_NEW_DATA_IS_LOST, end of */
1646 /* conversion flags clear induces the release of the preserved data.*/
1647 /* Therefore, if the preserved data value is needed, it must be */
1648 /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
1649 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_IRQ_FLAG_EODS | ADC_IRQ_FLAG_EOS | ADC_IRQ_FLAG_EOC));
1650 }
1651
1652 /* ========== Check Analog watchdog 1 flag ========== */
1653 if (((tmp_isr & ADC_IRQ_FLAG_AWD1) == ADC_IRQ_FLAG_AWD1) && ((tmp_ier & ADC_IRQ_FLAG_AWD1) == ADC_IRQ_FLAG_AWD1))
1654 {
1655 /* Set ADC state */
1656 SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
1657
1658 /* Level out of window 1 callback */
1659 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1660 hadc->LevelOutOfWindowCallback(hadc);
1661 #else
1662 HAL_ADC_LevelOutOfWindowCallback(hadc);
1663 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1664
1665 /* Clear ADC analog watchdog flag */
1666 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_AWD1);
1667 }
1668
1669 /* ========== Check Overrun flag ========== */
1670 if (((tmp_isr & ADC_IRQ_FLAG_OVRDS) == ADC_IRQ_FLAG_OVRDS) && ((tmp_ier & ADC_IRQ_EN_OVRDS) == ADC_IRQ_EN_OVRDS))
1671 {
1672 /* If overrun is set to overwrite previous data (default setting), */
1673 /* overrun event is not considered as an error. */
1674 /* Exception for usage with DMA overrun event always considered as an */
1675 /* error. */
1676 if (hadc->Init.Overrun == ADC_NEW_DATA_IS_LOST)
1677 {
1678 overrun_error = 1UL;
1679 }
1680 else
1681 {
1682 /* Check DMA configuration */
1683 if (LL_ADC_IsDMAModeDSEnabled(hadc->Instance))
1684 {
1685 overrun_error = 1UL;
1686 }
1687 }
1688
1689 if (overrun_error == 1UL)
1690 {
1691 /* Change ADC state to error state */
1692 SET_BIT(hadc->State, HAL_ADC_STATE_DS_OVR);
1693
1694 /* Set ADC error code to overrun */
1695 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
1696
1697 /* Error callback */
1698 /* Note: In case of overrun, ADC conversion data is preserved until */
1699 /* flag OVR is reset. */
1700 /* Therefore, old ADC conversion data can be retrieved in */
1701 /* function "HAL_ADC_ErrorCallback()". */
1702 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
1703 hadc->ErrorCallback(hadc);
1704 #else
1705 HAL_ADC_ErrorCallback(hadc);
1706 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
1707 }
1708
1709 /* Clear ADC overrun flag */
1710 __HAL_ADC_CLEAR_FLAG(hadc, ADC_IRQ_FLAG_OVRDS);
1711 }
1712
1713 }
1714
1715
1716 /**
1717 * @brief Conversion complete callback in non-blocking mode.
1718 * @param hadc ADC handle
1719 * @retval None
1720 */
HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef * hadc)1721 __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef *hadc)
1722 {
1723 /* Prevent unused argument(s) compilation warning */
1724 UNUSED(hadc);
1725
1726 /* NOTE : This function should not be modified. When the callback is needed,
1727 function HAL_ADC_ConvCpltCallback must be implemented in the user file.
1728 */
1729 }
1730
1731
1732 /**
1733 * @brief Conversion DMA half-transfer callback in non-blocking mode.
1734 * @param hadc ADC handle
1735 * @retval None
1736 */
HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef * hadc)1737 __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef *hadc)
1738 {
1739 /* Prevent unused argument(s) compilation warning */
1740 UNUSED(hadc);
1741
1742 /* NOTE : This function should not be modified. When the callback is needed,
1743 function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
1744 */
1745 }
1746
1747
1748 /**
1749 * @brief Analog watchdog callback in non-blocking mode.
1750 * @param hadc ADC handle
1751 * @retval None
1752 */
HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef * hadc)1753 __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef *hadc)
1754 {
1755 /* Prevent unused argument(s) compilation warning */
1756 UNUSED(hadc);
1757
1758 /* NOTE : This function should not be modified. When the callback is needed,
1759 function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file.
1760 */
1761 }
1762
1763
1764 /**
1765 * @brief ADC error callback in non-blocking mode
1766 * (ADC conversion with interruption or transfer by DMA).
1767 * @note In case of error due to overrun when using ADC with DMA transfer
1768 * (HAL ADC handle parameter "ErrorCode" to state "HAL_ADC_ERROR_OVR"):
1769 * - Reinitialize the DMA using function "HAL_ADC_Stop_DMA()".
1770 * - If needed, restart a new ADC conversion using function
1771 * "HAL_ADC_Start_DMA()"
1772 * (this function is also clearing overrun flag)
1773 * @param hadc ADC handle
1774 * @retval None
1775 */
HAL_ADC_ErrorCallback(ADC_HandleTypeDef * hadc)1776 __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
1777 {
1778 /* Prevent unused argument(s) compilation warning */
1779 UNUSED(hadc);
1780
1781 /* NOTE : This function should not be modified. When the callback is needed,
1782 function HAL_ADC_ErrorCallback must be implemented in the user file.
1783 */
1784 }
1785
1786
1787 /**
1788 * @}
1789 */
1790 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
1791 /** @defgroup ADC_Exported_Functions_Group4 Microphone Interface Control functions
1792 * @brief Configure and start Microphone Interface (analog and digital)
1793 *
1794 @verbatim
1795 ===============================================================================
1796 ##### Microphone Interface Control functions #####
1797 ===============================================================================
1798 [..] This section provides functions allowing to:
1799 (+) Configure the analog microphone interface (Gain & VoltageBias)
1800 (+) Configure the digital microphone interface (Clock rate)
1801 (+) Start the ADC digital microphone mode
1802
1803 @endverbatim
1804 * @{
1805 */
1806
1807 /**
1808 * @brief Select the left/right channel on digital microphone mode.
1809 * @param hadc ADC handle
1810 * @param MicrophoneChannel This parameter can be one of the following values:
1811 * @arg @ref ADC_DF_MIC_CH_LEFT
1812 * @arg @ref ADC_DF_MIC_CH_RIGHT
1813 * @return HAL status
1814 */
HAL_ADC_SetMicrophoneChannel(ADC_HandleTypeDef * hadc,uint32_t MicrophoneChannel)1815 HAL_StatusTypeDef HAL_ADC_SetMicrophoneChannel(ADC_HandleTypeDef *hadc, uint32_t MicrophoneChannel)
1816 {
1817 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1818
1819 /* Check the parameters */
1820 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1821 assert_param(IS_ADC_DF_MICROPHONE_CHANNEL(MicrophoneChannel));
1822
1823 /* Process locked */
1824 __HAL_LOCK(hadc);
1825
1826 LL_ADC_SetMicrophoneChannel(hadc->Instance, MicrophoneChannel);
1827
1828 /* Process unlocked */
1829 __HAL_UNLOCK(hadc);
1830
1831 /* Return function status */
1832 return tmp_hal_status;
1833 }
1834
1835 /**
1836 * @brief Configure the PDM clock rate.
1837 * The PDM clock rate is : SYSTEM_CLOCK / (Divider).
1838 * @param hadc ADC handle
1839 * @param ConfigPDM Structure of PDM Interface configuration
1840 * @return HAL status
1841 */
HAL_ADC_PDMConfig(ADC_HandleTypeDef * hadc,const ADC_PDMConfTypeDef * ConfigPDM)1842 HAL_StatusTypeDef HAL_ADC_PDMConfig(ADC_HandleTypeDef *hadc, const ADC_PDMConfTypeDef *ConfigPDM)
1843 {
1844 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1845
1846 /* Check the parameters */
1847 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1848 assert_param(IS_ADC_PDM_CLOCK_DIVIDER(ConfigPDM->ClockDivider));
1849
1850 /* Process locked */
1851 __HAL_LOCK(hadc);
1852
1853 LL_ADC_SetPDMRate(hadc->Instance, ConfigPDM->ClockDivider);
1854
1855 /* Process unlocked */
1856 __HAL_UNLOCK(hadc);
1857
1858 /* Return function status */
1859 return tmp_hal_status;
1860 }
1861
1862 /**
1863 * @brief Enable the digital audio mode.
1864 * @param hadc ADC handle
1865 * @return HAL status
1866 */
HAL_ADC_PDMStart(ADC_HandleTypeDef * hadc)1867 HAL_StatusTypeDef HAL_ADC_PDMStart(ADC_HandleTypeDef *hadc)
1868 {
1869 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1870
1871 /* Check the parameters */
1872 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1873
1874 /* Process locked */
1875 __HAL_LOCK(hadc);
1876
1877 LL_ADC_AudioModeEnable(hadc->Instance);
1878
1879 /* Process unlocked */
1880 __HAL_UNLOCK(hadc);
1881
1882 /* Return function status */
1883 return tmp_hal_status;
1884 }
1885
1886 /**
1887 * @brief Disable the digital audio mode.
1888 * @param hadc ADC handle
1889 * @return HAL status
1890 */
HAL_ADC_PDMStop(ADC_HandleTypeDef * hadc)1891 HAL_StatusTypeDef HAL_ADC_PDMStop(ADC_HandleTypeDef *hadc)
1892 {
1893 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1894
1895 /* Check the parameters */
1896 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1897
1898 /* Process locked */
1899 __HAL_LOCK(hadc);
1900
1901 LL_ADC_AudioModeDisable(hadc->Instance);
1902
1903 /* Process unlocked */
1904 __HAL_UNLOCK(hadc);
1905
1906 /* Return function status */
1907 return tmp_hal_status;
1908 }
1909
1910 /**
1911 * @brief Configure PGA used in the ADC analog microphone mode.
1912 * @note The PGA voltage bias value is expressed as a ratio of the battery
1913 * voltage VBAT, between 0.5 and 0.9.
1914 * @note The PGA gain value is expressed in DB
1915 * @param hadc ADC handle
1916 * @param ConfigPGA Structure of PGA parameters.
1917 * @return HAL status
1918 */
HAL_ADC_PGAConfig(ADC_HandleTypeDef * hadc,const ADC_PGAConfTypeDef * ConfigPGA)1919 HAL_StatusTypeDef HAL_ADC_PGAConfig(ADC_HandleTypeDef *hadc, const ADC_PGAConfTypeDef *ConfigPGA)
1920 {
1921 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1922
1923 /* Check the parameters */
1924 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1925 assert_param(IS_ADC_PGA_BIAS(ConfigPGA->Bias));
1926 assert_param(IS_ADC_PGA_GAIN(ConfigPGA->Gain));
1927
1928 /* Process locked */
1929 __HAL_LOCK(hadc);
1930
1931 LL_ADC_ConfigureMicrophonePGA(hadc->Instance, ConfigPGA->Bias, ConfigPGA->Gain);
1932
1933 /* Process unlocked */
1934 __HAL_UNLOCK(hadc);
1935
1936 /* Return function status */
1937 return tmp_hal_status;
1938 }
1939 /**
1940 * @}
1941 */
1942 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
1943
1944 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
1945 /** @defgroup ADC_Exported_Functions_Group5 Occasional Mode Control functions
1946 * @brief Configure and start occasional mode
1947 *
1948 @verbatim
1949 ===============================================================================
1950 ##### Occasional Mode Control functions #####
1951 ===============================================================================
1952 [..] This section provides functions allowing to:
1953 (+) Configure the channel converted in occasional mode
1954 (+) Start an occasional conversion
1955
1956 @endverbatim
1957 * @{
1958 */
1959
1960 /**
1961 * @brief Set the ADC occasional conversion source.
1962 * @param hadc ADC handle
1963 * @param Source This parameter can be one of the following values:
1964 * @arg @ref ADC_OCM_SRC_VBAT
1965 * @arg @ref ADC_OCM_SRC_TEMP
1966 * @return HAL status
1967 */
HAL_ADC_SetOccasionalSource(ADC_HandleTypeDef * hadc,uint32_t Source)1968 HAL_StatusTypeDef HAL_ADC_SetOccasionalSource(ADC_HandleTypeDef *hadc, uint32_t Source)
1969 {
1970 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1971
1972 /* Check the parameters */
1973 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1974 assert_param(IS_ADC_OCM_SOURCE(Source));
1975
1976 /* Process locked */
1977 __HAL_LOCK(hadc);
1978
1979 LL_ADC_SetOccasionalConversionSource(hadc->Instance, Source);
1980
1981 /* Process unlocked */
1982 __HAL_UNLOCK(hadc);
1983
1984 /* Return function status */
1985 return tmp_hal_status;
1986 }
1987
1988 /**
1989 * @brief Start an ADC occasional conversion during an analog audio conversion
1990 * or during an ADC full mode.
1991 * @param hadc ADC handle
1992 * @return HAL status
1993 */
HAL_ADC_StartOccasionalMode(ADC_HandleTypeDef * hadc)1994 HAL_StatusTypeDef HAL_ADC_StartOccasionalMode(ADC_HandleTypeDef *hadc)
1995 {
1996 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1997
1998 /* Check the parameters */
1999 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2000
2001 /* Process locked */
2002 __HAL_LOCK(hadc);
2003
2004 LL_ADC_StartOccasionalConversionMode(hadc->Instance);
2005
2006 /* Process locked */
2007 __HAL_UNLOCK(hadc);
2008
2009 /* Return function status */
2010 return tmp_hal_status;
2011 }
2012
2013 /**
2014 * @}
2015 */
2016 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
2017
2018 /** @defgroup ADC_Exported_Functions_Group6 Analog Timing Control functions
2019 * @brief Configure analog related timing parameters
2020 @verbatim
2021 ===============================================================================
2022 ##### Analog Timing Control functions #####
2023 ===============================================================================
2024 [..] This section provides functions allowing to:
2025 (+) Configure the synchronisation between SMPS and ADC start of conversion
2026 (+) Configure the ADC PGA VBias precharge duration
2027 (+) Configure the ADC LDO delay
2028
2029 @endverbatim
2030 * @{
2031 */
2032
2033 /**
2034 * @brief Enable the synchronization of the ADC start conversion with
2035 * a pulse generated by the SMPS.
2036 * @note The synchronization should only be enabled when using the SMPS with
2037 * an ADC clock different from 32 MHz.
2038 * @param hadc ADC handle
2039 * @return HAL status
2040 */
HAL_ADC_SMPSSyncEnable(ADC_HandleTypeDef * hadc)2041 HAL_StatusTypeDef HAL_ADC_SMPSSyncEnable(ADC_HandleTypeDef *hadc)
2042 {
2043 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2044
2045 /* Check the parameters */
2046 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2047
2048 /* Process locked */
2049 __HAL_LOCK(hadc);
2050
2051 LL_ADC_SMPSSyncEnable(hadc->Instance);
2052
2053 /* Process locked */
2054 __HAL_UNLOCK(hadc);
2055
2056 /* Return function status */
2057 return tmp_hal_status;
2058 }
2059
2060 /**
2061 * @brief Disable the synchronization of the ADC start conversion with
2062 * a pulse generated by the SMPS.
2063 * @note The synchronization should only be enabled when using the SMPS with
2064 * an ADC clock different from 32 MHz.
2065 * @param hadc ADC handle
2066 * @return HAL status
2067 */
HAL_ADC_SMPSSyncDisable(ADC_HandleTypeDef * hadc)2068 HAL_StatusTypeDef HAL_ADC_SMPSSyncDisable(ADC_HandleTypeDef *hadc)
2069 {
2070 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2071
2072 /* Check the parameters */
2073 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2074
2075 /* Process locked */
2076 __HAL_LOCK(hadc);
2077
2078 LL_ADC_SMPSSyncDisable(hadc->Instance);
2079
2080 /* Process locked */
2081 __HAL_UNLOCK(hadc);
2082
2083 /* Return function status */
2084 return tmp_hal_status;
2085 }
2086
2087 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
2088 /**
2089 * @brief Configure the Vbias precharge time of the Programmable Gain Amplifier.
2090 * @note The delay in microseconds corresponding to the duration of a waiting
2091 * time starting at rising edge of PGA_EN signal. This duration is the
2092 * VBIAS precharge pulse duration.
2093 * @note The delay value should be an increment of 4us between 0us and 1020.
2094 * Then the value should be an increment of 4096us between 4096us and
2095 * 1044480us. If these requirements are not met the function configure
2096 * an approximate available value close to the input value.
2097 * @note This value is configured at reset to a default value. This value can be
2098 * reconfigured using @arg @ref ADC_DEFAULT_VBIAS_PRECH_DELAY_US.
2099 * @param hadc ADC handle
2100 * @param Delay_us delay in us. This parameter must be a number between
2101 * Min_Data = 4 and Max_Data = 1'044'480.
2102 * @return HAL status
2103 */
HAL_ADC_VBiasPrechargeDelayConfig(ADC_HandleTypeDef * hadc,uint32_t Delay_us)2104 HAL_StatusTypeDef HAL_ADC_VBiasPrechargeDelayConfig(ADC_HandleTypeDef *hadc, uint32_t Delay_us)
2105 {
2106 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2107
2108 /* Check the parameters */
2109 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2110 assert_param(IS_ADC_PGA_VBIAS_PRECHARGE_DELAY(Delay_us));
2111
2112 /* Process locked */
2113 __HAL_LOCK(hadc);
2114
2115 if (Delay_us <= ADC_VBIAS_PRECH_DELAY_PRESC_MAX_VALUE)
2116 {
2117 LL_ADC_VbiasPrechargeDelayPrescalerDisable(hadc->Instance);
2118 LL_ADC_SetVbiasPrechargeDelay(hadc->Instance, (Delay_us) / (4UL));
2119 }
2120 else
2121 {
2122 LL_ADC_VbiasPrechargeDelayPrescalerEnable(hadc->Instance);
2123 LL_ADC_SetVbiasPrechargeDelay(hadc->Instance, (Delay_us) / (4096UL));
2124 }
2125
2126 /* Process unlocked */
2127 __HAL_UNLOCK(hadc);
2128
2129 /* Return function status */
2130 return tmp_hal_status;
2131 }
2132
2133 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
2134 /**
2135 * @brief Configure the LDO stabilization time
2136 * @note The delay in microseconds corresponding to the duration of a waiting
2137 * time to be inserted between the ADC_LDO enable and the ADC ON to let
2138 * the LDO stabilize before starting a conversion.
2139 * @note The delay value should be an increment of 4us. Otherwise the function
2140 * configure an approximate available value close to the input value.
2141 * @note This value is configured at reset to a default value. This value can be
2142 * reconfigured using @arg @ref ADC_DEFAULT_LDO_DELAY_US.
2143 * @param hadc ADC handle
2144 * @param Delay_us delay in us. This parameter must be a number between
2145 * Min_Data = 4 and Max_Data = 1020.
2146 * @return HAL status
2147 */
HAL_ADC_LDODelayConfig(ADC_HandleTypeDef * hadc,uint32_t Delay_us)2148 HAL_StatusTypeDef HAL_ADC_LDODelayConfig(ADC_HandleTypeDef *hadc, uint32_t Delay_us)
2149 {
2150 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2151
2152 /* Check the parameters */
2153 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2154 assert_param(IS_ADC_LDO_DELAY(Delay_us));
2155
2156 /* Process locked */
2157 __HAL_LOCK(hadc);
2158
2159 LL_ADC_SetADCLDODelay(hadc->Instance, (Delay_us) / 0xFFUL);
2160
2161 /* Process unlocked */
2162 __HAL_UNLOCK(hadc);
2163
2164 /* Return function status */
2165 return tmp_hal_status;
2166 }
2167 /**
2168 * @}
2169 */
2170
2171
2172 /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
2173 * @brief Peripheral Control functions
2174 *
2175 @verbatim
2176 ===============================================================================
2177 ##### Peripheral Control functions #####
2178 ===============================================================================
2179 [..] This section provides functions allowing to:
2180 (+) Configure channels on a conversion sequence
2181 (+) Configure the analog watchdog
2182
2183 @endverbatim
2184 * @{
2185 */
2186
2187 /**
2188 * @brief Configure a channel to be assigned to ADC conversion sequence.
2189 * @param hadc ADC handle
2190 * @param sConfigChannel Structure of ADC channel configuration and position in
2191 * ADC conversion sequence.
2192 * @retval HAL status
2193 */
HAL_ADC_ConfigChannel(ADC_HandleTypeDef * hadc,const ADC_ChannelConfTypeDef * sConfigChannel)2194 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, const ADC_ChannelConfTypeDef *sConfigChannel)
2195 {
2196 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2197 uint32_t tmp_gain;
2198
2199 /* Check the parameters */
2200 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2201 assert_param(IS_ADC_RANK(sConfigChannel->Rank));
2202 assert_param(IS_ADC_VOLTAGE_RANGE(sConfigChannel->VoltRange));
2203 assert_param(IS_ADC_CHANNEL(sConfigChannel->Channel));
2204
2205 assert_param(IS_ADC_CALIBRATION_POINT(sConfigChannel->CalibrationPoint.Number));
2206 assert_param(IS_ADC_CALIBRATION_GAIN(sConfigChannel->CalibrationPoint.Gain));
2207 assert_param(IS_ADC_CALIBRATION_OFFSET(sConfigChannel->CalibrationPoint.Offset));
2208
2209 /* Process locked */
2210 __HAL_LOCK(hadc);
2211
2212 if (LL_ADC_IsConversionOngoing(hadc->Instance) == 0UL)
2213 {
2214 LL_ADC_SetSequencerRanks(hadc->Instance, sConfigChannel->Rank, sConfigChannel->Channel);
2215 LL_ADC_SetChannelVoltageRange(hadc->Instance, sConfigChannel->Channel, sConfigChannel->VoltRange);
2216 }
2217 /* If a conversion is on going no update could be done on */
2218 /* neither of the channel configuration structure parameters. */
2219 else
2220 {
2221 /* Update ADC state machine to error */
2222 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2223
2224 tmp_hal_status = HAL_ERROR;
2225 }
2226
2227 if (sConfigChannel->CalibrationPoint.Number != ADC_CALIB_NONE)
2228 {
2229 if (sConfigChannel->CalibrationPoint.Gain != 0UL)
2230 {
2231 tmp_gain = sConfigChannel->CalibrationPoint.Gain;
2232 }
2233 else if ((sConfigChannel->VoltRange == ADC_VIN_RANGE_1V2)
2234 || (sConfigChannel->Channel == ADC_CHANNEL_TEMPSENSOR))
2235 {
2236 /* 1.2V mode: [calibrated gain =0.96, gain clamped at 1] */
2237 tmp_gain = 0xFFFUL;
2238 }
2239 else if (sConfigChannel->VoltRange == ADC_VIN_RANGE_2V4)
2240 {
2241 /* 2.4V mode: [calibrated gain = 1/2] */
2242 tmp_gain = 0x7FFUL;
2243 }
2244 else /* ADC_VIN_RANGE_3V6 */
2245 {
2246 /* 3.6V mode: [calibrated gain = 1/3] */
2247 tmp_gain = 0x555UL;
2248 }
2249 LL_ADC_ConfigureCalibPoint(hadc->Instance, sConfigChannel->CalibrationPoint.Number,
2250 tmp_gain, sConfigChannel->CalibrationPoint.Offset);
2251
2252 switch (sConfigChannel->Channel)
2253 {
2254 case ADC_CHANNEL_VINM0:
2255 case ADC_CHANNEL_VINM1:
2256 case ADC_CHANNEL_VINM2:
2257 case ADC_CHANNEL_VINM3:
2258 {
2259 LL_ADC_SetCalibPointForSingleNeg(hadc->Instance, sConfigChannel->CalibrationPoint.Number,
2260 sConfigChannel->VoltRange);
2261 break;
2262 }
2263 case ADC_CHANNEL_VINP0:
2264 case ADC_CHANNEL_VINP1:
2265 case ADC_CHANNEL_VINP2:
2266 case ADC_CHANNEL_VINP3:
2267 {
2268 LL_ADC_SetCalibPointForSinglePos(hadc->Instance, sConfigChannel->CalibrationPoint.Number,
2269 sConfigChannel->VoltRange);
2270 break;
2271 }
2272 case ADC_CHANNEL_VINP0_VINM0:
2273 case ADC_CHANNEL_VINP1_VINM1:
2274 case ADC_CHANNEL_VINP2_VINM2:
2275 case ADC_CHANNEL_VINP3_VINM3:
2276 {
2277 LL_ADC_SetCalibPointForDiff(hadc->Instance, sConfigChannel->CalibrationPoint.Number, sConfigChannel->VoltRange);
2278 break;
2279 }
2280 case ADC_CHANNEL_VBAT:
2281 {
2282 LL_ADC_SetCalibPointForSingleNeg(hadc->Instance, sConfigChannel->CalibrationPoint.Number,
2283 LL_ADC_VIN_RANGE_3V6);
2284 break;
2285 }
2286 case ADC_CHANNEL_TEMPSENSOR:
2287 {
2288 LL_ADC_SetCalibPointForSinglePos(hadc->Instance, sConfigChannel->CalibrationPoint.Number,
2289 LL_ADC_VIN_RANGE_1V2);
2290 break;
2291 }
2292 default:
2293 {
2294 /* Update ADC state machine to error */
2295 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2296
2297 tmp_hal_status = HAL_ERROR;
2298 break;
2299 }
2300 }
2301 }
2302 else
2303 {
2304 /* Nothing to do */
2305 __NOP();
2306 }
2307
2308 /* Process unlocked */
2309 __HAL_UNLOCK(hadc);
2310
2311 /* Return function status */
2312 return tmp_hal_status;
2313 }
2314
2315
2316 /**
2317 * @brief Configure the watchdog.
2318 * @note Possibility to update parameters on the fly:
2319 * This function initializes the watchdog, successive
2320 * calls to this function can be used to reconfigure some parameters
2321 * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without
2322 * resetting the ADC.
2323 * The setting of these parameters is conditioned to ADC state.
2324 * @param hadc ADC handle
2325 * @param ConfigWatchdog Structure of ADC watchdog configuration
2326 * @retval HAL status
2327 */
HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef * hadc,const ADC_AnalogWDGConfTypeDef * ConfigWatchdog)2328 HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, const ADC_AnalogWDGConfTypeDef *ConfigWatchdog)
2329 {
2330 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2331
2332 /* Check the parameters */
2333 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2334 assert_param(IS_ADC_AWD_CHANNEL(ConfigWatchdog->ChannelMask));
2335 assert_param(IS_ADC_AWD_EVENT_TYPE(ConfigWatchdog->EventType));
2336
2337 /* Process locked */
2338 __HAL_LOCK(hadc);
2339
2340 /* Check if there is a conversion on going */
2341 if (LL_ADC_IsConversionOngoing(hadc->Instance) == 0UL)
2342 {
2343 /* Configure the thresholds */
2344 LL_ADC_ConfigureAWDThresholds(hadc->Instance, ConfigWatchdog->LowThreshold, ConfigWatchdog->HighThreshold);
2345
2346 /* Set the channels mask */
2347 LL_ADC_SetAWDInputChannels(hadc->Instance, ConfigWatchdog->ChannelMask);
2348
2349 /* Update state, clear previous result related to watchdog */
2350 CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD1);
2351
2352 /* Clear flag ADC analog watchdog */
2353 /* Note: Flag cleared Clear the ADC Analog watchdog flag to be ready */
2354 /* to use for HAL_ADC_IRQHandler() or HAL_ADC_PollForEvent() */
2355 /* (in case left enabled by previous ADC operations). */
2356 LL_ADC_ClearFlag_AWD(hadc->Instance);
2357
2358 /* Configure ADC analog watchdog interrupt */
2359 if (ConfigWatchdog->EventType == ADC_AWD_EVENT_INTERRUPT)
2360 {
2361 LL_ADC_EnableIT_AWD(hadc->Instance);
2362 }
2363 else
2364 {
2365 LL_ADC_DisableIT_AWD(hadc->Instance);
2366 }
2367 }
2368 /* If a conversion is on going , no update could be done */
2369 else
2370 {
2371 /* Update ADC state machine to error */
2372 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2373
2374 tmp_hal_status = HAL_ERROR;
2375 }
2376 /* Process unlocked */
2377 __HAL_UNLOCK(hadc);
2378
2379 /* Return function status */
2380 return tmp_hal_status;
2381 }
2382
2383 #if defined(ADC_SUPPORT_AUDIO_FEATURES)
2384 /**
2385 * @brief Configure the decimation filter
2386 *
2387 * @param hadc ADC handle
2388 * @param ConfigDF Structure of decimation filter configuration
2389 * @return status HAL
2390 */
HAL_ADC_DFConfig(ADC_HandleTypeDef * hadc,const ADC_DFConfTypeDef * ConfigDF)2391 HAL_StatusTypeDef HAL_ADC_DFConfig(ADC_HandleTypeDef *hadc, const ADC_DFConfTypeDef *ConfigDF)
2392 {
2393 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2394
2395 /* Check the parameters */
2396 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2397 assert_param(IS_ADC_DF_DYNAMIC_RANGE(ConfigDF->DynamicMode));
2398 assert_param(IS_FUNCTIONAL_STATE(ConfigDF->HighPassFilter));
2399 assert_param(IS_ADC_DF_DATA_FORMAT(ConfigDF->OutputDataFormatMode));
2400 assert_param(IS_ADC_DF_DATA_FORMAT(ConfigDF->InputDataFormatMode));
2401 assert_param(IS_FUNCTIONAL_STATE(ConfigDF->FractionalInterpolator));
2402 assert_param(IS_ADC_DF_CIC_DECIMATOR_HALF_FACTOR(ConfigDF->CICFilterDecimatorHalfFactor));
2403 assert_param(IS_ADC_DF_CIC_DECIMATOR_FACTOR(ConfigDF->MCICOutputFrequency));
2404
2405 /* Process locked */
2406 __HAL_LOCK(hadc);
2407
2408 LL_ADC_SetDFInputDynamic(hadc->Instance, ConfigDF->DynamicMode);
2409 if (ConfigDF->HighPassFilter == ENABLE)
2410 {
2411 LL_ADC_DFHighPassFilterEnable(hadc->Instance);
2412 }
2413 else
2414 {
2415 LL_ADC_DFHighPassFilterDisable(hadc->Instance);
2416 }
2417
2418 LL_ADC_SetDataOutputFormat(hadc->Instance, ConfigDF->OutputDataFormatMode);
2419 LL_ADC_SetDataInputFormat(hadc->Instance, ConfigDF->InputDataFormatMode);
2420 if (ConfigDF->FractionalInterpolator == ENABLE)
2421 {
2422 LL_ADC_FractionalInterpolatorEnable(hadc->Instance);
2423 }
2424 else
2425 {
2426 LL_ADC_FractionalInterpolatorDisable(hadc->Instance);
2427 }
2428 LL_ADC_SetCICDecimatorFactor(hadc->Instance, ConfigDF->CICFilterDecimatorHalfFactor);
2429 LL_ADC_SetMicrophoneOutputDatarate(hadc->Instance, ConfigDF->MCICOutputFrequency);
2430
2431 /* Process unlocked */
2432 __HAL_UNLOCK(hadc);
2433
2434 /* Return function status */
2435 return tmp_hal_status;
2436 }
2437
2438 #endif /* ADC_SUPPORT_AUDIO_FEATURES */
2439 /**
2440 * @}
2441 */
2442
2443 /** @defgroup ADC_Exported_Functions_Group7 Peripheral State functions
2444 * @brief ADC Peripheral State functions
2445 *
2446 @verbatim
2447 ===============================================================================
2448 ##### Peripheral state and errors functions #####
2449 ===============================================================================
2450 [..]
2451 This subsection provides functions to get in run-time the status of the
2452 peripheral.
2453 (+) Check the ADC state
2454 (+) Check the ADC error code
2455
2456 @endverbatim
2457 * @{
2458 */
2459
2460 /**
2461 * @brief Return the ADC handle state.
2462 * @note ADC state machine is managed by bitfields, ADC status must be
2463 * compared with states bits.
2464 * For example:
2465 * " if ((HAL_ADC_GetState(hadc) & HAL_ADC_STATE_DS_BUSY) != 0UL) "
2466 * " if ((HAL_ADC_GetState(hadc) & HAL_ADC_STATE_AWD1) != 0UL) "
2467 * @param hadc ADC handle
2468 * @retval ADC handle state (bitfield on 32 bits)
2469 */
HAL_ADC_GetState(const ADC_HandleTypeDef * hadc)2470 uint32_t HAL_ADC_GetState(const ADC_HandleTypeDef *hadc)
2471 {
2472 /* Check the parameters */
2473 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2474
2475 /* Return ADC handle state */
2476 return hadc->State;
2477 }
2478
2479 /**
2480 * @brief Return the ADC error code.
2481 * @param hadc ADC handle
2482 * @retval ADC error code (bitfield on 32 bits)
2483 */
HAL_ADC_GetError(const ADC_HandleTypeDef * hadc)2484 uint32_t HAL_ADC_GetError(const ADC_HandleTypeDef *hadc)
2485 {
2486 /* Check the parameters */
2487 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2488
2489 return hadc->ErrorCode;
2490 }
2491
2492 /**
2493 * @}
2494 */
2495
2496 /**
2497 * @}
2498 */
2499
2500 /** @defgroup ADC_Private_Functions ADC Private Functions
2501 * @{
2502 */
2503
2504 /**
2505 * @brief Stop ADC conversion.
2506 * @param hadc ADC handle
2507 * @retval HAL status.
2508 */
ADC_ConversionStop(ADC_HandleTypeDef * hadc)2509 HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef *hadc)
2510 {
2511 uint32_t is_conversion_on;
2512
2513 /* Check the parameters */
2514 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2515
2516 /* Verification if ADC is not already stopped to bypass this function if */
2517 /* not needed. */
2518 is_conversion_on = LL_ADC_IsConversionOngoing(hadc->Instance);
2519 if (is_conversion_on != 0UL)
2520 {
2521 /* Stop ADC conversion */
2522 LL_ADC_StopConversion(hadc->Instance);
2523 }
2524
2525 /* Return HAL status */
2526 return HAL_OK;
2527 }
2528
2529
2530 /**
2531 * @brief Enable the selected ADC.
2532 * @note Prerequisite condition to use this function: ADC must be disabled
2533 * and voltage regulator must be enabled (done into HAL_ADC_Init()).
2534 * @param hadc ADC handle
2535 * @retval HAL status.
2536 */
ADC_Enable(ADC_HandleTypeDef * hadc)2537 HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef *hadc)
2538 {
2539 /* ADC enable */
2540 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2541 {
2542 /* Enable the ADC peripheral */
2543 LL_ADC_Enable(hadc->Instance);
2544 }
2545
2546 /* Return HAL status */
2547 return HAL_OK;
2548 }
2549
2550
2551 /**
2552 * @brief Disable the selected ADC.
2553 * @note Prerequisite condition to use this function: ADC conversions must be
2554 * stopped.
2555 * @param hadc ADC handle
2556 * @retval HAL status.
2557 */
ADC_Disable(ADC_HandleTypeDef * hadc)2558 HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef *hadc)
2559 {
2560 /* Verification if ADC is not already disabled: */
2561 if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL))
2562 {
2563 /* Disable the ADC peripheral */
2564 LL_ADC_Disable(hadc->Instance);
2565 }
2566
2567 /* Return HAL status */
2568 return HAL_OK;
2569 }
2570
2571 /**
2572 * @brief DMA transfer complete callback.
2573 * @param hdma pointer to DMA handle.
2574 * @retval None
2575 */
ADC_DMAConvCplt(DMA_HandleTypeDef * hdma)2576 void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
2577 {
2578 /* Retrieve ADC handle corresponding to current DMA handle */
2579 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2580
2581 /* Update state machine on conversion status if not in error state */
2582 if ((hadc->State & (HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) == 0UL)
2583 {
2584 /* Set ADC state */
2585 SET_BIT(hadc->State, HAL_ADC_STATE_DS_EOC);
2586
2587 /* Is it the end of the sequence ? */
2588 if ((hadc->Instance->IRQ_STATUS & ADC_IRQ_FLAG_EOS) != 0UL)
2589 {
2590 /* Is it in continuous mode */
2591 if (LL_ADC_IsContinuousModeEnabled(hadc->Instance) == 0UL)
2592 {
2593 /* It is not bit is not set, no more conversions expected */
2594 CLEAR_BIT(hadc->State, HAL_ADC_STATE_DS_BUSY);
2595 }
2596 }
2597 else
2598 {
2599 /* DMA End of Transfer interrupt was triggered but conversions sequence
2600 is not over. If DMA_DS_ENA is set to 0, conversions are stopped. */
2601 if (LL_ADC_IsDMAModeDSEnabled(hadc->Instance) == 0UL)
2602 {
2603 /* DMA_DS_ENA bit is not set, conversions are stopped. */
2604 CLEAR_BIT(hadc->State, HAL_ADC_STATE_DS_BUSY);
2605 }
2606 }
2607
2608 /* Conversion complete callback */
2609 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2610 hadc->ConvCpltCallback(hadc);
2611 #else
2612 HAL_ADC_ConvCpltCallback(hadc);
2613 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2614 }
2615 else /* DMA and-or internal error occurred */
2616 {
2617 if ((hadc->State & HAL_ADC_STATE_ERROR_INTERNAL) != 0UL)
2618 {
2619 /* Call HAL ADC Error Callback function */
2620 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2621 hadc->ErrorCallback(hadc);
2622 #else
2623 HAL_ADC_ErrorCallback(hadc);
2624 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2625 }
2626 else
2627 {
2628 /* Call ADC DMA error callback */
2629 hadc->DMA_Handle->XferErrorCallback(hdma);
2630 }
2631 }
2632 }
2633
2634 /**
2635 * @brief DMA half transfer complete callback.
2636 * @param hdma pointer to DMA handle.
2637 * @retval None
2638 */
ADC_DMAHalfConvCplt(DMA_HandleTypeDef * hdma)2639 void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
2640 {
2641 /* Retrieve ADC handle corresponding to current DMA handle */
2642 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2643
2644 /* Half conversion callback */
2645 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2646 hadc->ConvHalfCpltCallback(hadc);
2647 #else
2648 HAL_ADC_ConvHalfCpltCallback(hadc);
2649 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2650 }
2651
2652 /**
2653 * @brief DMA error callback.
2654 * @param hdma pointer to DMA handle.
2655 * @retval None
2656 */
ADC_DMAError(DMA_HandleTypeDef * hdma)2657 void ADC_DMAError(DMA_HandleTypeDef *hdma)
2658 {
2659 /* Retrieve ADC handle corresponding to current DMA handle */
2660 ADC_HandleTypeDef *hadc = (ADC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2661
2662 /* Set ADC state */
2663 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
2664
2665 /* Set ADC error code to DMA error */
2666 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
2667
2668 /* Error callback */
2669 #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
2670 hadc->ErrorCallback(hadc);
2671 #else
2672 HAL_ADC_ErrorCallback(hadc);
2673 #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
2674 }
2675
2676
2677 /**
2678 * @}
2679 */
2680
2681 #endif /* HAL_ADC_MODULE_ENABLED */
2682 /**
2683 * @}
2684 */
2685
2686 /**
2687 * @}
2688 */
2689
