1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_smbus_ex.h 4 * @author MCD Application Team 5 * @brief Header file of SMBUS HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_SMBUS_EX_H 21 #define STM32U5xx_HAL_SMBUS_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SMBUSEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types 40 * @{ 41 */ 42 43 /** @defgroup SMBUS_Autonomous_Mode_Configuration_Structure_definition Autonomous Mode Configuration 44 Structure definition. 45 * @brief SMBUS Autonomous Mode Configuration structure definition 46 * @{ 47 */ 48 typedef struct 49 { 50 uint32_t TriggerState; /*!< Specifies the trigger state. This parameter can be a value 51 of @ref SMBUSEx_AutonomousMode_FunctionalState */ 52 53 uint32_t TriggerSelection; /*!< Specifies the autonomous mode trigger signal selection. This parameter 54 can be a value of @ref SMBUSEx_AutonomousMode_TriggerSelection */ 55 56 uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity sensitivity. This parameter 57 can be a value of @ref SMBUSEx_AutonomousMode_TriggerPolarity */ 58 59 } SMBUS_AutonomousModeConfTypeDef; 60 /** 61 * @} 62 */ 63 64 /** 65 * @} 66 */ 67 68 /* Exported constants --------------------------------------------------------*/ 69 /** @defgroup SMBUSEx_Exported_Constants SMBUS Extended Exported Constants 70 * @{ 71 */ 72 73 /** @defgroup SMBUSEx_FastModePlus SMBUS Extended Fast Mode Plus 74 * @{ 75 */ 76 #define SMBUS_FASTMODEPLUS_ENABLE 0x00000000U /*!< Enable Fast Mode Plus */ 77 #define SMBUS_FASTMODEPLUS_DISABLE 0x00000001U /*!< Disable Fast Mode Plus */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup SMBUSEx_AutonomousMode_FunctionalState SMBUS Extended Autonomous Mode State 83 * @{ 84 */ 85 #define SMBUS_AUTO_MODE_DISABLE (0x00000000U) /* Autonomous mode disable */ 86 #define SMBUS_AUTO_MODE_ENABLE I2C_AUTOCR_TRIGEN /* Autonomous mode enable */ 87 /** 88 * @} 89 */ 90 91 /** @defgroup SMBUSEx_AutonomousMode_TriggerSelection SMBUS Extended Autonomous Mode Trigger Selection 92 * @{ 93 */ 94 #define SMBUS_TRIG_GRP1 (0x10000000U) /*!< Trigger Group for I2C1, I2C2, I2C4, I2C5, I2C6 (depends on Product) */ 95 #define SMBUS_TRIG_GRP2 (0x20000000U) /*!< Trigger Group for I2C3 */ 96 97 #define SMBUS_GRP1_GPDMA_CH0_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x00000000U)) 98 /*!< HW Trigger signal is GPDMA_CH0_TRG */ 99 #define SMBUS_GRP1_GPDMA_CH1_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos)) 100 /*!< HW Trigger signal is GPDMA_CH1_TRG */ 101 #define SMBUS_GRP1_GPDMA_CH2_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos)) 102 /*!< HW Trigger signal is GPDMA_CH2_TRG */ 103 #define SMBUS_GRP1_GPDMA_CH3_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos)) 104 /*!< HW Trigger signal is GPDMA_CH3_TRG */ 105 #define SMBUS_GRP1_EXTI5_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos)) 106 /*!< HW Trigger signal is EXTI5_TRG */ 107 #define SMBUS_GRP1_EXTI9_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos)) 108 /*!< HW Trigger signal is EXTI9_TRG */ 109 #define SMBUS_GRP1_LPTIM1_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos)) 110 /*!< HW Trigger signal is LPTIM1_CH1_TRG */ 111 #define SMBUS_GRP1_LPTIM2_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x7U << I2C_AUTOCR_TRIGSEL_Pos)) 112 /*!< HW Trigger signal is LPTIM2_CH1_TRG */ 113 #define SMBUS_GRP1_COMP1_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos)) 114 /*!< HW Trigger signal is COMP1_TRG */ 115 #define SMBUS_GRP1_COMP2_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos)) 116 /*!< HW Trigger signal is COMP2_TRG */ 117 #define SMBUS_GRP1_RTC_ALRA_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos)) 118 /*!< HW Trigger signal is RTC_ALRA_TRG */ 119 #define SMBUS_GRP1_RTC_WUT_TRG (uint32_t)(SMBUS_TRIG_GRP1 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos)) 120 /*!< HW Trigger signal is RTC_WUT_TRG */ 121 122 #define SMBUS_GRP2_LPDMA_CH0_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x00000000U)) 123 /*!< HW Trigger signal is LPDMA_CH0_TRG */ 124 #define SMBUS_GRP2_LPDMA_CH1_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x1U << I2C_AUTOCR_TRIGSEL_Pos)) 125 /*!< HW Trigger signal is LPDMA_CH1_TRG */ 126 #define SMBUS_GRP2_LPDMA_CH2_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x2U << I2C_AUTOCR_TRIGSEL_Pos)) 127 /*!< HW Trigger signal is LPDMA_CH2_TRG */ 128 #define SMBUS_GRP2_LPDMA_CH3_TCF_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x3U << I2C_AUTOCR_TRIGSEL_Pos)) 129 /*!< HW Trigger signal is LPDMA_CH3_TRG */ 130 #define SMBUS_GRP2_EXTI5_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x4U << I2C_AUTOCR_TRIGSEL_Pos)) 131 /*!< HW Trigger signal is EXTI5_TRG */ 132 #define SMBUS_GRP2_EXTI8_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x5U << I2C_AUTOCR_TRIGSEL_Pos)) 133 /*!< HW Trigger signal is EXTI8_TRG */ 134 #define SMBUS_GRP2_LPTIM1_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x6U << I2C_AUTOCR_TRIGSEL_Pos)) 135 /*!< HW Trigger signal is LPTIM1_CH1_TRG */ 136 #define SMBUS_GRP2_LPTIM3_CH1_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x7U << I2C_AUTOCR_TRIGSEL_Pos)) 137 /*!< HW Trigger signal is LPTIM3_CH1_TRG */ 138 #define SMBUS_GRP2_COMP1_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x8U << I2C_AUTOCR_TRIGSEL_Pos)) 139 /*!< HW Trigger signal is COMP1_TRG */ 140 #define SMBUS_GRP2_COMP2_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0x9U << I2C_AUTOCR_TRIGSEL_Pos)) 141 /*!< HW Trigger signal is COMP2_TRG */ 142 #define SMBUS_GRP2_RTC_ALRA_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0xAU << I2C_AUTOCR_TRIGSEL_Pos)) 143 /*!< HW Trigger signal is RTC_ALRA_TRG */ 144 #define SMBUS_GRP2_RTC_WUT_TRG (uint32_t)(SMBUS_TRIG_GRP2 | (0xBU << I2C_AUTOCR_TRIGSEL_Pos)) 145 /*!< HW Trigger signal is RTC_WUT_TRG */ 146 /** 147 * @} 148 */ 149 150 /** @defgroup SMBUSEx_AutonomousMode_TriggerPolarity Extended Autonomous Mode Trigger Polarity 151 * @{ 152 */ 153 #define SMBUS_TRIG_POLARITY_RISING (0x00000000U) /* SMBUS HW Trigger signal on rising edge */ 154 #define SMBUS_TRIG_POLARITY_FALLING I2C_AUTOCR_TRIGPOL /* SMBUS HW Trigger signal on falling edge */ 155 /** 156 * @} 157 */ 158 159 /** 160 * @} 161 */ 162 163 /* Exported macro ------------------------------------------------------------*/ 164 /** @defgroup SMBUSEx_Exported_Macros SMBUS Extended Exported Macros 165 * @{ 166 */ 167 168 /** 169 * @} 170 */ 171 172 /* Exported functions --------------------------------------------------------*/ 173 /** @addtogroup SMBUSEx_Exported_Functions SMBUS Extended Exported Functions 174 * @{ 175 */ 176 177 /** @addtogroup SMBUSEx_Exported_Functions_Group2 WakeUp Mode Functions 178 * @{ 179 */ 180 /* Peripheral Control functions ************************************************/ 181 HAL_StatusTypeDef HAL_SMBUSEx_EnableWakeUp(SMBUS_HandleTypeDef *hsmbus); 182 HAL_StatusTypeDef HAL_SMBUSEx_DisableWakeUp(SMBUS_HandleTypeDef *hsmbus); 183 /** 184 * @} 185 */ 186 187 /** @addtogroup SMBUSEx_Exported_Functions_Group3 Fast Mode Plus Functions 188 * @{ 189 */ 190 HAL_StatusTypeDef HAL_SMBUSEx_ConfigFastModePlus(SMBUS_HandleTypeDef *hsmbus, uint32_t FastModePlus); 191 /** 192 * @} 193 */ 194 195 /** @addtogroup SMBUSEx_Exported_Functions_Group4 Autonomous Mode Functions 196 * @{ 197 */ 198 HAL_StatusTypeDef HAL_SMBUSEx_SetConfigAutonomousMode(SMBUS_HandleTypeDef *hsmbus, 199 const SMBUS_AutonomousModeConfTypeDef *sConfig); 200 HAL_StatusTypeDef HAL_SMBUSEx_GetConfigAutonomousMode(const SMBUS_HandleTypeDef *hsmbus, 201 SMBUS_AutonomousModeConfTypeDef *sConfig); 202 HAL_StatusTypeDef HAL_SMBUSEx_ClearConfigAutonomousMode(SMBUS_HandleTypeDef *hsmbus); 203 /** 204 * @} 205 */ 206 207 /** 208 * @} 209 */ 210 211 /* Private constants ---------------------------------------------------------*/ 212 /** @defgroup SMBUSEx_Private_Constants SMBUS Extended Private Constants 213 * @{ 214 */ 215 216 /** 217 * @} 218 */ 219 220 /* Private macros ------------------------------------------------------------*/ 221 /** @defgroup SMBUSEx_Private_Macro SMBUS Extended Private Macros 222 * @{ 223 */ 224 #define IS_SMBUS_FASTMODEPLUS(__CONFIG__) (((__CONFIG__) == (SMBUS_FASTMODEPLUS_ENABLE)) || \ 225 ((__CONFIG__) == (SMBUS_FASTMODEPLUS_DISABLE))) 226 227 #define IS_SMBUS_AUTO_MODE(__MODE__) (((__MODE__) == SMBUS_AUTO_MODE_DISABLE) || \ 228 ((__MODE__) == SMBUS_AUTO_MODE_ENABLE)) 229 230 #define IS_SMBUS_TRIG_SOURCE(__INSTANCE__, __SOURCE__) (((__INSTANCE__) == I2C3) ? \ 231 IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__) : \ 232 IS_SMBUS_GRP1_TRIG_SOURCE(__SOURCE__)) 233 234 #define IS_SMBUS_GRP1_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP1_GPDMA_CH0_TCF_TRG ) || \ 235 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH1_TCF_TRG ) || \ 236 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH2_TCF_TRG ) || \ 237 ((__SOURCE__) == SMBUS_GRP1_GPDMA_CH3_TCF_TRG ) || \ 238 ((__SOURCE__) == SMBUS_GRP1_EXTI5_TRG ) || \ 239 ((__SOURCE__) == SMBUS_GRP1_EXTI9_TRG ) || \ 240 ((__SOURCE__) == SMBUS_GRP1_LPTIM1_CH1_TRG ) || \ 241 ((__SOURCE__) == SMBUS_GRP1_LPTIM2_CH1_TRG ) || \ 242 ((__SOURCE__) == SMBUS_GRP1_COMP1_TRG ) || \ 243 ((__SOURCE__) == SMBUS_GRP1_COMP2_TRG ) || \ 244 ((__SOURCE__) == SMBUS_GRP1_RTC_ALRA_TRG ) || \ 245 ((__SOURCE__) == SMBUS_GRP1_RTC_WUT_TRG )) 246 247 #define IS_SMBUS_GRP2_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SMBUS_GRP2_LPDMA_CH0_TCF_TRG ) || \ 248 ((__SOURCE__) == SMBUS_GRP2_LPDMA_CH1_TCF_TRG ) || \ 249 ((__SOURCE__) == SMBUS_GRP2_LPDMA_CH2_TCF_TRG ) || \ 250 ((__SOURCE__) == SMBUS_GRP2_LPDMA_CH3_TCF_TRG ) || \ 251 ((__SOURCE__) == SMBUS_GRP2_EXTI5_TRG ) || \ 252 ((__SOURCE__) == SMBUS_GRP2_EXTI8_TRG ) || \ 253 ((__SOURCE__) == SMBUS_GRP2_LPTIM1_CH1_TRG ) || \ 254 ((__SOURCE__) == SMBUS_GRP2_LPTIM3_CH1_TRG ) || \ 255 ((__SOURCE__) == SMBUS_GRP2_COMP1_TRG ) || \ 256 ((__SOURCE__) == SMBUS_GRP2_COMP2_TRG ) || \ 257 ((__SOURCE__) == SMBUS_GRP2_RTC_ALRA_TRG ) || \ 258 ((__SOURCE__) == SMBUS_GRP2_RTC_WUT_TRG )) 259 260 #define IS_SMBUS_TRIG_INPUT_INSTANCE(__INSTANCE__) (IS_SMBUS_GRP1_INSTANCE(__INSTANCE__) || \ 261 IS_SMBUS_GRP2_INSTANCE(__INSTANCE__)) 262 263 #define IS_SMBUS_AUTO_MODE_TRG_POL(__POLARITY__) (((__POLARITY__) == SMBUS_TRIG_POLARITY_RISING) || \ 264 ((__POLARITY__) == SMBUS_TRIG_POLARITY_FALLING)) 265 /** 266 * @} 267 */ 268 269 /* Private Functions ---------------------------------------------------------*/ 270 /** @defgroup SMBUSEx_Private_Functions SMBUS Extended Private Functions 271 * @{ 272 */ 273 /* Private functions are defined in stm32u5xx_hal_smbus_ex.c file */ 274 /** 275 * @} 276 */ 277 278 /** 279 * @} 280 */ 281 282 /** 283 * @} 284 */ 285 286 #ifdef __cplusplus 287 } 288 #endif 289 290 #endif /* STM32U5xx_HAL_SMBUS_EX_H */ 291
