1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_PWR_H 21 #define STM32U5xx_HAL_PWR_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif /* __cplusplus */ 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup PWR 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 40 /** @defgroup PWR_Exported_Types PWR Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief PWR PVD configuration structure definition 46 */ 47 typedef struct 48 { 49 uint32_t PVDLevel; /*!< Specifies the PVD detection level. 50 This parameter can be a value of 51 @ref PWR_PVD_Detection_Level. */ 52 53 uint32_t Mode; /*!< Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode. */ 55 } PWR_PVDTypeDef; 56 /** 57 * @} 58 */ 59 60 /* Exported constants --------------------------------------------------------*/ 61 62 /** @defgroup PWR_Exported_Constants PWR Exported Constants 63 * @{ 64 */ 65 66 /** @defgroup PWR_PVD_Detection_Level Programmable Voltage Detection Level 67 * @{ 68 */ 69 #define PWR_PVDLEVEL_0 0x00000000UL /*!< PVD threshold around 2.0 V */ 70 #define PWR_PVDLEVEL_1 (PWR_SVMCR_PVDLS_0) /*!< PVD threshold around 2.2 V */ 71 #define PWR_PVDLEVEL_2 (PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.4 V */ 72 #define PWR_PVDLEVEL_3 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_1) /*!< PVD threshold around 2.5 V */ 73 #define PWR_PVDLEVEL_4 (PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.6 V */ 74 #define PWR_PVDLEVEL_5 (PWR_SVMCR_PVDLS_0 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.8 V */ 75 #define PWR_PVDLEVEL_6 (PWR_SVMCR_PVDLS_1 | PWR_SVMCR_PVDLS_2) /*!< PVD threshold around 2.9 V */ 76 #define PWR_PVDLEVEL_7 (PWR_SVMCR_PVDLS) /*!< External input analog voltage 77 (compared internally to VREFINT) */ 78 /** 79 * @} 80 */ 81 82 /** @defgroup PWR_PVD_Mode PWR PVD Mode 83 * @{ 84 */ 85 #define PWR_PVD_MODE_NORMAL (0x00U) /*!< Basic Mode is used */ 86 #define PWR_PVD_MODE_IT_RISING (0x05U) /*!< External Interrupt Mode with Rising edge trigger detection */ 87 #define PWR_PVD_MODE_IT_FALLING (0x06U) /*!< External Interrupt Mode with Falling edge trigger detection */ 88 #define PWR_PVD_MODE_IT_RISING_FALLING (0x07U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 89 #define PWR_PVD_MODE_EVENT_RISING (0x09U) /*!< Event Mode with Rising edge trigger detection */ 90 #define PWR_PVD_MODE_EVENT_FALLING (0x0AU) /*!< Event Mode with Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x0BU) /*!< Event Mode with Rising/Falling edge trigger detection */ 92 /** 93 * @} 94 */ 95 96 /** @defgroup PWR_Regulator_In_LowPower_Mode PWR Regulator State in Sleep/Stop Mode 97 * @{ 98 */ 99 #define PWR_MAINREGULATOR_ON (0x00U) /*!< Main Regulator ON in Run Mode */ 100 #define PWR_LOWPOWERREGULATOR_ON (0x00U) /*!< Main Regulator ON in Low Power Mode */ 101 /** 102 * @} 103 */ 104 105 /** @defgroup PWR_Sleep_Mode_Entry PWR Sleep Mode Entry 106 * @{ 107 */ 108 #define PWR_SLEEPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Sleep mode */ 109 #define PWR_SLEEPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Sleep mode */ 110 #define PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR (0x03U) 111 /** 112 * @} 113 */ 114 115 /** @defgroup PWR_Stop_Mode_Entry PWR Stop Mode Entry 116 * @{ 117 */ 118 #define PWR_STOPENTRY_WFI (0x01U) /*!< Wait For Interruption instruction to enter Stop mode */ 119 #define PWR_STOPENTRY_WFE (0x02U) /*!< Wait For Event instruction to enter Stop mode */ 120 #define PWR_STOPENTRY_WFE_NO_EVT_CLEAR (0x03U) 121 /** 122 * @} 123 */ 124 125 /** @defgroup PWR_Flags PWR Flags 126 * @{ 127 */ 128 #define PWR_FLAG_VOSRDY (0x01U) /*!< Voltage scaling ready flag */ 129 #define PWR_FLAG_BOOSTRDY (0x02U) /*!< EPOD booster ready flag */ 130 #define PWR_FLAG_STOPF (0x03U) /*!< Stop flag */ 131 #define PWR_FLAG_SBF (0x04U) /*!< Standby flag */ 132 #define PWR_FLAG_VDDA2RDY (0x05U) /*!< VDDA ready flag (versus 1.8 V threshold) */ 133 #define PWR_FLAG_VDDA1RDY (0x06U) /*!< VDDA ready flag (versus 1.6 V threshold) */ 134 #define PWR_FLAG_VDDIO2RDY (0x07U) /*!< VDDIO2 ready flag */ 135 #define PWR_FLAG_VDDUSBRDY (0x08U) /*!< VDDUSB ready flag */ 136 #define PWR_FLAG_ACTVOSRDY (0x09U) /*!< Currently applied VOS ready flag */ 137 #define PWR_FLAG_PVDO (0x0AU) /*!< VDD voltage detector output flag */ 138 #define PWR_FLAG_REGS (0x0BU) /*!< Regulator selection flag */ 139 #define PWR_FLAG_TEMPH (0x0CU) /*!< Temperature level flag (versus high threshold) */ 140 #define PWR_FLAG_TEMPL (0x0DU) /*!< Temperature level flag (versus low threshold) */ 141 #define PWR_FLAG_VBATH (0x0EU) /*!< Backup domain voltage level flag (versus high threshold) */ 142 #if defined (PWR_VOSR_USBBOOSTRDY) 143 #define PWR_FLAG_USBBOOSTRDY (0x0FU) /*!< USB EPOD booster ready flag */ 144 #endif /* defined (PWR_VOSR_USBBOOSTRDY) */ 145 /** 146 * @} 147 */ 148 149 /** @defgroup PWR_WakeUp_Lines_Flags PWR Wakeup Lines Flags 150 * @{ 151 */ 152 #define PWR_WAKEUP_FLAG1 (0x10U) /*!< Wakeup flag 1 */ 153 #define PWR_WAKEUP_FLAG2 (0x20U) /*!< Wakeup flag 2 */ 154 #define PWR_WAKEUP_FLAG3 (0x30U) /*!< Wakeup flag 3 */ 155 #define PWR_WAKEUP_FLAG4 (0x40U) /*!< Wakeup flag 4 */ 156 #define PWR_WAKEUP_FLAG5 (0x50U) /*!< Wakeup flag 5 */ 157 #define PWR_WAKEUP_FLAG6 (0x60U) /*!< Wakeup flag 6 */ 158 #define PWR_WAKEUP_FLAG7 (0x70U) /*!< Wakeup flag 7 */ 159 #define PWR_WAKEUP_FLAG8 (0x80U) /*!< Wakeup flag 8 */ 160 #define PWR_WAKEUP_ALL_FLAG (0x90U) /*!< Wakeup flag all */ 161 /** 162 * @} 163 */ 164 165 /** @defgroup PWR_WakeUp_Pin_High_Polarity PWR Wake Up Pins High Polarity 166 * @{ 167 */ 168 #define PWR_WAKEUP_PIN1_HIGH_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (high polarity) */ 169 #define PWR_WAKEUP_PIN1_HIGH_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (high polarity) */ 170 #define PWR_WAKEUP_PIN1_HIGH_2 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_SOURCE_SELECTION_2) /*!< PE4 : Wakeup pin 1 (high polarity) */ 171 172 #define PWR_WAKEUP_PIN2_HIGH_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (high polarity) */ 173 #define PWR_WAKEUP_PIN2_HIGH_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (high polarity) */ 174 #define PWR_WAKEUP_PIN2_HIGH_2 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_SOURCE_SELECTION_2) /*!< PE5 : Wakeup pin 2 (high polarity) */ 175 176 #define PWR_WAKEUP_PIN3_HIGH_0 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_0) /*!< PE6 : Wakeup pin 3 (high polarity) */ 177 #define PWR_WAKEUP_PIN3_HIGH_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (high polarity) */ 178 #define PWR_WAKEUP_PIN3_HIGH_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (high polarity) */ 179 180 #define PWR_WAKEUP_PIN4_HIGH_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (high polarity) */ 181 #define PWR_WAKEUP_PIN4_HIGH_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (high polarity) */ 182 #define PWR_WAKEUP_PIN4_HIGH_2 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 4 (high polarity) */ 183 184 #define PWR_WAKEUP_PIN5_HIGH_0 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_0) /*!< PC5 : Wakeup pin 5 (high polarity) */ 185 #define PWR_WAKEUP_PIN5_HIGH_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (high polarity) */ 186 #define PWR_WAKEUP_PIN5_HIGH_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB8 : Wakeup pin 5 (high polarity) */ 187 188 #define PWR_WAKEUP_PIN6_HIGH_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PB5 : Wakeup pin 6 (high polarity) */ 189 #define PWR_WAKEUP_PIN6_HIGH_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (high polarity) */ 190 #define PWR_WAKEUP_PIN6_HIGH_2 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_2) /*!< PE7 : Wakeup pin 6 (high polarity) */ 191 #define PWR_WAKEUP_PIN6_HIGH_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (high polarity) */ 192 193 #define PWR_WAKEUP_PIN7_HIGH_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB15 : Wakeup pin 7 (high polarity) */ 194 #define PWR_WAKEUP_PIN7_HIGH_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (high polarity) */ 195 #define PWR_WAKEUP_PIN7_HIGH_2 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_2) /*!< PE8 : Wakeup pin 7 (high polarity) */ 196 #define PWR_WAKEUP_PIN7_HIGH_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (high polarity) */ 197 198 #define PWR_WAKEUP_PIN8_HIGH_0 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_0) /*!< PF2 : Wakeup pin 8 (high polarity) */ 199 #define PWR_WAKEUP_PIN8_HIGH_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (high polarity) */ 200 #define PWR_WAKEUP_PIN8_HIGH_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB10 : Wakeup pin 8 (high polarity) */ 201 #define PWR_WAKEUP_PIN8_HIGH_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 8 (high polarity) */ 202 /** 203 * @} 204 */ 205 206 /** @defgroup PWR_WakeUp_Pin_Low_Polarity PWR Wake Up Pins Low Polarity 207 * @{ 208 */ 209 #define PWR_WAKEUP_PIN1_LOW_0 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_0) /*!< PA0 : Wakeup pin 1 (low polarity) */ 210 #define PWR_WAKEUP_PIN1_LOW_1 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_1) /*!< PB2 : Wakeup pin 1 (low polarity) */ 211 #define PWR_WAKEUP_PIN1_LOW_2 (PWR_WUCR1_WUPEN1 | PWR_WAKEUP1_POLARITY_LOW | PWR_WAKEUP1_SOURCE_SELECTION_2) /*!< PE4 : Wakeup pin 1 (low polarity) */ 212 213 #define PWR_WAKEUP_PIN2_LOW_0 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_0) /*!< PA4 : Wakeup pin 2 (low polarity) */ 214 #define PWR_WAKEUP_PIN2_LOW_1 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_1) /*!< PC13 : Wakeup pin 2 (low polarity) */ 215 #define PWR_WAKEUP_PIN2_LOW_2 (PWR_WUCR1_WUPEN2 | PWR_WAKEUP2_POLARITY_LOW | PWR_WAKEUP2_SOURCE_SELECTION_2) /*!< PE5 : Wakeup pin 2 (low polarity) */ 216 217 #define PWR_WAKEUP_PIN3_LOW_0 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_0) /*!< PE6 : Wakeup pin 3 (low polarity) */ 218 #define PWR_WAKEUP_PIN3_LOW_1 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_1) /*!< PA1 : Wakeup pin 3 (low polarity) */ 219 #define PWR_WAKEUP_PIN3_LOW_2 (PWR_WUCR1_WUPEN3 | PWR_WAKEUP3_POLARITY_LOW | PWR_WAKEUP3_SOURCE_SELECTION_2) /*!< PB6 : Wakeup pin 3 (low polarity) */ 220 221 #define PWR_WAKEUP_PIN4_LOW_0 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_0) /*!< PA2 : Wakeup pin 4 (low polarity) */ 222 #define PWR_WAKEUP_PIN4_LOW_1 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_1) /*!< PB1 : Wakeup pin 4 (low polarity) */ 223 #define PWR_WAKEUP_PIN4_LOW_2 (PWR_WUCR1_WUPEN4 | PWR_WAKEUP4_POLARITY_LOW | PWR_WAKEUP4_SOURCE_SELECTION_2) /*!< PB7 : Wakeup pin 4 (low polarity) */ 224 225 #define PWR_WAKEUP_PIN5_LOW_0 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_0) /*!< PC5 : Wakeup pin 5 (low polarity) */ 226 #define PWR_WAKEUP_PIN5_LOW_1 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_1) /*!< PA3 : Wakeup pin 5 (low polarity) */ 227 #define PWR_WAKEUP_PIN5_LOW_2 (PWR_WUCR1_WUPEN5 | PWR_WAKEUP5_POLARITY_LOW | PWR_WAKEUP5_SOURCE_SELECTION_2) /*!< PB8 : Wakeup pin 5 (low polarity) */ 228 229 #define PWR_WAKEUP_PIN6_LOW_0 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_0) /*!< PB5 : Wakeup pin 6 (low polarity) */ 230 #define PWR_WAKEUP_PIN6_LOW_1 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_1) /*!< PA5 : Wakeup pin 6 (low polarity) */ 231 #define PWR_WAKEUP_PIN6_LOW_2 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_2) /*!< PE7 : Wakeup pin 6 (low polarity) */ 232 #define PWR_WAKEUP_PIN6_LOW_3 (PWR_WUCR1_WUPEN6 | PWR_WAKEUP6_POLARITY_LOW | PWR_WAKEUP6_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 6 (low polarity) */ 233 234 #define PWR_WAKEUP_PIN7_LOW_0 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_0) /*!< PB15 : Wakeup pin 7 (low polarity) */ 235 #define PWR_WAKEUP_PIN7_LOW_1 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_1) /*!< PA6 : Wakeup pin 7 (low polarity) */ 236 #define PWR_WAKEUP_PIN7_LOW_2 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_2) /*!< PE8 : Wakeup pin 7 (low polarity) */ 237 #define PWR_WAKEUP_PIN7_LOW_3 (PWR_WUCR1_WUPEN7 | PWR_WAKEUP7_POLARITY_LOW | PWR_WAKEUP7_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 7 (low polarity) */ 238 239 #define PWR_WAKEUP_PIN8_LOW_0 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_0) /*!< PF2 : Wakeup pin 8 (low polarity) */ 240 #define PWR_WAKEUP_PIN8_LOW_1 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_1) /*!< PA7 : Wakeup pin 8 (low polarity) */ 241 #define PWR_WAKEUP_PIN8_LOW_2 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_2) /*!< PB10 : Wakeup pin 8 (low polarity) */ 242 #define PWR_WAKEUP_PIN8_LOW_3 (PWR_WUCR1_WUPEN8 | PWR_WAKEUP8_POLARITY_LOW | PWR_WAKEUP8_SOURCE_SELECTION_3) /*!< RTC : Wakeup pin 8 (low polarity) */ 243 /** 244 * @} 245 */ 246 247 /** @defgroup PWR_WakeUp_Pins PWR Wake Up Pins (Default polarity and default pin selection) 248 * @{ 249 */ 250 #define PWR_WAKEUP_PIN1 (PWR_WUCR1_WUPEN1) /*!< PA0 : Wakeup pin 1 (high polarity) */ 251 #define PWR_WAKEUP_PIN2 (PWR_WUCR1_WUPEN2) /*!< PA4 : Wakeup pin 2 (high polarity) */ 252 #define PWR_WAKEUP_PIN3 (PWR_WUCR1_WUPEN3) /*!< PE6 : Wakeup pin 3 (high polarity) */ 253 #define PWR_WAKEUP_PIN4 (PWR_WUCR1_WUPEN4) /*!< PA2 : Wakeup pin 4 (high polarity) */ 254 #define PWR_WAKEUP_PIN5 (PWR_WUCR1_WUPEN5) /*!< PC5 : Wakeup pin 5 (high polarity) */ 255 #define PWR_WAKEUP_PIN6 (PWR_WUCR1_WUPEN6) /*!< PB5 : Wakeup pin 6 (high polarity) */ 256 #define PWR_WAKEUP_PIN7 (PWR_WUCR1_WUPEN7) /*!< PB15 : Wakeup pin 7 (high polarity) */ 257 #define PWR_WAKEUP_PIN8 (PWR_WUCR1_WUPEN8) /*!< PF2 : Wakeup pin 8 (high polarity) */ 258 /** 259 * @} 260 */ 261 262 /** @defgroup PWR_Items PWR Items 263 * @{ 264 */ 265 #define PWR_WKUP1 (PWR_SECCFGR_WUP1SEC) /*!< WUP1 secure protection */ 266 #define PWR_WKUP2 (PWR_SECCFGR_WUP2SEC) /*!< WUP2 secure protection */ 267 #define PWR_WKUP3 (PWR_SECCFGR_WUP3SEC) /*!< WUP3 secure protection */ 268 #define PWR_WKUP4 (PWR_SECCFGR_WUP4SEC) /*!< WUP4 secure protection */ 269 #define PWR_WKUP5 (PWR_SECCFGR_WUP5SEC) /*!< WUP5 secure protection */ 270 #define PWR_WKUP6 (PWR_SECCFGR_WUP6SEC) /*!< WUP6 secure protection */ 271 #define PWR_WKUP7 (PWR_SECCFGR_WUP7SEC) /*!< WUP7 secure protection */ 272 #define PWR_WKUP8 (PWR_SECCFGR_WUP8SEC) /*!< WUP8 secure protection */ 273 #define PWR_LPM (PWR_SECCFGR_LPMSEC) /*!< Low power modes secure protection */ 274 #define PWR_VDM (PWR_SECCFGR_VDMSEC) /*!< Voltage detection and monitoring secure protection */ 275 #define PWR_VB (PWR_SECCFGR_VBSEC) /*!< Backup domain secure protection */ 276 #define PWR_APC (PWR_SECCFGR_APCSEC) /*!< Pull-up/pull-down secure protection */ 277 #define PWR_ALL (PWR_WKUP1 | PWR_WKUP2 | PWR_WKUP3 | PWR_WKUP4 | \ 278 PWR_WKUP5 | PWR_WKUP7 | PWR_WKUP6 | PWR_WKUP8 | \ 279 PWR_LPM | PWR_VDM | PWR_VB | PWR_APC) 280 /** 281 * @} 282 */ 283 284 /** @defgroup PWR_Attributes PWR Attributes 285 * @brief PWR Privilege/NPrivilege and Secure/NSecure Attributes 286 * @{ 287 */ 288 #define PWR_NSEC_PRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK | 0x01U) /*!< NSecure and Privileged attribute */ 289 #define PWR_NSEC_NPRIV (PWR_ITEM_ATTR_NSEC_PRIV_MASK) /*!< NSecure and NPrivileged attribute */ 290 #define PWR_SEC_PRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK | 0x02U) /*!< Secure and Privileged attribute */ 291 #define PWR_SEC_NPRIV (PWR_ITEM_ATTR_SEC_PRIV_MASK) /*!< Secure and NPrivileged attribute */ 292 /** 293 * @} 294 */ 295 296 /** 297 * @} 298 */ 299 300 /* Exported macros -----------------------------------------------------------*/ 301 302 /** @defgroup PWR_Exported_Macros PWR Exported Macros 303 * @{ 304 */ 305 306 /** @brief Check PWR flags are set or not. 307 * @param __FLAG__ : Specifies the flag to check. 308 * This parameter can be one of the following values : 309 * @arg @ref PWR_FLAG_VOSRDY : Voltage scaling ready flag. 310 * Indicates that the Vcore level at or above VOS selected level. 311 * @arg @ref PWR_FLAG_BOOSTRDY : EPOD booster ready flag. 312 * Indicates that EPOD booster ready, 313 * frequency could be higher than 50 MHz. 314 * @arg @ref PWR_FLAG_USBBOOSTRDY : USB EPOD booster ready flag. 315 * Indicates that USB EPOD booster ready, 316 * frequency could be higher than 50 MHz. 317 * This flag is available only for STM32U59xxx and STM32U5Axxx 318 * devices. 319 * @arg @ref PWR_FLAG_STOPF : Stop flag. 320 * Indicates that the device was resumed from Stop mode. 321 * @arg @ref PWR_FLAG_SBF : Standby flag. 322 * Indicates that the device was resumed from Standby mode. 323 * @arg @ref PWR_FLAG_VDDA2RDY : VDDA2 ready flag (versus 1.8 V threshold). 324 * Indicates that VDDA is equal or above the threshold 325 * of the VDDA voltage monitor 2 (around 1.8 V). 326 * @arg @ref PWR_FLAG_VDDA1RDY : VDDA1 ready flag (versus 1.6 V threshold). 327 * Indicates that VDDA is equal or above the threshold 328 * of the VDDA voltage monitor 1 (around 1.6 V). 329 * @arg @ref PWR_FLAG_VDDIO2RDY : VDDIO2 ready flag (versus 0.9 V threshold). 330 * Indicates that VDDIO2 is equal or above the threshold 331 * of the VDDIO2 voltage monitor (around 0.9 V). 332 * @arg @ref PWR_FLAG_VDDUSBRDY : VDDUSB ready flag (versus 1.2 V threshold). 333 * Indicates that VDDUSB is equal or above the threshold 334 * of the VDDUSB voltage monitor (around 1.2 V). 335 * @arg @ref PWR_FLAG_ACTVOSRDY : Currently applied VOS ready flag. 336 * Indicates that Vcore is equal to the current 337 * voltage scaling provided by ACTVOS. 338 * @arg @ref PWR_FLAG_PVDO VDD : Voltage detector output flag. 339 * Indicates that Vdd is equal or above 340 * the PVD threshold selected by PVDLS. 341 * @arg @ref PWR_FLAG_REGS : Regulator selection flag. 342 * Indicates the regulator selected. 343 * @arg @ref PWR_FLAG_TEMPH : Temperature level flag (versus high threshold). 344 * Indicates the temperature is equal or above high threshold. 345 * @arg @ref PWR_FLAG_TEMPL : Temperature level flag (versus low threshold). 346 * Indicates the temperature is equal or above low threshold. 347 * @arg @ref PWR_FLAG_VBATH : Backup domain voltage level flag (versus high threshold). 348 * Indicates the backup domain voltage 349 * level is equal or above high threshold. 350 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 351 * Indicates that a wakeup event was received from the WKUP line 1. 352 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 353 * Indicates that a wakeup event was received from the WKUP line 2. 354 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 355 * Indicates that a wakeup event was received from the WKUP line 3. 356 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 357 * Indicates that a wakeup event was received from the WKUP line 4. 358 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 359 * Indicates that a wakeup event was received from the WKUP line 5. 360 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 361 * Indicates that a wakeup event was received from the WKUP line 6. 362 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 363 * Indicates that a wakeup event was received from the WKUP line 7. 364 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 365 * Indicates that a wakeup event was received from the WKUP line 8. 366 * @retval The state of __FLAG__ (TRUE or FALSE). 367 */ 368 #if defined (PWR_FLAG_USBBOOSTRDY) 369 #define __HAL_PWR_GET_FLAG(__FLAG__) \ 370 ( \ 371 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY) == PWR_VOSR_VOSRDY) : \ 372 ((__FLAG__) == PWR_FLAG_BOOSTRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_BOOSTRDY) == PWR_VOSR_BOOSTRDY) : \ 373 ((__FLAG__) == PWR_FLAG_USBBOOSTRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_USBBOOSTRDY) == PWR_VOSR_USBBOOSTRDY) : \ 374 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF) == PWR_SR_STOPF) : \ 375 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF) == PWR_SR_SBF) : \ 376 ((__FLAG__) == PWR_FLAG_VDDA2RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA2RDY) == PWR_SVMSR_VDDA2RDY) : \ 377 ((__FLAG__) == PWR_FLAG_VDDA1RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == PWR_SVMSR_VDDA1RDY) : \ 378 ((__FLAG__) == PWR_FLAG_VDDIO2RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDIO2RDY) == PWR_SVMSR_VDDIO2RDY) : \ 379 ((__FLAG__) == PWR_FLAG_VDDUSBRDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDUSBRDY) == PWR_SVMSR_VDDUSBRDY) : \ 380 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY) == PWR_SVMSR_ACTVOSRDY) : \ 381 ((__FLAG__) == PWR_FLAG_PVDO) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO) == PWR_SVMSR_PVDO) : \ 382 ((__FLAG__) == PWR_FLAG_REGS) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == PWR_SVMSR_REGS) : \ 383 ((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TEMPH) : \ 384 ((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TEMPL) : \ 385 ((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VBATH) : \ 386 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == PWR_WUSR_WUF1) : \ 387 ((__FLAG__) == PWR_WAKEUP_FLAG2) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == PWR_WUSR_WUF2) : \ 388 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == PWR_WUSR_WUF3) : \ 389 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == PWR_WUSR_WUF4) : \ 390 ((__FLAG__) == PWR_WAKEUP_FLAG5) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == PWR_WUSR_WUF5) : \ 391 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == PWR_WUSR_WUF6) : \ 392 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == PWR_WUSR_WUF7) : \ 393 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 394 #else 395 #define __HAL_PWR_GET_FLAG(__FLAG__) \ 396 ( \ 397 ((__FLAG__) == PWR_FLAG_VOSRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_VOSRDY) == PWR_VOSR_VOSRDY) : \ 398 ((__FLAG__) == PWR_FLAG_BOOSTRDY) ? (READ_BIT(PWR->VOSR, PWR_VOSR_BOOSTRDY) == PWR_VOSR_BOOSTRDY) : \ 399 ((__FLAG__) == PWR_FLAG_STOPF) ? (READ_BIT(PWR->SR, PWR_SR_STOPF) == PWR_SR_STOPF) : \ 400 ((__FLAG__) == PWR_FLAG_SBF) ? (READ_BIT(PWR->SR, PWR_SR_SBF) == PWR_SR_SBF) : \ 401 ((__FLAG__) == PWR_FLAG_VDDA2RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA2RDY) == PWR_SVMSR_VDDA2RDY) : \ 402 ((__FLAG__) == PWR_FLAG_VDDA1RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDA1RDY) == PWR_SVMSR_VDDA1RDY) : \ 403 ((__FLAG__) == PWR_FLAG_VDDIO2RDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDIO2RDY) == PWR_SVMSR_VDDIO2RDY) : \ 404 ((__FLAG__) == PWR_FLAG_VDDUSBRDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_VDDUSBRDY) == PWR_SVMSR_VDDUSBRDY) : \ 405 ((__FLAG__) == PWR_FLAG_ACTVOSRDY) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_ACTVOSRDY) == PWR_SVMSR_ACTVOSRDY) : \ 406 ((__FLAG__) == PWR_FLAG_PVDO) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_PVDO) == PWR_SVMSR_PVDO) : \ 407 ((__FLAG__) == PWR_FLAG_REGS) ? (READ_BIT(PWR->SVMSR, PWR_SVMSR_REGS) == PWR_SVMSR_REGS) : \ 408 ((__FLAG__) == PWR_FLAG_TEMPH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPH) == PWR_BDSR_TEMPH) : \ 409 ((__FLAG__) == PWR_FLAG_TEMPL) ? (READ_BIT(PWR->BDSR, PWR_BDSR_TEMPL) == PWR_BDSR_TEMPL) : \ 410 ((__FLAG__) == PWR_FLAG_VBATH) ? (READ_BIT(PWR->BDSR, PWR_BDSR_VBATH) == PWR_BDSR_VBATH) : \ 411 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF1) == PWR_WUSR_WUF1) : \ 412 ((__FLAG__) == PWR_WAKEUP_FLAG2) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF2) == PWR_WUSR_WUF2) : \ 413 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF3) == PWR_WUSR_WUF3) : \ 414 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF4) == PWR_WUSR_WUF4) : \ 415 ((__FLAG__) == PWR_WAKEUP_FLAG5) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF5) == PWR_WUSR_WUF5) : \ 416 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF6) == PWR_WUSR_WUF6) : \ 417 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (READ_BIT(PWR->WUSR, PWR_WUSR_WUF7) == PWR_WUSR_WUF7) : \ 418 (READ_BIT(PWR->WUSR, PWR_WUSR_WUF8) == PWR_WUSR_WUF8)) 419 #endif /* defined (PWR_FLAG_USBBOOSTRDY) */ 420 421 /** @brief Clear PWR flags. 422 * @param __FLAG__ : Specifies the flag to clear. 423 * This parameter can be one of the following values : 424 * @arg @ref PWR_FLAG_STOPF : Stop flag. 425 * Indicates that the device was resumed from Stop mode. 426 * @arg @ref PWR_FLAG_SBF : Standby flag. 427 * Indicates that the device was resumed from Standby mode. 428 * @arg @ref PWR_WAKEUP_FLAG1 : Wakeup flag 1. 429 * Indicates that a wakeup event was received from the WKUP line 1. 430 * @arg @ref PWR_WAKEUP_FLAG2 : Wakeup flag 2. 431 * Indicates that a wakeup event was received from the WKUP line 2. 432 * @arg @ref PWR_WAKEUP_FLAG3 : Wakeup flag 3. 433 * Indicates that a wakeup event was received from the WKUP line 3. 434 * @arg @ref PWR_WAKEUP_FLAG4 : Wakeup flag 4. 435 * Indicates that a wakeup event was received from the WKUP line 4. 436 * @arg @ref PWR_WAKEUP_FLAG5 : Wakeup flag 5. 437 * Indicates that a wakeup event was received from the WKUP line 5. 438 * @arg @ref PWR_WAKEUP_FLAG6 : Wakeup flag 6. 439 * Indicates that a wakeup event was received from the WKUP line 6. 440 * @arg @ref PWR_WAKEUP_FLAG7 : Wakeup flag 7. 441 * Indicates that a wakeup event was received from the WKUP line 7. 442 * @arg @ref PWR_WAKEUP_FLAG8 : Wakeup flag 8. 443 * Indicates that a wakeup event was received from the WKUP line 8. 444 * @retval None. 445 */ 446 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) \ 447 ( \ 448 ((__FLAG__) == PWR_FLAG_STOPF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 449 ((__FLAG__) == PWR_FLAG_SBF) ? (SET_BIT(PWR->SR, PWR_SR_CSSF)) : \ 450 ((__FLAG__) == PWR_WAKEUP_FLAG1) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF1)) : \ 451 ((__FLAG__) == PWR_WAKEUP_FLAG2) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF2)) : \ 452 ((__FLAG__) == PWR_WAKEUP_FLAG3) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF3)) : \ 453 ((__FLAG__) == PWR_WAKEUP_FLAG4) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF4)) : \ 454 ((__FLAG__) == PWR_WAKEUP_FLAG5) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF5)) : \ 455 ((__FLAG__) == PWR_WAKEUP_FLAG6) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF6)) : \ 456 ((__FLAG__) == PWR_WAKEUP_FLAG7) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF7)) : \ 457 ((__FLAG__) == PWR_WAKEUP_FLAG8) ? (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF8)) : \ 458 (SET_BIT(PWR->WUSCR, PWR_WUSCR_CWUF))) 459 460 /** 461 * @brief Enable the PVD Extended Interrupt Line. 462 * @retval None. 463 */ 464 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 465 466 /** 467 * @brief Disable the PVD Extended Interrupt Line. 468 * @retval None. 469 */ 470 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 471 472 /** 473 * @brief Enable the PVD Event Line. 474 * @retval None. 475 */ 476 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 477 478 /** 479 * @brief Disable the PVD Event Line. 480 * @retval None. 481 */ 482 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EXTI_LINE_PVD) 483 484 /** 485 * @brief Enable the PVD Extended Interrupt Rising Trigger. 486 * @retval None. 487 */ 488 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 489 490 /** 491 * @brief Disable the PVD Extended Interrupt Rising Trigger. 492 * @retval None. 493 */ 494 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 495 496 /** 497 * @brief Enable the PVD Extended Interrupt Falling Trigger. 498 * @retval None. 499 */ 500 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 501 502 /** 503 * @brief Disable the PVD Extended Interrupt Falling Trigger. 504 * @retval None. 505 */ 506 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 507 508 /** 509 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 510 * @retval None. 511 */ 512 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 513 do \ 514 { \ 515 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 516 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 517 } while(0) 518 519 /** 520 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 521 * @retval None. 522 */ 523 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 524 do \ 525 { \ 526 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 527 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 528 } while(0) 529 530 /** 531 * @brief Generate a Software Interrupt on selected EXTI line. 532 * @retval None 533 */ 534 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 535 536 /** 537 * @brief Check whether or not the PVD EXTI Interrupt flag is set. 538 * @retval EXTI PVD Line Status. 539 */ 540 #define __HAL_PWR_PVD_EXTI_GET_FLAG() ((EXTI->RPR1 | EXTI->FPR1) & PWR_EXTI_LINE_PVD) 541 542 /** 543 * @brief Clear the PVD EXTI Interrupt flag. 544 * @retval None. 545 */ 546 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() \ 547 do \ 548 { \ 549 WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD); \ 550 WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD); \ 551 } while(0) 552 /** 553 * @} 554 */ 555 556 /* Private constants ---------------------------------------------------------*/ 557 558 /** @addtogroup PWR_Private_Constants PWR Private Constants 559 * @{ 560 */ 561 /* Define PVD extended interrupts and event line */ 562 #define PWR_EXTI_LINE_PVD (0x00010000UL) /*!< PVD EXTI Line */ 563 564 /* Defines wake up lines shift */ 565 #define PWR_WUP_POLARITY_SHIFT (0x08U) /*!< Internal constant used to retrieve wakeup signal polarity */ 566 #define PWR_WUP_SELECT_SIGNAL_SHIFT (0x10U) /*!< Internal constant used to retrieve wakeup signal selection */ 567 568 /* Defines wake up lines mask */ 569 #define PWR_EWUP_MASK (0x000000FFUL) /*!< Internal constant used to retrieve wakeup signal enable */ 570 #define PWR_WUP_POLARITY_MASK (0x0000FF00UL) /*!< Internal constant used to retrieve wakeup signal polarity */ 571 #define PWR_WUP_SELECT_MASK (0xFFFF0000UL) /*!< Internal constant used to retrieve wakeup signal selection */ 572 573 /* Defines wake up lines selection */ 574 #define PWR_WAKEUP1_SOURCE_SELECTION_0 (0U) 575 #define PWR_WAKEUP1_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL1_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 576 #define PWR_WAKEUP1_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL1_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 577 #define PWR_WAKEUP2_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 578 #define PWR_WAKEUP2_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL2_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 579 #define PWR_WAKEUP2_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL2_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 580 #define PWR_WAKEUP3_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 581 #define PWR_WAKEUP3_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL3_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 582 #define PWR_WAKEUP3_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL3_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 583 #define PWR_WAKEUP4_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 584 #define PWR_WAKEUP4_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL4_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 585 #define PWR_WAKEUP4_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL4_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 586 #define PWR_WAKEUP5_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 587 #define PWR_WAKEUP5_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL5_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 588 #define PWR_WAKEUP5_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL5_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 589 #define PWR_WAKEUP6_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 590 #define PWR_WAKEUP6_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL6_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 591 #define PWR_WAKEUP6_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL6_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 592 #define PWR_WAKEUP6_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL6_0 | PWR_WUCR3_WUSEL6_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 593 #define PWR_WAKEUP7_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 594 #define PWR_WAKEUP7_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL7_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 595 #define PWR_WAKEUP7_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL7_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 596 #define PWR_WAKEUP7_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL7_0 | PWR_WUCR3_WUSEL7_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 597 #define PWR_WAKEUP8_SOURCE_SELECTION_0 (0U) /*!< Internal constant used to retrieve wakeup signal selection */ 598 #define PWR_WAKEUP8_SOURCE_SELECTION_1 (PWR_WUCR3_WUSEL8_0 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 599 #define PWR_WAKEUP8_SOURCE_SELECTION_2 (PWR_WUCR3_WUSEL8_1 << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 600 #define PWR_WAKEUP8_SOURCE_SELECTION_3 ((PWR_WUCR3_WUSEL8_0 | PWR_WUCR3_WUSEL8_1) << PWR_WUP_SELECT_SIGNAL_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 601 602 /* Defines wake up lines low polarity */ 603 #define PWR_WAKEUP1_POLARITY_LOW (PWR_WUCR2_WUPP1 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 604 #define PWR_WAKEUP2_POLARITY_LOW (PWR_WUCR2_WUPP2 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 605 #define PWR_WAKEUP3_POLARITY_LOW (PWR_WUCR2_WUPP3 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 606 #define PWR_WAKEUP4_POLARITY_LOW (PWR_WUCR2_WUPP4 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 607 #define PWR_WAKEUP5_POLARITY_LOW (PWR_WUCR2_WUPP5 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 608 #define PWR_WAKEUP6_POLARITY_LOW (PWR_WUCR2_WUPP6 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 609 #define PWR_WAKEUP7_POLARITY_LOW (PWR_WUCR2_WUPP7 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 610 #define PWR_WAKEUP8_POLARITY_LOW (PWR_WUCR2_WUPP8 << PWR_WUP_POLARITY_SHIFT) /*!< Internal constant used to retrieve wakeup signal selection */ 611 612 /* Defines attribute */ 613 #define PWR_ITEM_ATTR_NSEC_PRIV_MASK (0x10U) /*!< NSecure Privilege / NPrivilege attribute item mask */ 614 #define PWR_ITEM_ATTR_SEC_PRIV_MASK (0x20U) /*!< Secure Privilege / NPrivilege attribute item mask */ 615 /** 616 * @} 617 */ 618 619 /* Private macros ------------------------------------------------------------*/ 620 621 /** @addtogroup PWR_Private_Macros PWR Private Macros 622 * @{ 623 */ 624 /* Wake up pins check macro */ 625 #define IS_PWR_WAKEUP_PIN(PIN) \ 626 (((PIN) == PWR_WAKEUP_PIN1_HIGH_0) ||\ 627 ((PIN) == PWR_WAKEUP_PIN1_HIGH_1) ||\ 628 ((PIN) == PWR_WAKEUP_PIN1_HIGH_2) ||\ 629 ((PIN) == PWR_WAKEUP_PIN2_HIGH_0) ||\ 630 ((PIN) == PWR_WAKEUP_PIN2_HIGH_1) ||\ 631 ((PIN) == PWR_WAKEUP_PIN2_HIGH_2) ||\ 632 ((PIN) == PWR_WAKEUP_PIN3_HIGH_0) ||\ 633 ((PIN) == PWR_WAKEUP_PIN3_HIGH_1) ||\ 634 ((PIN) == PWR_WAKEUP_PIN3_HIGH_2) ||\ 635 ((PIN) == PWR_WAKEUP_PIN4_HIGH_0) ||\ 636 ((PIN) == PWR_WAKEUP_PIN4_HIGH_1) ||\ 637 ((PIN) == PWR_WAKEUP_PIN4_HIGH_2) ||\ 638 ((PIN) == PWR_WAKEUP_PIN5_HIGH_0) ||\ 639 ((PIN) == PWR_WAKEUP_PIN5_HIGH_1) ||\ 640 ((PIN) == PWR_WAKEUP_PIN5_HIGH_2) ||\ 641 ((PIN) == PWR_WAKEUP_PIN6_HIGH_0) ||\ 642 ((PIN) == PWR_WAKEUP_PIN6_HIGH_1) ||\ 643 ((PIN) == PWR_WAKEUP_PIN6_HIGH_2) ||\ 644 ((PIN) == PWR_WAKEUP_PIN6_HIGH_3) ||\ 645 ((PIN) == PWR_WAKEUP_PIN7_HIGH_0) ||\ 646 ((PIN) == PWR_WAKEUP_PIN7_HIGH_1) ||\ 647 ((PIN) == PWR_WAKEUP_PIN7_HIGH_2) ||\ 648 ((PIN) == PWR_WAKEUP_PIN7_HIGH_3) ||\ 649 ((PIN) == PWR_WAKEUP_PIN8_HIGH_0) ||\ 650 ((PIN) == PWR_WAKEUP_PIN8_HIGH_1) ||\ 651 ((PIN) == PWR_WAKEUP_PIN8_HIGH_2) ||\ 652 ((PIN) == PWR_WAKEUP_PIN8_HIGH_3) ||\ 653 ((PIN) == PWR_WAKEUP_PIN1_LOW_0) ||\ 654 ((PIN) == PWR_WAKEUP_PIN1_LOW_1) ||\ 655 ((PIN) == PWR_WAKEUP_PIN1_LOW_2) ||\ 656 ((PIN) == PWR_WAKEUP_PIN2_LOW_0) ||\ 657 ((PIN) == PWR_WAKEUP_PIN2_LOW_1) ||\ 658 ((PIN) == PWR_WAKEUP_PIN2_LOW_2) ||\ 659 ((PIN) == PWR_WAKEUP_PIN3_LOW_0) ||\ 660 ((PIN) == PWR_WAKEUP_PIN3_LOW_1) ||\ 661 ((PIN) == PWR_WAKEUP_PIN3_LOW_2) ||\ 662 ((PIN) == PWR_WAKEUP_PIN4_LOW_0) ||\ 663 ((PIN) == PWR_WAKEUP_PIN4_LOW_1) ||\ 664 ((PIN) == PWR_WAKEUP_PIN4_LOW_2) ||\ 665 ((PIN) == PWR_WAKEUP_PIN5_LOW_0) ||\ 666 ((PIN) == PWR_WAKEUP_PIN5_LOW_1) ||\ 667 ((PIN) == PWR_WAKEUP_PIN5_LOW_2) ||\ 668 ((PIN) == PWR_WAKEUP_PIN6_LOW_0) ||\ 669 ((PIN) == PWR_WAKEUP_PIN6_LOW_1) ||\ 670 ((PIN) == PWR_WAKEUP_PIN6_LOW_2) ||\ 671 ((PIN) == PWR_WAKEUP_PIN6_LOW_3) ||\ 672 ((PIN) == PWR_WAKEUP_PIN7_LOW_0) ||\ 673 ((PIN) == PWR_WAKEUP_PIN7_LOW_1) ||\ 674 ((PIN) == PWR_WAKEUP_PIN7_LOW_2) ||\ 675 ((PIN) == PWR_WAKEUP_PIN7_LOW_3) ||\ 676 ((PIN) == PWR_WAKEUP_PIN8_LOW_0) ||\ 677 ((PIN) == PWR_WAKEUP_PIN8_LOW_1) ||\ 678 ((PIN) == PWR_WAKEUP_PIN8_LOW_2) ||\ 679 ((PIN) == PWR_WAKEUP_PIN8_LOW_3) ||\ 680 ((PIN) == PWR_WAKEUP_PIN1) ||\ 681 ((PIN) == PWR_WAKEUP_PIN2) ||\ 682 ((PIN) == PWR_WAKEUP_PIN3) ||\ 683 ((PIN) == PWR_WAKEUP_PIN4) ||\ 684 ((PIN) == PWR_WAKEUP_PIN5) ||\ 685 ((PIN) == PWR_WAKEUP_PIN6) ||\ 686 ((PIN) == PWR_WAKEUP_PIN7) ||\ 687 ((PIN) == PWR_WAKEUP_PIN8)) 688 689 /* PVD level check macro */ 690 #define IS_PWR_PVD_LEVEL(LEVEL) \ 691 (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1) ||\ 692 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3) ||\ 693 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5) ||\ 694 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 695 696 /* PVD mode check macro */ 697 #define IS_PWR_PVD_MODE(MODE) \ 698 (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 699 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 700 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 701 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 702 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 703 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 704 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 705 706 /* Sleep mode entry check macro */ 707 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) ||\ 708 ((ENTRY) == PWR_SLEEPENTRY_WFE) ||\ 709 ((ENTRY) == PWR_SLEEPENTRY_WFE_NO_EVT_CLEAR)) 710 711 /* Stop mode entry check macro */ 712 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) ||\ 713 ((ENTRY) == PWR_STOPENTRY_WFE) ||\ 714 ((ENTRY) == PWR_STOPENTRY_WFE_NO_EVT_CLEAR)) 715 716 /* PWR items check macro */ 717 #define IS_PWR_ITEMS_ATTRIBUTES(ITEM) \ 718 ((((ITEM) & (~PWR_ALL)) == 0U) && ((ITEM) != 0U)) 719 720 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 721 /* PWR attribute check macro (Secure) */ 722 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) \ 723 ((((~(((ATTRIBUTES) & 0xF0U) >> 4U)) & ((ATTRIBUTES) & 0x0FU)) == 0U) && (((ATTRIBUTES) & 0xFFFFFFCCU) == 0U)) 724 #else 725 /* PWR attribute check macro (NSecure) */ 726 #define IS_PWR_ATTRIBUTES(ATTRIBUTES) \ 727 (((ATTRIBUTES) == PWR_NSEC_NPRIV) || ((ATTRIBUTES) == PWR_NSEC_PRIV)) 728 #endif /* __ARM_FEATURE_CMSE */ 729 /** 730 * @} 731 */ 732 733 /* Include PWR HAL Extended module */ 734 #include "stm32u5xx_hal_pwr_ex.h" 735 736 /* Exported functions --------------------------------------------------------*/ 737 738 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 739 * @{ 740 */ 741 742 /** @addtogroup PWR_Exported_Functions_Group1 743 * @{ 744 */ 745 /* Initialization and de-initialization functions *****************************/ 746 void HAL_PWR_DeInit(void); 747 void HAL_PWR_EnableBkUpAccess(void); 748 void HAL_PWR_DisableBkUpAccess(void); 749 /** 750 * @} 751 */ 752 753 /** @addtogroup PWR_Exported_Functions_Group2 754 * @{ 755 */ 756 /* Programmable voltage detector functions ************************************/ 757 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *pConfigPVD); 758 void HAL_PWR_EnablePVD(void); 759 void HAL_PWR_DisablePVD(void); 760 761 /* Wake up pins configuration functions ***************************************/ 762 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPin); 763 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPin); 764 765 /* Low power modes configuration functions ************************************/ 766 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SleepEntry); 767 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t StopEntry); 768 void HAL_PWR_EnterSTANDBYMode(void); 769 770 /* Sleep on exit and sev on pending configuration functions *******************/ 771 void HAL_PWR_EnableSleepOnExit(void); 772 void HAL_PWR_DisableSleepOnExit(void); 773 void HAL_PWR_EnableSEVOnPend(void); 774 void HAL_PWR_DisableSEVOnPend(void); 775 776 /* Interrupt handler functions ************************************************/ 777 void HAL_PWR_PVD_IRQHandler(void); 778 void HAL_PWR_PVDCallback(void); 779 /** 780 * @} 781 */ 782 783 /** @addtogroup PWR_Exported_Functions_Group3 784 * @{ 785 */ 786 /* Privileges and security configuration functions ****************************/ 787 void HAL_PWR_ConfigAttributes(uint32_t Item, uint32_t Attributes); 788 HAL_StatusTypeDef HAL_PWR_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes); 789 /** 790 * @} 791 */ 792 793 /** 794 * @} 795 */ 796 797 /** 798 * @} 799 */ 800 801 /** 802 * @} 803 */ 804 805 /** 806 * @} 807 */ 808 809 #ifdef __cplusplus 810 } 811 #endif /* __cplusplus */ 812 813 #endif /* STM32U5xx_HAL_PWR_H */ 814
