1 /**
2   ******************************************************************************
3   * @file    stm32u5xx_hal_pcd.h
4   * @author  MCD Application Team
5   * @brief   Header file of PCD HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2021 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32U5xx_HAL_PCD_H
21 #define STM32U5xx_HAL_PCD_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32u5xx_ll_usb.h"
29 
30 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS)
31 
32 /** @addtogroup STM32U5xx_HAL_Driver
33   * @{
34   */
35 
36 /** @addtogroup PCD
37   * @{
38   */
39 
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup PCD_Exported_Types PCD Exported Types
42   * @{
43   */
44 
45 /**
46   * @brief  PCD State structure definition
47   */
48 typedef enum
49 {
50   HAL_PCD_STATE_RESET   = 0x00,
51   HAL_PCD_STATE_READY   = 0x01,
52   HAL_PCD_STATE_ERROR   = 0x02,
53   HAL_PCD_STATE_BUSY    = 0x03,
54   HAL_PCD_STATE_TIMEOUT = 0x04
55 } PCD_StateTypeDef;
56 
57 /* Device LPM suspend state */
58 typedef enum
59 {
60   LPM_L0 = 0x00, /* on */
61   LPM_L1 = 0x01, /* LPM L1 sleep */
62   LPM_L2 = 0x02, /* suspend */
63   LPM_L3 = 0x03, /* off */
64 } PCD_LPM_StateTypeDef;
65 
66 typedef enum
67 {
68   PCD_LPM_L0_ACTIVE = 0x00, /* on */
69   PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
70 } PCD_LPM_MsgTypeDef;
71 
72 typedef enum
73 {
74   PCD_BCD_ERROR                     = 0xFF,
75   PCD_BCD_CONTACT_DETECTION         = 0xFE,
76   PCD_BCD_STD_DOWNSTREAM_PORT       = 0xFD,
77   PCD_BCD_CHARGING_DOWNSTREAM_PORT  = 0xFC,
78   PCD_BCD_DEDICATED_CHARGING_PORT   = 0xFB,
79   PCD_BCD_DISCOVERY_COMPLETED       = 0x00,
80 
81 } PCD_BCD_MsgTypeDef;
82 
83 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
84 typedef USB_OTG_GlobalTypeDef  PCD_TypeDef;
85 typedef USB_OTG_CfgTypeDef     PCD_InitTypeDef;
86 typedef USB_OTG_EPTypeDef      PCD_EPTypeDef;
87 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
88 #if defined (USB_DRD_FS)
89 typedef USB_DRD_TypeDef        PCD_TypeDef;
90 typedef USB_DRD_CfgTypeDef     PCD_InitTypeDef;
91 typedef USB_DRD_EPTypeDef      PCD_EPTypeDef;
92 #endif /* defined (USB_DRD_FS) */
93 
94 /**
95   * @brief  PCD Handle Structure definition
96   */
97 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
98 typedef struct __PCD_HandleTypeDef
99 #else
100 typedef struct
101 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
102 {
103   PCD_TypeDef             *Instance;   /*!< Register base address             */
104   PCD_InitTypeDef         Init;        /*!< PCD required parameters           */
105   __IO uint8_t            USB_Address; /*!< USB Address                       */
106 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
107   PCD_EPTypeDef           IN_ep[16];   /*!< IN endpoint parameters            */
108   PCD_EPTypeDef           OUT_ep[16];  /*!< OUT endpoint parameters           */
109 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
110 #if defined (USB_DRD_FS)
111   PCD_EPTypeDef           IN_ep[8];    /*!< IN endpoint parameters            */
112   PCD_EPTypeDef           OUT_ep[8];   /*!< OUT endpoint parameters           */
113 #endif /* defined (USB_DRD_FS) */
114   HAL_LockTypeDef         Lock;        /*!< PCD peripheral status             */
115   __IO PCD_StateTypeDef   State;       /*!< PCD communication state           */
116   __IO  uint32_t          ErrorCode;   /*!< PCD Error code                    */
117   uint32_t                Setup[12];   /*!< Setup packet buffer               */
118   PCD_LPM_StateTypeDef    LPM_State;   /*!< LPM State                         */
119   uint32_t                BESL;
120   uint32_t                FrameNumber; /*!< Store Current Frame number        */
121 
122 
123   uint32_t lpm_active;                 /*!< Enable or disable the Link Power Management .
124                                        This parameter can be set to ENABLE or DISABLE        */
125 
126   uint32_t battery_charging_active;    /*!< Enable or disable Battery charging.
127                                        This parameter can be set to ENABLE or DISABLE        */
128   void                    *pData;      /*!< Pointer to upper stack Handler */
129 
130 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
131   void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd);                              /*!< USB OTG PCD SOF callback                */
132   void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Setup Stage callback        */
133   void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd);                            /*!< USB OTG PCD Reset callback              */
134   void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Suspend callback            */
135   void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd);                           /*!< USB OTG PCD Resume callback             */
136   void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Connect callback            */
137   void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd);                       /*!< USB OTG PCD Disconnect callback         */
138 
139   void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);      /*!< USB OTG PCD Data OUT Stage callback     */
140   void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);       /*!< USB OTG PCD Data IN Stage callback      */
141   void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);  /*!< USB OTG PCD ISO OUT Incomplete callback */
142   void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum);   /*!< USB OTG PCD ISO IN Incomplete callback  */
143   void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);      /*!< USB OTG PCD BCD callback                */
144   void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);      /*!< USB OTG PCD LPM callback                */
145 
146   void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd);                          /*!< USB OTG PCD Msp Init callback           */
147   void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd);                        /*!< USB OTG PCD Msp DeInit callback         */
148 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
149 } PCD_HandleTypeDef;
150 
151 /**
152   * @}
153   */
154 
155 /* Include PCD HAL Extended module */
156 #include "stm32u5xx_hal_pcd_ex.h"
157 
158 /* Exported constants --------------------------------------------------------*/
159 /** @defgroup PCD_Exported_Constants PCD Exported Constants
160   * @{
161   */
162 
163 /** @defgroup PCD_Speed PCD Speed
164   * @{
165   */
166 #define PCD_SPEED_HIGH               USBD_HS_SPEED
167 #define PCD_SPEED_HIGH_IN_FULL       USBD_HSINFS_SPEED
168 #define PCD_SPEED_FULL               USBD_FS_SPEED
169 /**
170   * @}
171   */
172 
173 /** @defgroup PCD_PHY_Module PCD PHY Module
174   * @{
175   */
176 #define PCD_PHY_ULPI                 1U
177 #define PCD_PHY_EMBEDDED             2U
178 #define PCD_PHY_UTMI                 3U
179 /**
180   * @}
181   */
182 
183 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
184   * @brief  PCD Error Code definition
185   * @{
186   */
187 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
188 #define  HAL_PCD_ERROR_INVALID_CALLBACK                        (0x00000010U)    /*!< Invalid Callback error  */
189 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
190 
191 /**
192   * @}
193   */
194 
195 /**
196   * @}
197   */
198 
199 /* Exported macros -----------------------------------------------------------*/
200 /** @defgroup PCD_Exported_Macros PCD Exported Macros
201   *  @brief macros to handle interrupts and specific clock configurations
202   * @{
203   */
204 #define __HAL_PCD_ENABLE(__HANDLE__)                       (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
205 #define __HAL_PCD_DISABLE(__HANDLE__)                      (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
206 
207 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) \
208   ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
209 
210 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
211 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__))
212 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__)         (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
213 
214 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) \
215   *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= ~(USB_OTG_PCGCCTL_STOPCLK)
216 
217 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) \
218   *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
219 
220 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) \
221   ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U)
222 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
223 
224 #if defined (USB_DRD_FS)
225 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)           (((__HANDLE__)->Instance->ISTR)\
226                                                                    &= (uint16_t)(~(__INTERRUPT__)))
227 #endif /* defined (USB_DRD_FS) */
228 
229 /**
230   * @}
231   */
232 
233 /* Exported functions --------------------------------------------------------*/
234 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
235   * @{
236   */
237 
238 /* Initialization/de-initialization functions  ********************************/
239 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
240   * @{
241   */
242 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
243 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
244 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
245 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
246 
247 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
248 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
249   * @brief  HAL USB OTG PCD Callback ID enumeration definition
250   * @{
251   */
252 typedef enum
253 {
254   HAL_PCD_SOF_CB_ID          = 0x01,      /*!< USB PCD SOF callback ID          */
255   HAL_PCD_SETUPSTAGE_CB_ID   = 0x02,      /*!< USB PCD Setup Stage callback ID  */
256   HAL_PCD_RESET_CB_ID        = 0x03,      /*!< USB PCD Reset callback ID        */
257   HAL_PCD_SUSPEND_CB_ID      = 0x04,      /*!< USB PCD Suspend callback ID      */
258   HAL_PCD_RESUME_CB_ID       = 0x05,      /*!< USB PCD Resume callback ID       */
259   HAL_PCD_CONNECT_CB_ID      = 0x06,      /*!< USB PCD Connect callback ID      */
260   HAL_PCD_DISCONNECT_CB_ID   = 0x07,      /*!< USB PCD Disconnect callback ID   */
261 
262   HAL_PCD_MSPINIT_CB_ID      = 0x08,      /*!< USB PCD MspInit callback ID      */
263   HAL_PCD_MSPDEINIT_CB_ID    = 0x09       /*!< USB PCD MspDeInit callback ID    */
264 
265 } HAL_PCD_CallbackIDTypeDef;
266 /**
267   * @}
268   */
269 
270 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
271   * @brief  HAL USB OTG PCD Callback pointer definition
272   * @{
273   */
274 
275 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd);                                   /*!< pointer to a common USB OTG PCD callback function  */
276 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD Data OUT Stage callback     */
277 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD Data IN Stage callback      */
278 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);        /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
279 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum);         /*!< pointer to USB OTG PCD ISO IN Incomplete callback  */
280 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);        /*!< pointer to USB OTG PCD LPM callback                */
281 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);        /*!< pointer to USB OTG PCD BCD callback                */
282 
283 /**
284   * @}
285   */
286 
287 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID,
288                                            pPCD_CallbackTypeDef pCallback);
289 
290 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
291 
292 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd,
293                                                        pPCD_DataOutStageCallbackTypeDef pCallback);
294 
295 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
296 
297 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd,
298                                                       pPCD_DataInStageCallbackTypeDef pCallback);
299 
300 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
301 
302 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd,
303                                                        pPCD_IsoOutIncpltCallbackTypeDef pCallback);
304 
305 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
306 
307 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd,
308                                                       pPCD_IsoInIncpltCallbackTypeDef pCallback);
309 
310 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
311 
312 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
313 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
314 
315 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
316 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
317 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
318 /**
319   * @}
320   */
321 
322 /* I/O operation functions  ***************************************************/
323 /* Non-Blocking mode: Interrupt */
324 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
325   * @{
326   */
327 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
328 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
329 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
330 
331 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
332 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
333 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
334 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
335 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
336 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
337 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
338 
339 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
340 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
341 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
342 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
343 /**
344   * @}
345   */
346 
347 /* Peripheral Control functions  **********************************************/
348 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
349   * @{
350   */
351 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
352 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
353 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
354 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
355 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
356 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
357 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
358 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
359 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
360 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
361 HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
362 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
363 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
364 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
365 HAL_StatusTypeDef HAL_PCD_SetTestMode(const PCD_HandleTypeDef *hpcd, uint8_t testmode);
366 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
367 
368 uint32_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr);
369 /**
370   * @}
371   */
372 
373 /* Peripheral State functions  ************************************************/
374 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
375   * @{
376   */
377 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef const *hpcd);
378 /**
379   * @}
380   */
381 
382 /**
383   * @}
384   */
385 
386 /* Private constants ---------------------------------------------------------*/
387 /** @defgroup PCD_Private_Constants PCD Private Constants
388   * @{
389   */
390 #if defined (USB_DRD_FS)
391 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
392   * @{
393   */
394 #define PCD_EP0MPS_64                                                 EP_MPS_64
395 #define PCD_EP0MPS_32                                                 EP_MPS_32
396 #define PCD_EP0MPS_16                                                 EP_MPS_16
397 #define PCD_EP0MPS_08                                                 EP_MPS_8
398 /**
399   * @}
400   */
401 
402 /** @defgroup PCD_ENDP PCD ENDP
403   * @{
404   */
405 #define PCD_ENDP0                                                     0U
406 #define PCD_ENDP1                                                     1U
407 #define PCD_ENDP2                                                     2U
408 #define PCD_ENDP3                                                     3U
409 #define PCD_ENDP4                                                     4U
410 #define PCD_ENDP5                                                     5U
411 #define PCD_ENDP6                                                     6U
412 #define PCD_ENDP7                                                     7U
413 /**
414   * @}
415   */
416 
417 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
418   * @{
419   */
420 #define PCD_SNG_BUF                                                   0U
421 #define PCD_DBL_BUF                                                   1U
422 /**
423   * @}
424   */
425 #endif /* defined (USB_DRD_FS) */
426 /**
427   * @}
428   */
429 
430 #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
431 #ifndef USB_OTG_DOEPINT_OTEPSPR
432 #define USB_OTG_DOEPINT_OTEPSPR                (0x1UL << 5)      /*!< Status Phase Received interrupt */
433 #endif /* defined USB_OTG_DOEPINT_OTEPSPR */
434 
435 #ifndef USB_OTG_DOEPMSK_OTEPSPRM
436 #define USB_OTG_DOEPMSK_OTEPSPRM               (0x1UL << 5)      /*!< Setup Packet Received interrupt mask */
437 #endif /* defined USB_OTG_DOEPMSK_OTEPSPRM */
438 
439 #ifndef USB_OTG_DOEPINT_NAK
440 #define USB_OTG_DOEPINT_NAK                    (0x1UL << 13)      /*!< NAK interrupt */
441 #endif /* defined USB_OTG_DOEPINT_NAK */
442 
443 #ifndef USB_OTG_DOEPMSK_NAKM
444 #define USB_OTG_DOEPMSK_NAKM                   (0x1UL << 13)      /*!< OUT Packet NAK interrupt mask */
445 #endif /* defined USB_OTG_DOEPMSK_NAKM */
446 
447 #ifndef USB_OTG_DOEPINT_STPKTRX
448 #define USB_OTG_DOEPINT_STPKTRX                (0x1UL << 15)      /*!< Setup Packet Received interrupt */
449 #endif /* defined USB_OTG_DOEPINT_STPKTRX */
450 
451 #ifndef USB_OTG_DOEPMSK_NYETM
452 #define USB_OTG_DOEPMSK_NYETM                  (0x1UL << 14)      /*!< Setup Packet Received interrupt mask */
453 #endif /* defined USB_OTG_DOEPMSK_NYETM */
454 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
455 
456 /* Private macros ------------------------------------------------------------*/
457 /** @defgroup PCD_Private_Macros PCD Private Macros
458   * @{
459   */
460 #if defined (USB_DRD_FS)
461 /* PMA RX counter */
462 #ifndef PCD_RX_PMA_CNT
463 #define PCD_RX_PMA_CNT                                               10U
464 #endif /* PCD_RX_PMA_CNT */
465 
466 /* SetENDPOINT */
467 #define PCD_SET_ENDPOINT                       USB_DRD_SET_CHEP
468 
469 /* GetENDPOINT Register value*/
470 #define PCD_GET_ENDPOINT                       USB_DRD_GET_CHEP
471 
472 
473 /**
474   * @brief free buffer used from the application realizing it to the line
475   *         toggles bit SW_BUF in the double buffered endpoint register
476   * @param USBx USB device.
477   * @param   bEpNum, bDir
478   * @retval None
479   */
480 #define PCD_FREE_USER_BUFFER                   USB_DRD_FREE_USER_BUFFER
481 
482 /**
483   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
484   * @param  USBx USB peripheral instance register address.
485   * @param  bEpNum Endpoint Number.
486   * @param  wState new state
487   * @retval None
488   */
489 #define PCD_SET_EP_TX_STATUS                   USB_DRD_SET_CHEP_TX_STATUS
490 
491 /**
492   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
493   * @param  USBx USB peripheral instance register address.
494   * @param  bEpNum Endpoint Number.
495   * @param  wState new state
496   * @retval None
497   */
498 #define PCD_SET_EP_RX_STATUS                   USB_DRD_SET_CHEP_RX_STATUS
499 
500 /**
501   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
502   * @param  USBx USB peripheral instance register address.
503   * @param  bEpNum Endpoint Number.
504   * @retval None
505   */
506 #define PCD_SET_EP_KIND                        USB_DRD_SET_CHEP_KIND
507 #define PCD_CLEAR_EP_KIND                      USB_DRD_CLEAR_CHEP_KIND
508 #define PCD_SET_BULK_EP_DBUF                   PCD_SET_EP_KIND
509 #define PCD_CLEAR_BULK_EP_DBUF                 PCD_CLEAR_EP_KIND
510 
511 /**
512   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
513   * @param  USBx USB peripheral instance register address.
514   * @param  bEpNum Endpoint Number.
515   * @retval None
516   */
517 #define PCD_SET_OUT_STATUS                     USB_DRD_SET_CHEP_KIND
518 #define PCD_CLEAR_OUT_STATUS                   USB_DRD_CLEAR_CHEP_KIND
519 
520 /**
521   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
522   * @param  USBx USB peripheral instance register address.
523   * @param  bEpNum Endpoint Number.
524   * @retval None
525   */
526 #define PCD_CLEAR_RX_EP_CTR                    USB_DRD_CLEAR_RX_CHEP_CTR
527 #define PCD_CLEAR_TX_EP_CTR                    USB_DRD_CLEAR_TX_CHEP_CTR
528 /**
529   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
530   * @param  USBx USB peripheral instance register address.
531   * @param  bEpNum Endpoint Number.
532   * @retval None
533   */
534 #define PCD_RX_DTOG                            USB_DRD_RX_DTOG
535 #define PCD_TX_DTOG                            USB_DRD_TX_DTOG
536 /**
537   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
538   * @param  USBx USB peripheral instance register address.
539   * @param  bEpNum Endpoint Number.
540   * @retval None
541   */
542 #define PCD_CLEAR_RX_DTOG                      USB_DRD_CLEAR_RX_DTOG
543 #define PCD_CLEAR_TX_DTOG                      USB_DRD_CLEAR_TX_DTOG
544 
545 /**
546   * @brief  Sets address in an endpoint register.
547   * @param  USBx USB peripheral instance register address.
548   * @param  bEpNum Endpoint Number.
549   * @param  bAddr Address.
550   * @retval None
551   */
552 #define PCD_SET_EP_ADDRESS                     USB_DRD_SET_CHEP_ADDRESS
553 
554 /**
555   * @brief  sets address of the tx/rx buffer.
556   * @param  USBx USB peripheral instance register address.
557   * @param  bEpNum Endpoint Number.
558   * @param  wAddr address to be set (must be word aligned).
559   * @retval None
560   */
561 #define PCD_SET_EP_TX_ADDRESS                  USB_DRD_SET_CHEP_TX_ADDRESS
562 #define PCD_SET_EP_RX_ADDRESS                  USB_DRD_SET_CHEP_RX_ADDRESS
563 
564 /**
565   * @brief  sets counter for the tx/rx buffer.
566   * @param  USBx USB peripheral instance register address.
567   * @param  bEpNum Endpoint Number.
568   * @param  wCount Counter value.
569   * @retval None
570   */
571 #define PCD_SET_EP_TX_CNT                      USB_DRD_SET_CHEP_TX_CNT
572 #define PCD_SET_EP_RX_CNT                      USB_DRD_SET_CHEP_RX_CNT
573 
574 /**
575   * @brief  gets counter of the tx buffer.
576   * @param  USBx USB peripheral instance register address.
577   * @param  bEpNum Endpoint Number.
578   * @retval Counter value
579   */
580 #define PCD_GET_EP_TX_CNT                      USB_DRD_GET_CHEP_TX_CNT
581 
582 /**
583   * @brief  gets counter of the rx buffer.
584   * @param  Instance USB peripheral instance register address.
585   * @param  bEpNum channel Number.
586   * @retval Counter value
587   */
PCD_GET_EP_RX_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)588 __STATIC_INLINE uint16_t PCD_GET_EP_RX_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
589 {
590   UNUSED(Instance);
591   __IO uint32_t count = PCD_RX_PMA_CNT;
592 
593   /* WA: few cycles for RX PMA descriptor to update */
594   while (count > 0U)
595   {
596     count--;
597   }
598 
599   return (uint16_t)USB_DRD_GET_CHEP_RX_CNT((Instance), (bEpNum));
600 }
601 
602 /**
603   * @brief  Sets addresses in a double buffer endpoint.
604   * @param  USBx USB peripheral instance register address.
605   * @param  bEpNum Endpoint Number.
606   * @param  wBuf0Addr: buffer 0 address.
607   * @param  wBuf1Addr = buffer 1 address.
608   * @retval None
609   */
610 #define PCD_SET_EP_DBUF_ADDR                   USB_DRD_SET_CHEP_DBUF_ADDR
611 
612 /**
613   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
614   * @param  USBx USB peripheral instance register address.
615   * @param  bEpNum Endpoint Number.
616   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
617   *         EP_DBUF_IN  = IN
618   * @param  wCount: Counter value
619   * @retval None
620   */
621 #define PCD_SET_EP_DBUF0_CNT                   USB_DRD_SET_CHEP_DBUF0_CNT
622 #define PCD_SET_EP_DBUF1_CNT                   USB_DRD_SET_CHEP_DBUF1_CNT
623 #define PCD_SET_EP_DBUF_CNT                    USB_DRD_SET_CHEP_DBUF_CNT
624 
625 /**
626   * @brief  gets counter of the rx buffer0.
627   * @param  Instance USB peripheral instance register address.
628   * @param  bEpNum channel Number.
629   * @retval Counter value
630   */
PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)631 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF0_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
632 {
633   UNUSED(Instance);
634   __IO uint32_t count = PCD_RX_PMA_CNT;
635 
636   /* WA: few cycles for RX PMA descriptor to update */
637   while (count > 0U)
638   {
639     count--;
640   }
641 
642   return (uint16_t)USB_DRD_GET_CHEP_DBUF0_CNT((Instance), (bEpNum));
643 }
644 
645 /**
646   * @brief  gets counter of the rx buffer1.
647   * @param  Instance USB peripheral instance register address.
648   * @param  bEpNum channel Number.
649   * @retval Counter value
650   */
PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef * Instance,uint16_t bEpNum)651 __STATIC_INLINE uint16_t PCD_GET_EP_DBUF1_CNT(const PCD_TypeDef *Instance, uint16_t bEpNum)
652 {
653   UNUSED(Instance);
654   __IO uint32_t count = PCD_RX_PMA_CNT;
655 
656   /* WA: few cycles for RX PMA descriptor to update */
657   while (count > 0U)
658   {
659     count--;
660   }
661 
662   return (uint16_t)USB_DRD_GET_CHEP_DBUF1_CNT((Instance), (bEpNum));
663 }
664 #endif /* defined (USB_DRD_FS) */
665 
666 /**
667   * @}
668   */
669 
670 /**
671   * @}
672   */
673 
674 /**
675   * @}
676   */
677 #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) || defined (USB_DRD_FS) */
678 
679 #ifdef __cplusplus
680 }
681 #endif
682 
683 #endif /* STM32U5xx_HAL_PCD_H */
684