1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_mmc.h 4 * @author MCD Application Team 5 * @brief Header file of MMC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_MMC_H 21 #define STM32U5xx_HAL_MMC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_ll_sdmmc.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup MMC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup MMC_Exported_Types MMC Exported Types 40 * @{ 41 */ 42 43 /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure 44 * @{ 45 */ 46 typedef enum 47 { 48 HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ 49 HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ 50 HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ 51 HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ 52 HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ 53 HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ 54 HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfer State */ 55 HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ 56 } HAL_MMC_StateTypeDef; 57 /** 58 * @} 59 */ 60 61 /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure 62 * @{ 63 */ 64 typedef uint32_t HAL_MMC_CardStateTypeDef; 65 66 #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ 67 #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ 68 #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ 69 #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ 70 #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ 71 #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ 72 #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ 73 #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ 74 #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ 75 /** 76 * @} 77 */ 78 79 /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition 80 * @{ 81 */ 82 #define MMC_InitTypeDef SDMMC_InitTypeDef 83 #define MMC_TypeDef SDMMC_TypeDef 84 85 /** 86 * @brief MMC Card Information Structure definition 87 */ 88 typedef struct 89 { 90 uint32_t CardType; /*!< Specifies the card Type */ 91 92 uint32_t Class; /*!< Specifies the class of the card class */ 93 94 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 95 96 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 97 98 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 99 100 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 101 102 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 103 104 } HAL_MMC_CardInfoTypeDef; 105 106 /** 107 * @brief MMC handle Structure definition 108 */ 109 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 110 typedef struct __MMC_HandleTypeDef 111 #else 112 typedef struct 113 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 114 { 115 MMC_TypeDef *Instance; /*!< MMC registers base address */ 116 117 MMC_InitTypeDef Init; /*!< MMC required parameters */ 118 119 HAL_LockTypeDef Lock; /*!< MMC locking object */ 120 121 uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ 122 123 uint32_t TxXferSize; /*!< MMC Tx Transfer size */ 124 125 uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ 126 127 uint32_t RxXferSize; /*!< MMC Rx Transfer size */ 128 129 __IO uint32_t Context; /*!< MMC transfer context */ 130 131 __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ 132 133 __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ 134 135 HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ 136 137 uint32_t CSD[4U]; /*!< MMC card specific data table */ 138 139 uint32_t CID[4U]; /*!< MMC card identification number table */ 140 141 uint32_t Ext_CSD[128]; 142 143 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 144 void (* TxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 145 void (* RxCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 146 void (* ErrorCallback)(struct __MMC_HandleTypeDef *hmmc); 147 void (* AbortCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 148 void (* Read_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 149 void (* Write_DMALnkLstBufCpltCallback)(struct __MMC_HandleTypeDef *hmmc); 150 151 void (* MspInitCallback)(struct __MMC_HandleTypeDef *hmmc); 152 void (* MspDeInitCallback)(struct __MMC_HandleTypeDef *hmmc); 153 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 154 } MMC_HandleTypeDef; 155 156 157 /** 158 * @} 159 */ 160 161 /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register 162 * @{ 163 */ 164 typedef struct 165 { 166 __IO uint8_t CSDStruct; /*!< CSD structure */ 167 __IO uint8_t SysSpecVersion; /*!< System specification version */ 168 __IO uint8_t Reserved1; /*!< Reserved */ 169 __IO uint8_t TAAC; /*!< Data read access time 1 */ 170 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 171 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 172 __IO uint16_t CardComdClasses; /*!< Card command classes */ 173 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 174 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 175 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 176 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 177 __IO uint8_t DSRImpl; /*!< DSR implemented */ 178 __IO uint8_t Reserved2; /*!< Reserved */ 179 __IO uint32_t DeviceSize; /*!< Device Size */ 180 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 181 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 182 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 183 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 184 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 185 __IO uint8_t EraseGrSize; /*!< Erase group size */ 186 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 187 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 188 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 189 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 190 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 191 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 192 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 193 __IO uint8_t Reserved3; /*!< Reserved */ 194 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 195 __IO uint8_t FileFormatGroup; /*!< File format group */ 196 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 197 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 198 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 199 __IO uint8_t FileFormat; /*!< File format */ 200 __IO uint8_t ECC; /*!< ECC code */ 201 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 202 __IO uint8_t Reserved4; /*!< Always 1 */ 203 204 } HAL_MMC_CardCSDTypeDef; 205 /** 206 * @} 207 */ 208 209 /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register 210 * @{ 211 */ 212 typedef struct 213 { 214 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 215 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 216 __IO uint32_t ProdName1; /*!< Product Name part1 */ 217 __IO uint8_t ProdName2; /*!< Product Name part2 */ 218 __IO uint8_t ProdRev; /*!< Product Revision */ 219 __IO uint32_t ProdSN; /*!< Product Serial Number */ 220 __IO uint8_t Reserved1; /*!< Reserved1 */ 221 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 222 __IO uint8_t CID_CRC; /*!< CID CRC */ 223 __IO uint8_t Reserved2; /*!< Always 1 */ 224 225 } HAL_MMC_CardCIDTypeDef; 226 /** 227 * @} 228 */ 229 230 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 231 /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition 232 * @{ 233 */ 234 typedef enum 235 { 236 HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ 237 HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ 238 HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ 239 HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ 240 HAL_MMC_READ_DMA_LNKLST_BUF_CPLT_CB_ID = 0x04U, /*!< MMC DMA Rx Linked List Node buffer Callback ID */ 241 HAL_MMC_WRITE_DMA_LNKLST_BUF_CPLT_CB_ID = 0x05U, /*!< MMC DMA Tx Linked List Node buffer Callback ID */ 242 243 HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ 244 HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ 245 } HAL_MMC_CallbackIDTypeDef; 246 /** 247 * @} 248 */ 249 250 /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition 251 * @{ 252 */ 253 typedef void (*pMMC_CallbackTypeDef)(MMC_HandleTypeDef *hmmc); 254 /** 255 * @} 256 */ 257 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 258 /** 259 * @} 260 */ 261 262 /* Exported constants --------------------------------------------------------*/ 263 /** @defgroup MMC_Exported_Constants Exported Constants 264 * @{ 265 */ 266 267 #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 268 269 /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition 270 * @{ 271 */ 272 #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 273 #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 274 #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 275 #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 276 #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 277 #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 278 #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 279 #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 280 #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the */ 281 /*!< number of transferred bytes does not match the block length */ 282 #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 283 #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 284 #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 285 #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock */ 286 /*!< command or if there was an attempt to access a locked card */ 287 #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 288 #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 289 #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 290 #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 291 #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 292 #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 293 #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 294 #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 295 #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 296 #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 297 #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out */ 298 /*!< of erase sequence command was received */ 299 #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 300 #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 301 #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 302 #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 303 #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 304 #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 305 #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 306 #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 307 #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 308 309 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 310 #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 311 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 312 /** 313 * @} 314 */ 315 316 /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration 317 * @{ 318 */ 319 #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 320 #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 321 #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 322 #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 323 #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 324 #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 325 #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 326 327 /** 328 * @} 329 */ 330 331 /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode 332 * @{ 333 */ 334 /** 335 * @brief 336 */ 337 #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< High voltage in byte mode */ 338 #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< Dual voltage in byte mode */ 339 #define MMC_LOW_VOLTAGE_RANGE 0x80000080U /*!< Low voltage in byte mode */ 340 #define EMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< High voltage in sector mode */ 341 #define EMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< Dual voltage in sector mode */ 342 #define EMMC_LOW_VOLTAGE_RANGE 0xC0000080U /*!< Low voltage in sector mode */ 343 #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U 344 /** 345 * @} 346 */ 347 348 /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards 349 * @{ 350 */ 351 #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ 352 #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ 353 354 /** 355 * @} 356 */ 357 358 /** @defgroup MMC_Exported_Constansts_Group5 MMC Erase Type 359 * @{ 360 */ 361 #define HAL_MMC_ERASE 0x00000000U /*!< Erase the erase groups identified by CMD35 & 36 */ 362 #define HAL_MMC_TRIM 0x00000001U /*!< Erase the write blocks identified by CMD35 & 36 */ 363 #define HAL_MMC_DISCARD 0x00000003U /*!< Discard the write blocks identified by CMD35 & 36 */ 364 #define HAL_MMC_SECURE_ERASE 0x80000000U /*!< Perform a secure purge according SRT on the erase groups identified by CMD35 & 36 */ 365 #define HAL_MMC_SECURE_TRIM_STEP1 0x80000001U /*!< Mark the write blocks identified by CMD35 & 36 for secure erase */ 366 #define HAL_MMC_SECURE_TRIM_STEP2 0x80008000U /*!< Perform a secure purge according SRT on the write blocks previously identified */ 367 368 #define IS_MMC_ERASE_TYPE(TYPE) (((TYPE) == HAL_MMC_ERASE) || \ 369 ((TYPE) == HAL_MMC_TRIM) || \ 370 ((TYPE) == HAL_MMC_DISCARD) || \ 371 ((TYPE) == HAL_MMC_SECURE_ERASE) || \ 372 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP1) || \ 373 ((TYPE) == HAL_MMC_SECURE_TRIM_STEP2)) 374 /** 375 * @} 376 */ 377 378 /** @defgroup MMC_Exported_Constansts_Group6 MMC Secure Removal Type 379 * @{ 380 */ 381 #define HAL_MMC_SRT_ERASE 0x00000001U /*!< Information removed by an erase */ 382 #define HAL_MMC_SRT_WRITE_CHAR_ERASE 0x00000002U /*!< Information removed by an overwriting with a character followed by an erase */ 383 #define HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM 0x00000004U /*!< Information removed by an overwriting with a character, its complement then a random character */ 384 #define HAL_MMC_SRT_VENDOR_DEFINED 0x00000008U /*!< Information removed using a vendor defined */ 385 386 387 #define IS_MMC_SRT_TYPE(TYPE) (((TYPE) == HAL_MMC_SRT_ERASE) || \ 388 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_ERASE) || \ 389 ((TYPE) == HAL_MMC_SRT_WRITE_CHAR_COMPL_RANDOM) || \ 390 ((TYPE) == HAL_MMC_SRT_VENDOR_DEFINED)) 391 /** 392 * @} 393 */ 394 395 /** 396 * @} 397 */ 398 399 /* Exported macro ------------------------------------------------------------*/ 400 /** @defgroup MMC_Exported_macros MMC Exported Macros 401 * @brief macros to handle interrupts and specific clock configurations 402 * @{ 403 */ 404 /** @brief Reset MMC handle state. 405 * @param __HANDLE__ MMC Handle. 406 * @retval None 407 */ 408 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 409 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ 410 (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ 411 (__HANDLE__)->MspInitCallback = NULL; \ 412 (__HANDLE__)->MspDeInitCallback = NULL; \ 413 } while(0) 414 #else 415 #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) 416 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 417 418 /** 419 * @brief Enable the MMC device interrupt. 420 * @param __HANDLE__ MMC Handle. 421 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be enabled. 422 * This parameter can be one or a combination of the following values: 423 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 424 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 425 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 426 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 427 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 428 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 429 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 430 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 431 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 432 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 433 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 434 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 435 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 436 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 437 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 438 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 439 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 440 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 441 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 442 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 443 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 444 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 445 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 446 * @retval None 447 */ 448 #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 449 450 /** 451 * @brief Disable the MMC device interrupt. 452 * @param __HANDLE__ MMC Handle. 453 * @param __INTERRUPT__ specifies the SDMMC interrupt sources to be disabled. 454 * This parameter can be one or a combination of the following values: 455 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 456 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 457 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 458 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 459 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 460 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 461 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 462 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 463 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 464 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 465 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 466 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 467 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 468 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 469 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 470 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 471 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 472 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 473 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 474 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 475 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 476 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 477 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 478 * @retval None 479 */ 480 #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 481 482 /** 483 * @brief Check whether the specified MMC flag is set or not. 484 * @param __HANDLE__ MMC Handle. 485 * @param __FLAG__ specifies the flag to check. 486 * This parameter can be one of the following values: 487 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 488 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 489 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 490 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 491 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 492 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 493 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 494 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 495 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 496 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 497 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 498 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 499 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 500 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 501 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 502 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 503 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 504 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 505 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 506 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 507 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 508 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 509 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 510 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 511 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 512 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 513 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 514 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 515 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 516 * @retval The new state of MMC FLAG (SET or RESET). 517 */ 518 #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 519 520 /** 521 * @brief Clear the MMC's pending flags. 522 * @param __HANDLE__ MMC Handle. 523 * @param __FLAG__ specifies the flag to clear. 524 * This parameter can be one or a combination of the following values: 525 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 526 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 527 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 528 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 529 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 530 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 531 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 532 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 533 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 534 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 535 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 536 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 537 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 538 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 539 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 540 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 541 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 542 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 543 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 544 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 545 * @retval None 546 */ 547 #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 548 549 /** 550 * @brief Check whether the specified MMC interrupt has occurred or not. 551 * @param __HANDLE__ MMC Handle. 552 * @param __INTERRUPT__ specifies the SDMMC interrupt source to check. 553 * This parameter can be one of the following values: 554 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 555 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 556 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 557 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 558 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 559 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 560 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 561 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 562 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 563 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 564 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 565 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 566 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 567 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 568 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 569 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 570 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 571 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 572 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 573 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 574 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 575 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 576 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 577 * @retval The new state of MMC IT (SET or RESET). 578 */ 579 #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 580 581 /** 582 * @brief Clear the MMC's interrupt pending bits. 583 * @param __HANDLE__ MMC Handle. 584 * @param __INTERRUPT__ specifies the interrupt pending bit to clear. 585 * This parameter can be one or a combination of the following values: 586 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 587 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 588 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 589 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 590 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 591 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 592 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 593 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 594 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 595 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 596 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 597 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 598 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 599 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 600 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 601 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 602 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 603 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 604 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 605 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 606 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 607 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 608 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 609 * @retval None 610 */ 611 #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 612 613 /** 614 * @} 615 */ 616 617 /* Include MMC HAL Extension module */ 618 #include "stm32u5xx_hal_mmc_ex.h" 619 620 /* Exported functions --------------------------------------------------------*/ 621 /** @defgroup MMC_Exported_Functions MMC Exported Functions 622 * @{ 623 */ 624 625 /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions 626 * @{ 627 */ 628 HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); 629 HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); 630 HAL_StatusTypeDef HAL_MMC_DeInit(MMC_HandleTypeDef *hmmc); 631 void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); 632 void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); 633 634 /** 635 * @} 636 */ 637 638 /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions 639 * @{ 640 */ 641 /* Blocking mode: Polling */ 642 HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 643 uint32_t NumberOfBlocks, uint32_t Timeout); 644 HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 645 uint32_t NumberOfBlocks, uint32_t Timeout); 646 HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 647 /* Non-Blocking mode: IT */ 648 HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 649 uint32_t NumberOfBlocks); 650 HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 651 uint32_t NumberOfBlocks); 652 /* Non-Blocking mode: DMA */ 653 HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 654 uint32_t NumberOfBlocks); 655 HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, 656 uint32_t NumberOfBlocks); 657 658 void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); 659 660 /* Callback in non blocking modes (DMA) */ 661 void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); 662 void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); 663 void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); 664 void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); 665 666 #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) 667 /* MMC callback registering/unregistering */ 668 HAL_StatusTypeDef HAL_MMC_RegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, 669 pMMC_CallbackTypeDef pCallback); 670 HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); 671 #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ 672 /** 673 * @} 674 */ 675 676 /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions 677 * @{ 678 */ 679 HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); 680 HAL_StatusTypeDef HAL_MMC_ConfigSpeedBusOperation(MMC_HandleTypeDef *hmmc, uint32_t SpeedMode); 681 /** 682 * @} 683 */ 684 685 /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions 686 * @{ 687 */ 688 HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); 689 HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); 690 HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); 691 HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); 692 HAL_StatusTypeDef HAL_MMC_GetCardExtCSD(MMC_HandleTypeDef *hmmc, uint32_t *pExtCSD, uint32_t Timeout); 693 /** 694 * @} 695 */ 696 697 /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions 698 * @{ 699 */ 700 HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); 701 uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); 702 /** 703 * @} 704 */ 705 706 /** @defgroup MMC_Exported_Functions_Group6 Peripheral Abort management 707 * @{ 708 */ 709 HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); 710 HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); 711 /** 712 * @} 713 */ 714 715 /** @defgroup MMC_Exported_Functions_Group7 Peripheral Erase management 716 * @{ 717 */ 718 HAL_StatusTypeDef HAL_MMC_EraseSequence(MMC_HandleTypeDef *hmmc, uint32_t EraseType, uint32_t BlockStartAdd, 719 uint32_t BlockEndAdd); 720 HAL_StatusTypeDef HAL_MMC_Sanitize(MMC_HandleTypeDef *hmmc); 721 HAL_StatusTypeDef HAL_MMC_ConfigSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t SRTMode); 722 HAL_StatusTypeDef HAL_MMC_GetSupportedSecRemovalType(MMC_HandleTypeDef *hmmc, uint32_t *SupportedSRT); 723 /** 724 * @} 725 */ 726 727 /* Private types -------------------------------------------------------------*/ 728 /** @defgroup MMC_Private_Types MMC Private Types 729 * @{ 730 */ 731 732 /** 733 * @} 734 */ 735 736 /* Private defines -----------------------------------------------------------*/ 737 /** @defgroup MMC_Private_Defines MMC Private Defines 738 * @{ 739 */ 740 #define MMC_EXT_CSD_DATA_SEC_SIZE_INDEX 61 741 #define MMC_EXT_CSD_DATA_SEC_SIZE_POS 8 742 /** 743 * @} 744 */ 745 746 /* Private variables ---------------------------------------------------------*/ 747 /** @defgroup MMC_Private_Variables MMC Private Variables 748 * @{ 749 */ 750 751 /** 752 * @} 753 */ 754 755 /* Private constants ---------------------------------------------------------*/ 756 /** @defgroup MMC_Private_Constants MMC Private Constants 757 * @{ 758 */ 759 760 /** 761 * @} 762 */ 763 764 /* Private macros ------------------------------------------------------------*/ 765 /** @defgroup MMC_Private_Macros MMC Private Macros 766 * @{ 767 */ 768 769 /** 770 * @} 771 */ 772 773 /* Private functions prototypes ----------------------------------------------*/ 774 /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes 775 * @{ 776 */ 777 778 /** 779 * @} 780 */ 781 782 /* Private functions ---------------------------------------------------------*/ 783 /** @defgroup MMC_Private_Functions MMC Private Functions 784 * @{ 785 */ 786 787 /** 788 * @} 789 */ 790 791 792 /** 793 * @} 794 */ 795 796 /** 797 * @} 798 */ 799 800 /** 801 * @} 802 */ 803 804 #ifdef __cplusplus 805 } 806 #endif 807 808 809 #endif /* STM32U5xx_HAL_MMC_H */ 810
