1 /**
2 ******************************************************************************
3 * @file stm32u0xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef __STM32U0xx_LL_UTILS_H
34 #define __STM32U0xx_LL_UTILS_H
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32u0xx.h"
42
43 /** @addtogroup STM32U0xx_LL_Driver
44 * @{
45 */
46
47 /** @defgroup UTILS_LL UTILS
48 * @{
49 */
50
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
57 */
58
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61
62 /**
63 * @brief Unique device ID register base address
64 */
65 #define UID_BASE_ADDRESS UID_BASE
66
67 /**
68 * @brief Flash size data register base address
69 */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71
72 /**
73 * @brief Package data register base address
74 */
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
76
77 /**
78 * @}
79 */
80
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
83 * @{
84 */
85 /**
86 * @}
87 */
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
90 * @{
91 */
92 /**
93 * @brief UTILS PLL structure definition
94 */
95 typedef struct
96 {
97 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
98 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
99
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
102
103 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 8 and Max_Data = 86
105
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
108
109 uint32_t PLLR; /*!< Division for the main system clock.
110 This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV
111
112 This feature can be modified afterwards using unitary function
113 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
114 } LL_UTILS_PLLInitTypeDef;
115
116 /**
117 * @brief UTILS System, AHB and APB buses clock configuration structure definition
118 */
119 typedef struct
120 {
121 uint32_t AHBCLKDivider; /*!< The AHBS clock (HCLKS) divider. This clock is derived from the system clock (SYSCLK).
122 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
123
124 This feature can be modified afterwards using unitary function
125 @ref LL_RCC_SetAHBPrescaler(). */
126
127 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
128 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
129
130 This feature can be modified afterwards using unitary function
131 @ref LL_RCC_SetAPB1Prescaler(). */
132
133 } LL_UTILS_ClkInitTypeDef;
134
135 /**
136 * @}
137 */
138
139 /* Exported constants --------------------------------------------------------*/
140 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
141 * @{
142 */
143
144 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
145 * @{
146 */
147 #define LL_UTILS_HSEBYPASS_OFF (uint32_t)0x00000000U /*!< HSE Bypass is not enabled */
148 #define LL_UTILS_HSEBYPASS_ON (uint32_t)0x00000001U /*!< HSE Bypass is enabled */
149 /**
150 * @}
151 */
152
153 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
154 * @{
155 */
156 #if defined(STM32U031xx)
157 #define LL_UTILS_PACKAGETYPE_UFQFPN32 (uint16_t)0x0001U /*!< PACKAGETYPE UFQFPN32 */
158 #define LL_UTILS_PACKAGETYPE_UFQFPN48 (uint16_t)0x0003U /*!< PACKAGETYPE UFQFPN48 */
159 #define LL_UTILS_PACKAGETYPE_LQFP48 (uint16_t)0x0004U /*!< PACKAGETYPE_LQFP48 */
160 #define LL_UTILS_PACKAGETYPE_LQFP64 (uint16_t)0x0005U /*!< ACKAGETYPE_LQFP64 */
161 #define LL_UTILS_PACKAGETYPE_BGA64 (uint16_t)0x0006U /*!< PACKAGETYPE_BGA64 */
162 #define LL_UTILS_PACKAGETYPE_TSSOP20 (uint16_t)0x0009U /*!< PACKAGETYPE_TSSOP20 */
163 #define LL_UTILS_PACKAGETYPE_WLCSP29 (uint16_t)0x000AU /*!< PACKAGETYPE_WLCSP29 */
164 #define LL_UTILS_PACKAGETYPE_LQFP32 (uint16_t)0x000BU /*!< PACKAGETYPE_LQFP32 */
165 #else
166 #define LL_UTILS_PACKAGETYPE_UFQFPN32 (uint16_t)0x0001U /*!< PACKAGETYPE_UFQFPN32 */
167 #define LL_UTILS_PACKAGETYPE_WLCS42 (uint16_t)0x0002U /*!< PACKAGETYPE_WLCS42 */
168 #define LL_UTILS_PACKAGETYPE_UFQFPN48 (uint16_t)0x0004U /*!< PACKAGETYPE_UFQFPN48 */
169 #define LL_UTILS_PACKAGETYPE_LQFP48 (uint16_t)0x0005U /*!< PACKAGETYPE_LQFP48 */
170 #define LL_UTILS_PACKAGETYPE_LQFP64 (uint16_t)0x0006U /*!< PACKAGETYPE_LQFP64 */
171 #define LL_UTILS_PACKAGETYPE_BGA64 (uint16_t)0x0009U /*!< PACKAGETYPE_BGA64 */
172 #define LL_UTILS_PACKAGETYPE_LQFP80 (uint16_t)0x000AU /*!< PACKAGETYPE_LQFP80 */
173 #define LL_UTILS_PACKAGETYPE_BGA80 (uint16_t)0x000BU /*!< PACKAGETYPE_BGA80 */
174 #endif /* STM32U031xx */
175 /**
176 * @}
177 */
178
179 /**
180 * @}
181 */
182
183 /* Exported macro ------------------------------------------------------------*/
184
185 /* Exported functions --------------------------------------------------------*/
186 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
187 * @{
188 */
189
190 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
191 * @{
192 */
193 /**
194 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
195 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
196 */
LL_GetUID_Word0(void)197 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
198 {
199 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
200 }
201
202 /**
203 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
204 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
205 */
LL_GetUID_Word1(void)206 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
207 {
208 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
209 }
210
211 /**
212 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
213 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
214 */
LL_GetUID_Word2(void)215 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
216 {
217 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
218 }
219
220 /**
221 * @brief Get Flash memory size
222 * @note This bitfield indicates the size of the device Flash memory expressed in
223 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
224 * @retval FLASH_SIZE[15:0]: Flash memory size
225 */
LL_GetFlashSize(void)226 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
227 {
228 return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
229 }
230
231 /**
232 * @brief Get Package type
233 * @retval Returned value can be one of the following values:
234 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32
235 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48
236 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48
237 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64
238 * @arg @ref LL_UTILS_PACKAGETYPE_BGA64
239 * @arg @ref LL_UTILS_PACKAGETYPE_TSSOP20 (*)
240 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP29 (*)
241 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP32 (*)
242 * @arg @ref LL_UTILS_PACKAGETYPE_WLCS42 (*)
243 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP80 (*)
244 * @arg @ref LL_UTILS_PACKAGETYPE_BGA80 (*)
245 *
246 * @note (*) Availability depends on devices.
247 *
248 */
LL_GetPackageType(void)249 __STATIC_INLINE uint32_t LL_GetPackageType(void)
250 {
251 return (uint8_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0xFU);
252 }
253
254 /**
255 * @}
256 */
257
258 /** @defgroup UTILS_LL_EF_DELAY DELAY
259 * @{
260 */
261
262 /**
263 * @brief This function configures the Cortex-M SysTick source of the time base.
264 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
265 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
266 * configuration by calling this function, for a delay use rather osDelay RTOS service.
267 * @param Ticks Number of ticks
268 * @retval None
269 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)270 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
271 {
272 /* Configure the SysTick to have interrupt in 1ms time base */
273 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
274 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
275 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
276 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
277 }
278
279 void LL_Init1msTick(uint32_t HCLKFrequency);
280 void LL_mDelay(uint32_t Delay);
281
282 /**
283 * @}
284 */
285
286 /** @defgroup UTILS_EF_SYSTEM SYSTEM
287 * @{
288 */
289
290 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
291 ErrorStatus LL_PLL_ConfigSystemClock_MSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
292 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
293 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
294 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
295 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
296 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
297 ErrorStatus LL_SetFlashLatency(uint32_t HCLK_Frequency);
298
299 /**
300 * @}
301 */
302
303 /**
304 * @}
305 */
306
307 /**
308 * @}
309 */
310
311 /**
312 * @}
313 */
314
315 #ifdef __cplusplus
316 }
317 #endif
318
319 #endif /* __STM32U0xx_LL_UTILS_H */
320
