1 /**
2   ******************************************************************************
3   * @file    stm32n6xx_ll_usb.h
4   * @author  MCD Application Team
5   * @brief   Header file of USB Low Layer HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2023 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32N6xx_LL_USB_H
21 #define STM32N6xx_LL_USB_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif /* __cplusplus */
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32n6xx_hal_def.h"
29 
30 #if defined (USB1_OTG_HS) || defined (USB2_OTG_HS)
31 /** @addtogroup STM32N6xx_HAL_Driver
32   * @{
33   */
34 
35 /** @addtogroup USB_LL
36   * @{
37   */
38 
39 /* Exported types ------------------------------------------------------------*/
40 #ifndef HAL_USB_TIMEOUT
41 #define HAL_USB_TIMEOUT                                       0xF000000U
42 #endif /* define HAL_USB_TIMEOUT */
43 
44 #ifndef HAL_USB_CURRENT_MODE_MAX_DELAY_MS
45 #define HAL_USB_CURRENT_MODE_MAX_DELAY_MS                           200U
46 #endif /* define HAL_USB_CURRENT_MODE_MAX_DELAY_MS */
47 
48 /**
49   * @brief  USB Mode definition
50   */
51 
52 typedef enum
53 {
54   USB_DEVICE_MODE = 0,
55   USB_HOST_MODE   = 1,
56   USB_DRD_MODE    = 2
57 } USB_ModeTypeDef;
58 
59 /**
60   * @brief  URB States definition
61   */
62 typedef enum
63 {
64   URB_IDLE = 0,
65   URB_DONE,
66   URB_NOTREADY,
67   URB_NYET,
68   URB_ERROR,
69   URB_STALL
70 } USB_URBStateTypeDef;
71 
72 /**
73   * @brief  Host channel States  definition
74   */
75 typedef enum
76 {
77   HC_IDLE = 0,
78   HC_XFRC,
79   HC_HALTED,
80   HC_ACK,
81   HC_NAK,
82   HC_NYET,
83   HC_STALL,
84   HC_XACTERR,
85   HC_BBLERR,
86   HC_DATATGLERR
87 } USB_HCStateTypeDef;
88 
89 
90 /**
91   * @brief  USB Instance Initialization Structure definition
92   */
93 typedef struct
94 {
95   uint8_t dev_endpoints;            /*!< Device Endpoints number.
96                                          This parameter depends on the used USB core.
97                                          This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
98 
99   uint8_t Host_channels;            /*!< Host Channels number.
100                                          This parameter Depends on the used USB core.
101                                          This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
102 
103   uint8_t dma_enable;              /*!< USB DMA state.
104                                          If DMA is not supported this parameter shall be set by default to zero */
105 
106   uint8_t speed;                   /*!< USB Core speed.
107                                         This parameter can be any value of @ref PCD_Speed/HCD_Speed
108                                                                                 (HCD_SPEED_xxx, HCD_SPEED_xxx) */
109 
110   uint8_t ep0_mps;                 /*!< Set the Endpoint 0 Max Packet size.                                    */
111 
112   uint8_t phy_itface;              /*!< Select the used PHY interface.
113                                         This parameter can be any value of @ref PCD_PHY_Module/HCD_PHY_Module  */
114 
115   uint8_t Sof_enable;              /*!< Enable or disable the output of the SOF signal.                        */
116 
117   uint8_t low_power_enable;        /*!< Enable or disable the low Power Mode.                                  */
118 
119   uint8_t lpm_enable;              /*!< Enable or disable Link Power Management.                               */
120 
121   uint8_t battery_charging_enable; /*!< Enable or disable Battery charging.                                    */
122 
123   uint8_t vbus_sensing_enable;     /*!< Enable or disable the VBUS Sensing feature.                            */
124 
125   uint8_t use_dedicated_ep1;       /*!< Enable or disable the use of the dedicated EP1 interrupt.              */
126 
127   uint8_t use_external_vbus;       /*!< Enable or disable the use of the external VBUS.                        */
128 
129 } USB_CfgTypeDef;
130 
131 typedef struct
132 {
133   uint8_t   num;                  /*!< Endpoint number
134                                        This parameter must be a number between Min_Data = 1 and Max_Data = 15   */
135 
136   uint8_t   is_in;                /*!< Endpoint direction
137                                        This parameter must be a number between Min_Data = 0 and Max_Data = 1    */
138 
139   uint8_t   is_stall;             /*!< Endpoint stall condition
140                                        This parameter must be a number between Min_Data = 0 and Max_Data = 1    */
141 
142   uint8_t   is_iso_incomplete;    /*!< Endpoint isoc condition
143                                        This parameter must be a number between Min_Data = 0 and Max_Data = 1    */
144 
145   uint8_t   type;                 /*!< Endpoint type
146                                        This parameter can be any value of @ref USB_LL_EP_Type                   */
147 
148   uint8_t   data_pid_start;       /*!< Initial data PID
149                                        This parameter must be a number between Min_Data = 0 and Max_Data = 1    */
150 
151   uint32_t  maxpacket;            /*!< Endpoint Max packet size
152                                        This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
153 
154   uint8_t   *xfer_buff;           /*!< Pointer to transfer buffer                                               */
155 
156   uint32_t  xfer_len;             /*!< Current transfer length                                                  */
157 
158   uint32_t  xfer_count;           /*!< Partial transfer length in case of multi packet transfer                 */
159 
160   uint8_t   even_odd_frame;       /*!< IFrame parity
161                                        This parameter must be a number between Min_Data = 0 and Max_Data = 1    */
162 
163   uint16_t  tx_fifo_num;          /*!< Transmission FIFO number
164                                        This parameter must be a number between Min_Data = 1 and Max_Data = 15   */
165 
166   uint32_t  dma_addr;             /*!< 32 bits aligned transfer buffer address                                  */
167 
168   uint32_t  xfer_size;            /*!< requested transfer size                                                  */
169 } USB_EPTypeDef;
170 
171 typedef struct
172 {
173   uint8_t   dev_addr;           /*!< USB device address.
174                                      This parameter must be a number between Min_Data = 1 and Max_Data = 255    */
175 
176   uint8_t   ch_num;             /*!< Host channel number.
177                                      This parameter must be a number between Min_Data = 1 and Max_Data = 15     */
178 
179   uint8_t   ep_num;             /*!< Endpoint number.
180                                      This parameter must be a number between Min_Data = 1 and Max_Data = 15     */
181 
182   uint8_t   ep_is_in;           /*!< Endpoint direction
183                                      This parameter must be a number between Min_Data = 0 and Max_Data = 1      */
184 
185   uint8_t   speed;              /*!< USB Host Channel speed.
186                                      This parameter can be any value of @ref HCD_Device_Speed:
187                                                                              (HCD_DEVICE_SPEED_xxx)             */
188 
189   uint8_t   do_ping;            /*!< Enable or disable the use of the PING protocol for HS mode.                */
190   uint8_t   do_ssplit;          /*!< Enable start split transaction in HS mode.                                 */
191   uint8_t   do_csplit;          /*!< Enable complete split transaction in HS mode.                              */
192   uint8_t   ep_ss_schedule;     /*!< Enable periodic endpoint start split schedule .                            */
193   uint32_t  iso_splt_xactPos;   /*!< iso split transfer transaction position.                                   */
194 
195   uint8_t   hub_port_nbr;       /*!< USB HUB port number                                                        */
196   uint8_t   hub_addr;           /*!< USB HUB address                                                            */
197 
198   uint8_t   ep_type;            /*!< Endpoint Type.
199                                      This parameter can be any value of @ref USB_LL_EP_Type                     */
200 
201   uint16_t  max_packet;         /*!< Endpoint Max packet size.
202                                      This parameter must be a number between Min_Data = 0 and Max_Data = 64KB   */
203 
204   uint8_t   data_pid;           /*!< Initial data PID.
205                                      This parameter must be a number between Min_Data = 0 and Max_Data = 1      */
206 
207   uint8_t   *xfer_buff;         /*!< Pointer to transfer buffer.                                                */
208 
209   uint32_t  XferSize;           /*!< OTG Channel transfer size.                                                 */
210 
211   uint32_t  xfer_len;           /*!< Current transfer length.                                                   */
212 
213   uint32_t  xfer_count;         /*!< Partial transfer length in case of multi packet transfer.                  */
214 
215   uint8_t   toggle_in;          /*!< IN transfer current toggle flag.
216                                      This parameter must be a number between Min_Data = 0 and Max_Data = 1      */
217 
218   uint8_t   toggle_out;         /*!< OUT transfer current toggle flag
219                                      This parameter must be a number between Min_Data = 0 and Max_Data = 1      */
220 
221   uint32_t  dma_addr;           /*!< 32 bits aligned transfer buffer address.                                   */
222 
223   uint32_t  ErrCnt;             /*!< Host channel error count.                                                  */
224   uint32_t  NyetErrCnt;         /*!< Complete Split NYET Host channel error count.                              */
225 
226   USB_URBStateTypeDef urb_state;  /*!< URB state.
227                                        This parameter can be any value of @ref USB_URBStateTypeDef              */
228 
229   USB_HCStateTypeDef state;       /*!< Host Channel state.
230                                        This parameter can be any value of @ref USB_HCStateTypeDef               */
231 } USB_HCTypeDef;
232 
233 typedef USB_ModeTypeDef     USB_OTG_ModeTypeDef;
234 typedef USB_CfgTypeDef      USB_OTG_CfgTypeDef;
235 typedef USB_EPTypeDef       USB_OTG_EPTypeDef;
236 typedef USB_URBStateTypeDef USB_OTG_URBStateTypeDef;
237 typedef USB_HCStateTypeDef  USB_OTG_HCStateTypeDef;
238 typedef USB_HCTypeDef       USB_OTG_HCTypeDef;
239 
240 /* Exported constants --------------------------------------------------------*/
241 
242 /** @defgroup PCD_Exported_Constants PCD Exported Constants
243   * @{
244   */
245 
246 #if defined (USB1_OTG_HS) || defined (USB2_OTG_HS)
247 /** @defgroup USB_OTG_CORE VERSION ID
248   * @{
249   */
250 #define USB_OTG_CORE_ID_300A          0x4F54300AU
251 #define USB_OTG_CORE_ID_310A          0x4F54310AU
252 /**
253   * @}
254   */
255 
256 /** @defgroup USB_Core_Mode_ USB Core Mode
257   * @{
258   */
259 #define USB_OTG_MODE_DEVICE                    0U
260 #define USB_OTG_MODE_HOST                      1U
261 #define USB_OTG_MODE_DRD                       2U
262 /**
263   * @}
264   */
265 
266 /** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed
267   * @{
268   */
269 #define USB_OTG_SPEED_HIGH                     0U
270 #define USB_OTG_SPEED_HIGH_IN_FULL             1U
271 #define USB_OTG_SPEED_FULL                     3U
272 /**
273   * @}
274   */
275 
276 /** @defgroup USB_LL_Core_PHY USB Low Layer Core PHY
277   * @{
278   */
279 #define USB_OTG_HS_EMBEDDED_PHY                3U
280 /**
281   * @}
282   */
283 
284 /** @defgroup USB_LL_Turnaround_Timeout Turnaround Timeout Value
285   * @{
286   */
287 #ifndef USBD_HS_TRDT_VALUE
288 #define USBD_HS_TRDT_VALUE                     9U
289 #endif /* USBD_HS_TRDT_VALUE */
290 #ifndef USBD_FS_TRDT_VALUE
291 #define USBD_FS_TRDT_VALUE                     5U
292 #define USBD_DEFAULT_TRDT_VALUE                9U
293 #endif /* USBD_HS_TRDT_VALUE */
294 /**
295   * @}
296   */
297 
298 /** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS
299   * @{
300   */
301 #define USB_OTG_HS_MAX_PACKET_SIZE           512U
302 #define USB_OTG_FS_MAX_PACKET_SIZE            64U
303 #define USB_OTG_MAX_EP0_SIZE                  64U
304 /**
305   * @}
306   */
307 
308 /** @defgroup USB_LL_Core_PHY_Frequency USB Low Layer Core PHY Frequency
309   * @{
310   */
311 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ     (0U << 1)
312 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ     (1U << 1)
313 #define DSTS_ENUMSPD_FS_PHY_48MHZ              (3U << 1)
314 /**
315   * @}
316   */
317 
318 /** @defgroup USB_LL_CORE_Frame_Interval USB Low Layer Core Frame Interval
319   * @{
320   */
321 #define DCFG_FRAME_INTERVAL_80                 0U
322 #define DCFG_FRAME_INTERVAL_85                 1U
323 #define DCFG_FRAME_INTERVAL_90                 2U
324 #define DCFG_FRAME_INTERVAL_95                 3U
325 /**
326   * @}
327   */
328 #endif /* defined (USB1_OTG_HS) || defined (USB2_OTG_HS) */
329 /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS
330   * @{
331   */
332 #define EP_MPS_64                              0U
333 #define EP_MPS_32                              1U
334 #define EP_MPS_16                              2U
335 #define EP_MPS_8                               3U
336 /**
337   * @}
338   */
339 
340 /** @defgroup USB_LL_EP_Type USB Low Layer EP Type
341   * @{
342   */
343 #define EP_TYPE_CTRL                           0U
344 #define EP_TYPE_ISOC                           1U
345 #define EP_TYPE_BULK                           2U
346 #define EP_TYPE_INTR                           3U
347 #define EP_TYPE_MSK                            3U
348 /**
349   * @}
350   */
351 
352 /** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed
353   * @{
354   */
355 #define EP_SPEED_LOW                           0U
356 #define EP_SPEED_FULL                          1U
357 #define EP_SPEED_HIGH                          2U
358 /**
359   * @}
360   */
361 
362 /** @defgroup USB_LL_CH_PID_Type USB Low Layer Channel PID Type
363   * @{
364   */
365 #define HC_PID_DATA0                           0U
366 #define HC_PID_DATA2                           1U
367 #define HC_PID_DATA1                           2U
368 #define HC_PID_SETUP                           3U
369 /**
370   * @}
371   */
372 
373 /** @defgroup USB_LL Device Speed
374   * @{
375   */
376 #define USBD_HS_SPEED                          0U
377 #define USBD_HSINFS_SPEED                      1U
378 #define USBH_HS_SPEED                          0U
379 #define USBD_FS_SPEED                          2U
380 #define USBH_FSLS_SPEED                        1U
381 /**
382   * @}
383   */
384 
385 #if defined (USB1_OTG_HS) || defined (USB2_OTG_HS)
386 /** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines
387   * @{
388   */
389 #define STS_GOUT_NAK                           1U
390 #define STS_DATA_UPDT                          2U
391 #define STS_XFER_COMP                          3U
392 #define STS_SETUP_COMP                         4U
393 #define STS_SETUP_UPDT                         6U
394 /**
395   * @}
396   */
397 
398 /** @defgroup USB_LL_HCFG_SPEED_Defines USB Low Layer HCFG Speed Defines
399   * @{
400   */
401 #define HCFG_30_60_MHZ                         0U
402 #define HCFG_48_MHZ                            1U
403 #define HCFG_6_MHZ                             2U
404 /**
405   * @}
406   */
407 
408 /** @defgroup USB_LL_HFIR_Defines USB Low Layer frame interval Defines
409   * @{
410   */
411 #define HFIR_6_MHZ                          6000U
412 #define HFIR_60_MHZ                        60000U
413 #define HFIR_48_MHZ                        48000U
414 /**
415   * @}
416   */
417 
418 /** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines
419   * @{
420   */
421 #define HPRT0_PRTSPD_HIGH_SPEED                0U
422 #define HPRT0_PRTSPD_FULL_SPEED                1U
423 #define HPRT0_PRTSPD_LOW_SPEED                 2U
424 /**
425   * @}
426   */
427 
428 #define HCCHAR_CTRL                            0U
429 #define HCCHAR_ISOC                            1U
430 #define HCCHAR_BULK                            2U
431 #define HCCHAR_INTR                            3U
432 
433 #define GRXSTS_PKTSTS_IN                       2U
434 #define GRXSTS_PKTSTS_IN_XFER_COMP             3U
435 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR          5U
436 #define GRXSTS_PKTSTS_CH_HALTED                7U
437 
438 #define CLEAR_INTERRUPT_MASK          0xFFFFFFFFU
439 
440 #define HC_MAX_PKT_CNT                       256U
441 #define ISO_SPLT_MPS                         188U
442 
443 #define HCSPLT_BEGIN                           1U
444 #define HCSPLT_MIDDLE                          2U
445 #define HCSPLT_END                             3U
446 #define HCSPLT_FULL                            4U
447 
448 #define TEST_J                                 1U
449 #define TEST_K                                 2U
450 #define TEST_SE0_NAK                           3U
451 #define TEST_PACKET                            4U
452 #define TEST_FORCE_EN                          5U
453 
454 #define USBx_PCGCCTL    *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE)
455 #define USBx_HPRT0      *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE)
456 
457 #define USBx_DEVICE     ((USB_OTG_DeviceTypeDef *)(USBx_BASE + USB_OTG_DEVICE_BASE))
458 #define USBx_INEP(i)    ((USB_OTG_INEndpointTypeDef *)(USBx_BASE\
459                                                        + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
460 
461 #define USBx_OUTEP(i)   ((USB_OTG_OUTEndpointTypeDef *)(USBx_BASE\
462                                                         + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE)))
463 
464 #define USBx_DFIFO(i)   *(__IO uint32_t *)(USBx_BASE + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE))
465 
466 #define USBx_HOST       ((USB_OTG_HostTypeDef *)(USBx_BASE + USB_OTG_HOST_BASE))
467 #define USBx_HC(i)      ((USB_OTG_HostChannelTypeDef *)(USBx_BASE\
468                                                         + USB_OTG_HOST_CHANNEL_BASE\
469                                                         + ((i) * USB_OTG_HOST_CHANNEL_SIZE)))
470 
471 
472 #define EP_ADDR_MSK                            0xFU
473 #endif /* defined (USB1_OTG_HS) || defined (USB2_OTG_HS) */
474 /**
475   * @}
476   */
477 
478 /* Exported macro ------------------------------------------------------------*/
479 /** @defgroup USB_LL_Exported_Macros USB Low Layer Exported Macros
480   * @{
481   */
482 #if defined (USB1_OTG_HS) || defined (USB2_OTG_HS)
483 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__)     ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
484 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__)   ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
485 
486 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__)          (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
487 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__)         (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
488 #endif /* defined (USB1_OTG_HS) || defined (USB2_OTG_HS) */
489 /**
490   * @}
491   */
492 
493 /* Exported functions --------------------------------------------------------*/
494 /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions
495   * @{
496   */
497 #if defined (USB1_OTG_HS) || defined (USB2_OTG_HS)
498 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
499 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
500 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
501 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
502 HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed);
503 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode);
504 HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed);
505 HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx);
506 HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num);
507 HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
508 HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
509 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
510 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
511 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma);
512 HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
513                                   uint8_t ch_ep_num, uint16_t len, uint8_t dma);
514 
515 void             *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
516 HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
517 HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep);
518 HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
519 HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address);
520 HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx);
521 HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx);
522 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
523 HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx);
524 HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup);
525 uint8_t           USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx);
526 uint32_t          USB_GetMode(const USB_OTG_GlobalTypeDef *USBx);
527 uint32_t          USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx);
528 uint32_t          USB_ReadChInterrupts(const USB_OTG_GlobalTypeDef *USBx, uint8_t chnum);
529 uint32_t          USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx);
530 uint32_t          USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
531 uint32_t          USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx);
532 uint32_t          USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum);
533 void              USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
534 
535 HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
536 HAL_StatusTypeDef USB_InitFSLSPClkSel(const USB_OTG_GlobalTypeDef *USBx, uint8_t freq);
537 HAL_StatusTypeDef USB_ResetPort(const USB_OTG_GlobalTypeDef *USBx);
538 HAL_StatusTypeDef USB_DriveVbus(const USB_OTG_GlobalTypeDef *USBx, uint8_t state);
539 uint32_t          USB_GetHostSpeed(USB_OTG_GlobalTypeDef const *USBx);
540 uint32_t          USB_GetCurrentFrame(USB_OTG_GlobalTypeDef const *USBx);
541 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num,
542                               uint8_t epnum, uint8_t dev_address, uint8_t speed,
543                               uint8_t ep_type, uint16_t mps);
544 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx,
545                                    USB_OTG_HCTypeDef *hc, uint8_t dma);
546 
547 uint32_t          USB_HC_ReadInterrupt(const USB_OTG_GlobalTypeDef *USBx);
548 HAL_StatusTypeDef USB_HC_Halt(const USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num);
549 HAL_StatusTypeDef USB_DoPing(const USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num);
550 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
551 HAL_StatusTypeDef USB_ActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx);
552 HAL_StatusTypeDef USB_DeActivateRemoteWakeup(const USB_OTG_GlobalTypeDef *USBx);
553 #endif /* defined (USB1_OTG_HS) || defined (USB2_OTG_HS) */
554 
555 /**
556   * @}
557   */
558 
559 /**
560   * @}
561   */
562 
563 /**
564   * @}
565   */
566 
567 /**
568   * @}
569   */
570 #endif /* defined (USB1_OTG_HS) || defined (USB2_OTG_HS) */
571 
572 #ifdef __cplusplus
573 }
574 #endif /* __cplusplus */
575 
576 
577 #endif /* STM32N6xx_LL_USB_H */
578