1 /**
2 ******************************************************************************
3 * @file stm32n6xx_ll_exti.h
4 * @author GPM Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32N6xx_LL_EXTI_H
21 #define STM32N6xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32n6xx.h"
29
30 /** @addtogroup STM32N6xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 #define LL_EXTI_REGISTER_PINPOS_SHFT 16U /*!< Define used to shift pin position in EXTICR register */
44
45 /* Private Macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
57 * @{
58 */
59 typedef struct
60 {
61
62 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
63 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
64
65 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
66 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
67
68 uint32_t Line_64_95; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 64 to 95
69 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
70
71 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
72 This parameter can be set either to ENABLE or DISABLE */
73
74 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
75 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
76
77 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
78 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
79 } LL_EXTI_InitTypeDef;
80
81 /**
82 * @}
83 */
84 #endif /*USE_FULL_LL_DRIVER*/
85
86 /* Exported constants --------------------------------------------------------*/
87 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
88 * @{
89 */
90
91 /** @defgroup EXTI_LL_EC_LINE LINE
92 * @{
93 */
94 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
95 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
96 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
97 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
98 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
99 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
100 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
101 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
102 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
103 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
104 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
105 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
106 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
107 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
108 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
109 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
110 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
111 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
112 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
113 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
114 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
115 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
116 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
117 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
118 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
119 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
120 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
121 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
122 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
123 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
124 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
125 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< ALL Extended line */
126
127 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
128 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
129 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
130 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
131 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
132 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
133 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
134 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
135 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
136 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
137 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
138 #define LL_EXTI_LINE_43 EXTI_IMR2_IM43 /*!< Extended line 43 */
139 #define LL_EXTI_LINE_44 EXTI_IMR2_IM44 /*!< Extended line 44 */
140 #define LL_EXTI_LINE_45 EXTI_IMR2_IM45 /*!< Extended line 45 */
141 #define LL_EXTI_LINE_46 EXTI_IMR2_IM46 /*!< Extended line 46 */
142 #define LL_EXTI_LINE_47 EXTI_IMR2_IM47 /*!< Extended line 47 */
143 #define LL_EXTI_LINE_48 EXTI_IMR2_IM48 /*!< Extended line 48 */
144 #define LL_EXTI_LINE_49 EXTI_IMR2_IM49 /*!< Extended line 49 */
145 #define LL_EXTI_LINE_50 EXTI_IMR2_IM50 /*!< Extended line 50 */
146 #define LL_EXTI_LINE_51 EXTI_IMR2_IM51 /*!< Extended line 51 */
147 #define LL_EXTI_LINE_52 EXTI_IMR2_IM52 /*!< Extended line 52 */
148 #define LL_EXTI_LINE_53 EXTI_IMR2_IM53 /*!< Extended line 53 */
149 #define LL_EXTI_LINE_54 EXTI_IMR2_IM54 /*!< Extended line 54 */
150 #define LL_EXTI_LINE_55 EXTI_IMR2_IM55 /*!< Extended line 55 */
151 #define LL_EXTI_LINE_56 EXTI_IMR2_IM56 /*!< Extended line 56 */
152 #define LL_EXTI_LINE_57 EXTI_IMR2_IM57 /*!< Extended line 57 */
153 #define LL_EXTI_LINE_58 EXTI_IMR2_IM58 /*!< Extended line 58 */
154 #define LL_EXTI_LINE_60 EXTI_IMR2_IM60 /*!< Extended line 60 */
155 #define LL_EXTI_LINE_61 EXTI_IMR2_IM61 /*!< Extended line 61 */
156 #define LL_EXTI_LINE_62 EXTI_IMR2_IM62 /*!< Extended line 62 */
157 #define LL_EXTI_LINE_63 EXTI_IMR2_IM63 /*!< Extended line 63 */
158 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
159
160 #define LL_EXTI_LINE_64 EXTI_IMR3_IM64 /*!< Extended line 64 */
161 #define LL_EXTI_LINE_65 EXTI_IMR3_IM65 /*!< Extended line 65 */
162 #define LL_EXTI_LINE_66 EXTI_IMR3_IM66 /*!< Extended line 66 */
163 #define LL_EXTI_LINE_68 EXTI_IMR3_IM68 /*!< Extended line 68 */
164 #define LL_EXTI_LINE_69 EXTI_IMR3_IM69 /*!< Extended line 69 */
165 #define LL_EXTI_LINE_70 EXTI_IMR3_IM70 /*!< Extended line 70 */
166 #define LL_EXTI_LINE_71 EXTI_IMR3_IM71 /*!< Extended line 71 */
167 #define LL_EXTI_LINE_72 EXTI_IMR3_IM72 /*!< Extended line 72 */
168 #define LL_EXTI_LINE_73 EXTI_IMR3_IM73 /*!< Extended line 73 */
169 #define LL_EXTI_LINE_74 EXTI_IMR3_IM74 /*!< Extended line 74 */
170 #define LL_EXTI_LINE_77 EXTI_IMR3_IM77 /*!< Extended line 77 */
171 #define LL_EXTI_LINE_ALL_64_95 EXTI_IMR3_IM /*!< All Extended line not reserved*/
172
173 #if defined(USE_FULL_LL_DRIVER)
174 #define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */
175 #endif /*USE_FULL_LL_DRIVER*/
176
177 /** @defgroup SYSTEM_LL_EC_EXTI_PORT EXTI EXTI PORT
178 * @{
179 */
180 #define LL_EXTI_EXTI_PORTA 0U /*!< EXTI PORT A */
181 #define LL_EXTI_EXTI_PORTB EXTI_EXTICR1_EXTI0_0 /*!< EXTI PORT B */
182 #define LL_EXTI_EXTI_PORTC EXTI_EXTICR1_EXTI0_1 /*!< EXTI PORT C */
183 #define LL_EXTI_EXTI_PORTD (EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT D */
184 #define LL_EXTI_EXTI_PORTE EXTI_EXTICR1_EXTI0_2 /*!< EXTI PORT E */
185 #define LL_EXTI_EXTI_PORTF (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT F */
186 #define LL_EXTI_EXTI_PORTG (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_1) /*!< EXTI PORT G */
187 #define LL_EXTI_EXTI_PORTH (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT H */
188 #define LL_EXTI_EXTI_PORTN EXTI_EXTICR1_EXTI0_3 /*!< EXTI PORT N */
189 #define LL_EXTI_EXTI_PORTO (EXTI_EXTICR1_EXTI0_3|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT O */
190 #define LL_EXTI_EXTI_PORTP (EXTI_EXTICR1_EXTI0_3|EXTI_EXTICR1_EXTI0_1) /*!< EXTI PORT P */
191 #define LL_EXTI_EXTI_PORTQ (EXTI_EXTICR1_EXTI0_3|EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT Q */
192 /**
193 * @}
194 */
195
196 /** @defgroup SYSTEM_LL_EC_EXTI_LINE EXTI EXTI LINE
197 * @{
198 */
199 #define LL_EXTI_EXTI_LINE0 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
200 #define LL_EXTI_EXTI_LINE1 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
201 #define LL_EXTI_EXTI_LINE2 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_16 | EXTICR[0] */
202 #define LL_EXTI_EXTI_LINE3 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_24 | EXTICR[0] */
203 #define LL_EXTI_EXTI_LINE4 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
204 #define LL_EXTI_EXTI_LINE5 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
205 #define LL_EXTI_EXTI_LINE6 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_16 | EXTICR[1] */
206 #define LL_EXTI_EXTI_LINE7 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_24 | EXTICR[1] */
207 #define LL_EXTI_EXTI_LINE8 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
208 #define LL_EXTI_EXTI_LINE9 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
209 #define LL_EXTI_EXTI_LINE10 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_16 | EXTICR[2] */
210 #define LL_EXTI_EXTI_LINE11 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_24 | EXTICR[2] */
211 #define LL_EXTI_EXTI_LINE12 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
212 #define LL_EXTI_EXTI_LINE13 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
213 #define LL_EXTI_EXTI_LINE14 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_16 | EXTICR[3] */
214 #define LL_EXTI_EXTI_LINE15 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_24 | EXTICR[3] */
215 /**
216 * @}
217 */
218 /**
219 * @}
220 */
221 #if defined(USE_FULL_LL_DRIVER)
222
223 /** @defgroup EXTI_LL_EC_MODE Mode
224 * @{
225 */
226 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
227 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
228 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
229 /**
230 * @}
231 */
232
233 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
234 * @{
235 */
236 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
237 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
238 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
239 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
240
241 /**
242 * @}
243 */
244
245
246 #endif /*USE_FULL_LL_DRIVER*/
247
248
249 /**
250 * @}
251 */
252
253 /* Exported macro ------------------------------------------------------------*/
254 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
255 * @{
256 */
257
258 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
259 * @{
260 */
261
262 /**
263 * @brief Write a value in EXTI register
264 * @param __REG__ Register to be written
265 * @param __VALUE__ Value to be written in the register
266 * @retval None
267 */
268 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
269
270 /**
271 * @brief Read a value in EXTI register
272 * @param __REG__ Register to be read
273 * @retval Register value
274 */
275 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
276 /**
277 * @}
278 */
279
280
281 /**
282 * @}
283 */
284
285
286
287 /* Exported functions --------------------------------------------------------*/
288 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
289 * @{
290 */
291 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
292 * @{
293 */
294
295 /**
296 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
297 * @note The reset value for the direct or internal lines (see RM)
298 * is set to 1 in order to enable the interrupt by default.
299 * Bits are set automatically at Power on.
300 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
301 * @param ExtiLine This parameter can be one of the following values:
302 * @arg @ref LL_EXTI_LINE_0
303 * @arg @ref LL_EXTI_LINE_1
304 * @arg @ref LL_EXTI_LINE_2
305 * @arg @ref LL_EXTI_LINE_3
306 * @arg @ref LL_EXTI_LINE_4
307 * @arg @ref LL_EXTI_LINE_5
308 * @arg @ref LL_EXTI_LINE_6
309 * @arg @ref LL_EXTI_LINE_7
310 * @arg @ref LL_EXTI_LINE_8
311 * @arg @ref LL_EXTI_LINE_9
312 * @arg @ref LL_EXTI_LINE_10
313 * @arg @ref LL_EXTI_LINE_11
314 * @arg @ref LL_EXTI_LINE_12
315 * @arg @ref LL_EXTI_LINE_13
316 * @arg @ref LL_EXTI_LINE_14
317 * @arg @ref LL_EXTI_LINE_15
318 * @arg @ref LL_EXTI_LINE_17
319 * @arg @ref LL_EXTI_LINE_18
320 * @arg @ref LL_EXTI_LINE_19
321 * @arg @ref LL_EXTI_LINE_20
322 * @arg @ref LL_EXTI_LINE_21
323 * @arg @ref LL_EXTI_LINE_22
324 * @arg @ref LL_EXTI_LINE_23
325 * @arg @ref LL_EXTI_LINE_24
326 * @arg @ref LL_EXTI_LINE_25
327 * @arg @ref LL_EXTI_LINE_26
328 * @arg @ref LL_EXTI_LINE_27
329 * @arg @ref LL_EXTI_LINE_28
330 * @arg @ref LL_EXTI_LINE_29
331 * @arg @ref LL_EXTI_LINE_30
332 * @arg @ref LL_EXTI_LINE_31
333 * @arg @ref LL_EXTI_LINE_ALL_0_31
334 * @note Please check each device line mapping for EXTI Line availability
335 * @retval None
336 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)337 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
338 {
339 SET_BIT(EXTI->IMR1, ExtiLine);
340 }
341
342 /**
343 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
344 * @note The reset value for the direct lines (see RM)
345 * is set to 1 in order to enable the interrupt by default.
346 * Bits are set automatically at Power on.
347 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
348 * @param ExtiLine This parameter can be one of the following values:
349 * @arg @ref LL_EXTI_LINE_32
350 * @arg @ref LL_EXTI_LINE_33
351 * @arg @ref LL_EXTI_LINE_34
352 * @arg @ref LL_EXTI_LINE_35
353 * @arg @ref LL_EXTI_LINE_36
354 * @arg @ref LL_EXTI_LINE_37
355 * @arg @ref LL_EXTI_LINE_38
356 * @arg @ref LL_EXTI_LINE_39
357 * @arg @ref LL_EXTI_LINE_40
358 * @arg @ref LL_EXTI_LINE_41
359 * @arg @ref LL_EXTI_LINE_42
360 * @arg @ref LL_EXTI_LINE_43
361 * @arg @ref LL_EXTI_LINE_44
362 * @arg @ref LL_EXTI_LINE_45
363 * @arg @ref LL_EXTI_LINE_46
364 * @arg @ref LL_EXTI_LINE_47
365 * @arg @ref LL_EXTI_LINE_48
366 * @arg @ref LL_EXTI_LINE_49
367 * @arg @ref LL_EXTI_LINE_50
368 * @arg @ref LL_EXTI_LINE_51
369 * @arg @ref LL_EXTI_LINE_52
370 * @arg @ref LL_EXTI_LINE_53
371 * @arg @ref LL_EXTI_LINE_54
372 * @arg @ref LL_EXTI_LINE_55
373 * @arg @ref LL_EXTI_LINE_56
374 * @arg @ref LL_EXTI_LINE_57
375 * @arg @ref LL_EXTI_LINE_58
376 * @arg @ref LL_EXTI_LINE_62
377 * @arg @ref LL_EXTI_LINE_61
378 * @arg @ref LL_EXTI_LINE_62
379 * @arg @ref LL_EXTI_LINE_63
380 * @arg @ref LL_EXTI_LINE_ALL_32_63
381 * @retval None
382 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)383 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
384 {
385 SET_BIT(EXTI->IMR2, ExtiLine);
386 }
387
388 /**
389 * @brief Enable ExtiLine Interrupt request for Lines in range 64 to 95
390 * @note The reset value for the direct lines (see RM)
391 * is set to 1 in order to enable the interrupt by default.
392 * Bits are set automatically at Power on.
393 * @rmtoll IMR3 IMx LL_EXTI_EnableIT_64_95
394 * @param ExtiLine This parameter can be one of the following values:
395 * @arg @ref LL_EXTI_LINE_64
396 * @arg @ref LL_EXTI_LINE_65
397 * @arg @ref LL_EXTI_LINE_66
398 * @arg @ref LL_EXTI_LINE_68
399 * @arg @ref LL_EXTI_LINE_69
400 * @arg @ref LL_EXTI_LINE_70
401 * @arg @ref LL_EXTI_LINE_71
402 * @arg @ref LL_EXTI_LINE_72
403 * @arg @ref LL_EXTI_LINE_73
404 * @arg @ref LL_EXTI_LINE_74
405 * @arg @ref LL_EXTI_LINE_77
406 * @arg @ref LL_EXTI_LINE_ALL_64_95
407 * @retval None
408 */
LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)409 __STATIC_INLINE void LL_EXTI_EnableIT_64_95(uint32_t ExtiLine)
410 {
411 SET_BIT(EXTI->IMR3, ExtiLine);
412 }
413
414 /**
415 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
416 * @note The reset value for the direct or internal lines (see RM)
417 * is set to 1 in order to enable the interrupt by default.
418 * Bits are set automatically at Power on.
419 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
420 * @param ExtiLine This parameter can be one of the following values:
421 * @arg @ref LL_EXTI_LINE_0
422 * @arg @ref LL_EXTI_LINE_1
423 * @arg @ref LL_EXTI_LINE_2
424 * @arg @ref LL_EXTI_LINE_3
425 * @arg @ref LL_EXTI_LINE_4
426 * @arg @ref LL_EXTI_LINE_5
427 * @arg @ref LL_EXTI_LINE_6
428 * @arg @ref LL_EXTI_LINE_7
429 * @arg @ref LL_EXTI_LINE_8
430 * @arg @ref LL_EXTI_LINE_9
431 * @arg @ref LL_EXTI_LINE_10
432 * @arg @ref LL_EXTI_LINE_11
433 * @arg @ref LL_EXTI_LINE_12
434 * @arg @ref LL_EXTI_LINE_13
435 * @arg @ref LL_EXTI_LINE_14
436 * @arg @ref LL_EXTI_LINE_15
437 * @arg @ref LL_EXTI_LINE_17
438 * @arg @ref LL_EXTI_LINE_18
439 * @arg @ref LL_EXTI_LINE_19
440 * @arg @ref LL_EXTI_LINE_20
441 * @arg @ref LL_EXTI_LINE_21
442 * @arg @ref LL_EXTI_LINE_22
443 * @arg @ref LL_EXTI_LINE_23
444 * @arg @ref LL_EXTI_LINE_24
445 * @arg @ref LL_EXTI_LINE_25
446 * @arg @ref LL_EXTI_LINE_26
447 * @arg @ref LL_EXTI_LINE_27
448 * @arg @ref LL_EXTI_LINE_28
449 * @arg @ref LL_EXTI_LINE_29
450 * @arg @ref LL_EXTI_LINE_30
451 * @arg @ref LL_EXTI_LINE_31
452 * @arg @ref LL_EXTI_LINE_ALL_0_31
453 * @note Please check each device line mapping for EXTI Line availability
454 * @retval None
455 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)456 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
457 {
458 CLEAR_BIT(EXTI->IMR1, ExtiLine);
459 }
460
461 /**
462 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
463 * @note The reset value for the direct lines (see RM)
464 * is set to 1 in order to enable the interrupt by default.
465 * Bits are set automatically at Power on.
466 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
467 * @param ExtiLine This parameter can be one of the following values:
468 * @arg @ref LL_EXTI_LINE_32
469 * @arg @ref LL_EXTI_LINE_33
470 * @arg @ref LL_EXTI_LINE_34
471 * @arg @ref LL_EXTI_LINE_35
472 * @arg @ref LL_EXTI_LINE_36
473 * @arg @ref LL_EXTI_LINE_37
474 * @arg @ref LL_EXTI_LINE_38
475 * @arg @ref LL_EXTI_LINE_39
476 * @arg @ref LL_EXTI_LINE_40
477 * @arg @ref LL_EXTI_LINE_41
478 * @arg @ref LL_EXTI_LINE_42
479 * @arg @ref LL_EXTI_LINE_43
480 * @arg @ref LL_EXTI_LINE_44
481 * @arg @ref LL_EXTI_LINE_45
482 * @arg @ref LL_EXTI_LINE_46
483 * @arg @ref LL_EXTI_LINE_47
484 * @arg @ref LL_EXTI_LINE_48
485 * @arg @ref LL_EXTI_LINE_49
486 * @arg @ref LL_EXTI_LINE_50
487 * @arg @ref LL_EXTI_LINE_51
488 * @arg @ref LL_EXTI_LINE_52
489 * @arg @ref LL_EXTI_LINE_53
490 * @arg @ref LL_EXTI_LINE_54
491 * @arg @ref LL_EXTI_LINE_55
492 * @arg @ref LL_EXTI_LINE_56
493 * @arg @ref LL_EXTI_LINE_57
494 * @arg @ref LL_EXTI_LINE_58
495 * @arg @ref LL_EXTI_LINE_62
496 * @arg @ref LL_EXTI_LINE_61
497 * @arg @ref LL_EXTI_LINE_62
498 * @arg @ref LL_EXTI_LINE_63
499 * @arg @ref LL_EXTI_LINE_ALL_32_63
500 * @retval None
501 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)502 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
503 {
504 CLEAR_BIT(EXTI->IMR2, ExtiLine);
505 }
506
507 /**
508 * @brief Disable ExtiLine Interrupt request for Lines in range 64 to 95
509 * @note The reset value for the direct lines (see RM)
510 * is set to 1 in order to enable the interrupt by default.
511 * Bits are set automatically at Power on.
512 * @rmtoll IMR3 IMx LL_EXTI_DisableIT_64_95
513 * @param ExtiLine This parameter can be one of the following values:
514 * @arg @ref LL_EXTI_LINE_64
515 * @arg @ref LL_EXTI_LINE_65
516 * @arg @ref LL_EXTI_LINE_66
517 * @arg @ref LL_EXTI_LINE_68
518 * @arg @ref LL_EXTI_LINE_69
519 * @arg @ref LL_EXTI_LINE_70
520 * @arg @ref LL_EXTI_LINE_71
521 * @arg @ref LL_EXTI_LINE_72
522 * @arg @ref LL_EXTI_LINE_73
523 * @arg @ref LL_EXTI_LINE_74
524 * @arg @ref LL_EXTI_LINE_77
525 * @arg @ref LL_EXTI_LINE_ALL_64_95
526 * @retval None
527 */
LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)528 __STATIC_INLINE void LL_EXTI_DisableIT_64_95(uint32_t ExtiLine)
529 {
530 CLEAR_BIT(EXTI->IMR3, ExtiLine);
531 }
532
533 /**
534 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
535 * @note The reset value for the direct or internal lines (see RM)
536 * is set to 1 in order to enable the interrupt by default.
537 * Bits are set automatically at Power on.
538 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
539 * @param ExtiLine This parameter can be one of the following values:
540 * @arg @ref LL_EXTI_LINE_0
541 * @arg @ref LL_EXTI_LINE_1
542 * @arg @ref LL_EXTI_LINE_2
543 * @arg @ref LL_EXTI_LINE_3
544 * @arg @ref LL_EXTI_LINE_4
545 * @arg @ref LL_EXTI_LINE_5
546 * @arg @ref LL_EXTI_LINE_6
547 * @arg @ref LL_EXTI_LINE_7
548 * @arg @ref LL_EXTI_LINE_8
549 * @arg @ref LL_EXTI_LINE_9
550 * @arg @ref LL_EXTI_LINE_10
551 * @arg @ref LL_EXTI_LINE_11
552 * @arg @ref LL_EXTI_LINE_12
553 * @arg @ref LL_EXTI_LINE_13
554 * @arg @ref LL_EXTI_LINE_14
555 * @arg @ref LL_EXTI_LINE_15
556 * @arg @ref LL_EXTI_LINE_17
557 * @arg @ref LL_EXTI_LINE_18
558 * @arg @ref LL_EXTI_LINE_19
559 * @arg @ref LL_EXTI_LINE_20
560 * @arg @ref LL_EXTI_LINE_21
561 * @arg @ref LL_EXTI_LINE_22
562 * @arg @ref LL_EXTI_LINE_23
563 * @arg @ref LL_EXTI_LINE_24
564 * @arg @ref LL_EXTI_LINE_25
565 * @arg @ref LL_EXTI_LINE_26
566 * @arg @ref LL_EXTI_LINE_27
567 * @arg @ref LL_EXTI_LINE_28
568 * @arg @ref LL_EXTI_LINE_29
569 * @arg @ref LL_EXTI_LINE_30
570 * @arg @ref LL_EXTI_LINE_31
571 * @arg @ref LL_EXTI_LINE_ALL_0_31
572 * @note Please check each device line mapping for EXTI Line availability
573 * @retval State of bit (1 or 0).
574 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)575 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
576 {
577 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
578 }
579
580 /**
581 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
582 * @note The reset value for the direct lines (see RM)
583 * is set to 1 in order to enable the interrupt by default.
584 * Bits are set automatically at Power on.
585 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
586 * @param ExtiLine This parameter can be one of the following values:
587 * @arg @ref LL_EXTI_LINE_32
588 * @arg @ref LL_EXTI_LINE_33
589 * @arg @ref LL_EXTI_LINE_34
590 * @arg @ref LL_EXTI_LINE_35
591 * @arg @ref LL_EXTI_LINE_36
592 * @arg @ref LL_EXTI_LINE_37
593 * @arg @ref LL_EXTI_LINE_38
594 * @arg @ref LL_EXTI_LINE_39
595 * @arg @ref LL_EXTI_LINE_40
596 * @arg @ref LL_EXTI_LINE_41
597 * @arg @ref LL_EXTI_LINE_42
598 * @arg @ref LL_EXTI_LINE_43
599 * @arg @ref LL_EXTI_LINE_44
600 * @arg @ref LL_EXTI_LINE_45
601 * @arg @ref LL_EXTI_LINE_46
602 * @arg @ref LL_EXTI_LINE_47
603 * @arg @ref LL_EXTI_LINE_48
604 * @arg @ref LL_EXTI_LINE_49
605 * @arg @ref LL_EXTI_LINE_50
606 * @arg @ref LL_EXTI_LINE_51
607 * @arg @ref LL_EXTI_LINE_52
608 * @arg @ref LL_EXTI_LINE_53
609 * @arg @ref LL_EXTI_LINE_54
610 * @arg @ref LL_EXTI_LINE_55
611 * @arg @ref LL_EXTI_LINE_56
612 * @arg @ref LL_EXTI_LINE_57
613 * @arg @ref LL_EXTI_LINE_58
614 * @arg @ref LL_EXTI_LINE_62
615 * @arg @ref LL_EXTI_LINE_61
616 * @arg @ref LL_EXTI_LINE_62
617 * @arg @ref LL_EXTI_LINE_63
618 * @arg @ref LL_EXTI_LINE_ALL_32_63
619 * @retval State of bit (1 or 0).
620 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)621 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
622 {
623 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
624 }
625
626 /**
627 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 64 to 95
628 * @note The reset value for the direct lines (see RM)
629 * is set to 1 in order to enable the interrupt by default.
630 * Bits are set automatically at Power on.
631 * @rmtoll IMR3 IMx LL_EXTI_IsEnabledIT_64_95
632 * @param ExtiLine This parameter can be one of the following values:
633 * @arg @ref LL_EXTI_LINE_64
634 * @arg @ref LL_EXTI_LINE_65
635 * @arg @ref LL_EXTI_LINE_66
636 * @arg @ref LL_EXTI_LINE_68
637 * @arg @ref LL_EXTI_LINE_69
638 * @arg @ref LL_EXTI_LINE_70
639 * @arg @ref LL_EXTI_LINE_71
640 * @arg @ref LL_EXTI_LINE_72
641 * @arg @ref LL_EXTI_LINE_73
642 * @arg @ref LL_EXTI_LINE_74
643 * @arg @ref LL_EXTI_LINE_77
644 * @arg @ref LL_EXTI_LINE_ALL_64_95
645 * @retval State of bit (1 or 0).
646 */
LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine)647 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_64_95(uint32_t ExtiLine)
648 {
649 return ((READ_BIT(EXTI->IMR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
650 }
651
652 /**
653 * @}
654 */
655
656 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
657 * @{
658 */
659
660 /**
661 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
662 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
663 * @param ExtiLine This parameter can be one of the following values:
664 * @arg @ref LL_EXTI_LINE_0
665 * @arg @ref LL_EXTI_LINE_1
666 * @arg @ref LL_EXTI_LINE_2
667 * @arg @ref LL_EXTI_LINE_3
668 * @arg @ref LL_EXTI_LINE_4
669 * @arg @ref LL_EXTI_LINE_5
670 * @arg @ref LL_EXTI_LINE_6
671 * @arg @ref LL_EXTI_LINE_7
672 * @arg @ref LL_EXTI_LINE_8
673 * @arg @ref LL_EXTI_LINE_9
674 * @arg @ref LL_EXTI_LINE_10
675 * @arg @ref LL_EXTI_LINE_11
676 * @arg @ref LL_EXTI_LINE_12
677 * @arg @ref LL_EXTI_LINE_13
678 * @arg @ref LL_EXTI_LINE_14
679 * @arg @ref LL_EXTI_LINE_15
680 * @arg @ref LL_EXTI_LINE_17
681 * @arg @ref LL_EXTI_LINE_18
682 * @arg @ref LL_EXTI_LINE_19
683 * @arg @ref LL_EXTI_LINE_20
684 * @arg @ref LL_EXTI_LINE_21
685 * @arg @ref LL_EXTI_LINE_22
686 * @arg @ref LL_EXTI_LINE_23
687 * @arg @ref LL_EXTI_LINE_24
688 * @arg @ref LL_EXTI_LINE_25
689 * @arg @ref LL_EXTI_LINE_26
690 * @arg @ref LL_EXTI_LINE_27
691 * @arg @ref LL_EXTI_LINE_28
692 * @arg @ref LL_EXTI_LINE_29
693 * @arg @ref LL_EXTI_LINE_30
694 * @arg @ref LL_EXTI_LINE_31
695 * @arg @ref LL_EXTI_LINE_ALL_0_31
696 * @note Please check each device line mapping for EXTI Line availability
697 * @retval None
698 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)699 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
700 {
701 SET_BIT(EXTI->EMR1, ExtiLine);
702
703 }
704
705 /**
706 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
707 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
708 * @param ExtiLine This parameter can be a combination of the following values:
709 * @arg @ref LL_EXTI_LINE_32
710 * @arg @ref LL_EXTI_LINE_33
711 * @arg @ref LL_EXTI_LINE_34
712 * @arg @ref LL_EXTI_LINE_35
713 * @arg @ref LL_EXTI_LINE_36
714 * @arg @ref LL_EXTI_LINE_37
715 * @arg @ref LL_EXTI_LINE_38
716 * @arg @ref LL_EXTI_LINE_39
717 * @arg @ref LL_EXTI_LINE_40
718 * @arg @ref LL_EXTI_LINE_41
719 * @arg @ref LL_EXTI_LINE_42
720 * @arg @ref LL_EXTI_LINE_43
721 * @arg @ref LL_EXTI_LINE_44
722 * @arg @ref LL_EXTI_LINE_45
723 * @arg @ref LL_EXTI_LINE_46
724 * @arg @ref LL_EXTI_LINE_47
725 * @arg @ref LL_EXTI_LINE_48
726 * @arg @ref LL_EXTI_LINE_49
727 * @arg @ref LL_EXTI_LINE_50
728 * @arg @ref LL_EXTI_LINE_51
729 * @arg @ref LL_EXTI_LINE_52
730 * @arg @ref LL_EXTI_LINE_53
731 * @arg @ref LL_EXTI_LINE_54
732 * @arg @ref LL_EXTI_LINE_55
733 * @arg @ref LL_EXTI_LINE_56
734 * @arg @ref LL_EXTI_LINE_57
735 * @arg @ref LL_EXTI_LINE_58
736 * @arg @ref LL_EXTI_LINE_62
737 * @arg @ref LL_EXTI_LINE_61
738 * @arg @ref LL_EXTI_LINE_62
739 * @arg @ref LL_EXTI_LINE_63
740 * @arg @ref LL_EXTI_LINE_ALL_32_63
741 * @retval None
742 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)743 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
744 {
745 SET_BIT(EXTI->EMR2, ExtiLine);
746 }
747
748 /**
749 * @brief Enable ExtiLine Event request for Lines in range 64 to 95
750 * @rmtoll EMR3 EMx LL_EXTI_EnableEvent_64_95
751 * @param ExtiLine This parameter can be a combination of the following values:
752 * @arg @ref LL_EXTI_LINE_64
753 * @arg @ref LL_EXTI_LINE_65
754 * @arg @ref LL_EXTI_LINE_66
755 * @arg @ref LL_EXTI_LINE_68
756 * @arg @ref LL_EXTI_LINE_69
757 * @arg @ref LL_EXTI_LINE_70
758 * @arg @ref LL_EXTI_LINE_71
759 * @arg @ref LL_EXTI_LINE_72
760 * @arg @ref LL_EXTI_LINE_73
761 * @arg @ref LL_EXTI_LINE_74
762 * @arg @ref LL_EXTI_LINE_77
763 * @arg @ref LL_EXTI_LINE_ALL_64_95
764 * @retval None
765 */
LL_EXTI_EnableEvent_64_95(uint32_t ExtiLine)766 __STATIC_INLINE void LL_EXTI_EnableEvent_64_95(uint32_t ExtiLine)
767 {
768 SET_BIT(EXTI->EMR3, ExtiLine);
769 }
770
771 /**
772 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
773 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
774 * @param ExtiLine This parameter can be one of the following values:
775 * @arg @ref LL_EXTI_LINE_0
776 * @arg @ref LL_EXTI_LINE_1
777 * @arg @ref LL_EXTI_LINE_2
778 * @arg @ref LL_EXTI_LINE_3
779 * @arg @ref LL_EXTI_LINE_4
780 * @arg @ref LL_EXTI_LINE_5
781 * @arg @ref LL_EXTI_LINE_6
782 * @arg @ref LL_EXTI_LINE_7
783 * @arg @ref LL_EXTI_LINE_8
784 * @arg @ref LL_EXTI_LINE_9
785 * @arg @ref LL_EXTI_LINE_10
786 * @arg @ref LL_EXTI_LINE_11
787 * @arg @ref LL_EXTI_LINE_12
788 * @arg @ref LL_EXTI_LINE_13
789 * @arg @ref LL_EXTI_LINE_14
790 * @arg @ref LL_EXTI_LINE_15
791 * @arg @ref LL_EXTI_LINE_17
792 * @arg @ref LL_EXTI_LINE_18
793 * @arg @ref LL_EXTI_LINE_19
794 * @arg @ref LL_EXTI_LINE_20
795 * @arg @ref LL_EXTI_LINE_21
796 * @arg @ref LL_EXTI_LINE_22
797 * @arg @ref LL_EXTI_LINE_23
798 * @arg @ref LL_EXTI_LINE_24
799 * @arg @ref LL_EXTI_LINE_25
800 * @arg @ref LL_EXTI_LINE_26
801 * @arg @ref LL_EXTI_LINE_27
802 * @arg @ref LL_EXTI_LINE_28
803 * @arg @ref LL_EXTI_LINE_29
804 * @arg @ref LL_EXTI_LINE_30
805 * @arg @ref LL_EXTI_LINE_31
806 * @arg @ref LL_EXTI_LINE_ALL_0_31
807 * @note Please check each device line mapping for EXTI Line availability
808 * @retval None
809 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)810 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
811 {
812 CLEAR_BIT(EXTI->EMR1, ExtiLine);
813 }
814
815 /**
816 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
817 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
818 * @param ExtiLine This parameter can be a combination of the following values:
819 * @arg @ref LL_EXTI_LINE_32
820 * @arg @ref LL_EXTI_LINE_33
821 * @arg @ref LL_EXTI_LINE_34
822 * @arg @ref LL_EXTI_LINE_35
823 * @arg @ref LL_EXTI_LINE_36
824 * @arg @ref LL_EXTI_LINE_37
825 * @arg @ref LL_EXTI_LINE_38
826 * @arg @ref LL_EXTI_LINE_39
827 * @arg @ref LL_EXTI_LINE_40
828 * @arg @ref LL_EXTI_LINE_41
829 * @arg @ref LL_EXTI_LINE_42
830 * @arg @ref LL_EXTI_LINE_43
831 * @arg @ref LL_EXTI_LINE_44
832 * @arg @ref LL_EXTI_LINE_45
833 * @arg @ref LL_EXTI_LINE_46
834 * @arg @ref LL_EXTI_LINE_47
835 * @arg @ref LL_EXTI_LINE_48
836 * @arg @ref LL_EXTI_LINE_49
837 * @arg @ref LL_EXTI_LINE_50
838 * @arg @ref LL_EXTI_LINE_51
839 * @arg @ref LL_EXTI_LINE_52
840 * @arg @ref LL_EXTI_LINE_53
841 * @arg @ref LL_EXTI_LINE_54
842 * @arg @ref LL_EXTI_LINE_55
843 * @arg @ref LL_EXTI_LINE_56
844 * @arg @ref LL_EXTI_LINE_57
845 * @arg @ref LL_EXTI_LINE_58
846 * @arg @ref LL_EXTI_LINE_62
847 * @arg @ref LL_EXTI_LINE_61
848 * @arg @ref LL_EXTI_LINE_62
849 * @arg @ref LL_EXTI_LINE_63
850 * @arg @ref LL_EXTI_LINE_ALL_32_63
851 * @retval None
852 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)853 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
854 {
855 CLEAR_BIT(EXTI->EMR2, ExtiLine);
856 }
857
858 /**
859 * @brief Disable ExtiLine Event request for Lines in range 64 to 95
860 * @rmtoll EMR3 EMx LL_EXTI_DisableEvent_64_95
861 * @param ExtiLine This parameter can be a combination of the following values:
862 * @arg @ref LL_EXTI_LINE_64
863 * @arg @ref LL_EXTI_LINE_65
864 * @arg @ref LL_EXTI_LINE_66
865 * @arg @ref LL_EXTI_LINE_68
866 * @arg @ref LL_EXTI_LINE_69
867 * @arg @ref LL_EXTI_LINE_70
868 * @arg @ref LL_EXTI_LINE_71
869 * @arg @ref LL_EXTI_LINE_72
870 * @arg @ref LL_EXTI_LINE_73
871 * @arg @ref LL_EXTI_LINE_74
872 * @arg @ref LL_EXTI_LINE_77
873 * @arg @ref LL_EXTI_LINE_ALL_64_95
874 * @retval None
875 */
LL_EXTI_DisableEvent_64_95(uint32_t ExtiLine)876 __STATIC_INLINE void LL_EXTI_DisableEvent_64_95(uint32_t ExtiLine)
877 {
878 CLEAR_BIT(EXTI->EMR3, ExtiLine);
879 }
880
881 /**
882 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
883 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
884 * @param ExtiLine This parameter can be one of the following values:
885 * @arg @ref LL_EXTI_LINE_0
886 * @arg @ref LL_EXTI_LINE_1
887 * @arg @ref LL_EXTI_LINE_2
888 * @arg @ref LL_EXTI_LINE_3
889 * @arg @ref LL_EXTI_LINE_4
890 * @arg @ref LL_EXTI_LINE_5
891 * @arg @ref LL_EXTI_LINE_6
892 * @arg @ref LL_EXTI_LINE_7
893 * @arg @ref LL_EXTI_LINE_8
894 * @arg @ref LL_EXTI_LINE_9
895 * @arg @ref LL_EXTI_LINE_10
896 * @arg @ref LL_EXTI_LINE_11
897 * @arg @ref LL_EXTI_LINE_12
898 * @arg @ref LL_EXTI_LINE_13
899 * @arg @ref LL_EXTI_LINE_14
900 * @arg @ref LL_EXTI_LINE_15
901 * @arg @ref LL_EXTI_LINE_17
902 * @arg @ref LL_EXTI_LINE_18
903 * @arg @ref LL_EXTI_LINE_19
904 * @arg @ref LL_EXTI_LINE_20
905 * @arg @ref LL_EXTI_LINE_21
906 * @arg @ref LL_EXTI_LINE_22
907 * @arg @ref LL_EXTI_LINE_23
908 * @arg @ref LL_EXTI_LINE_24
909 * @arg @ref LL_EXTI_LINE_25
910 * @arg @ref LL_EXTI_LINE_26
911 * @arg @ref LL_EXTI_LINE_27
912 * @arg @ref LL_EXTI_LINE_28
913 * @arg @ref LL_EXTI_LINE_29
914 * @arg @ref LL_EXTI_LINE_30
915 * @arg @ref LL_EXTI_LINE_31
916 * @arg @ref LL_EXTI_LINE_ALL_0_31
917 * @note Please check each device line mapping for EXTI Line availability
918 * @retval State of bit (1 or 0).
919 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)920 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
921 {
922 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
923 }
924
925 /**
926 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
927 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
928 * @param ExtiLine This parameter can be a combination of the following values:
929 * @arg @ref LL_EXTI_LINE_32
930 * @arg @ref LL_EXTI_LINE_33
931 * @arg @ref LL_EXTI_LINE_34
932 * @arg @ref LL_EXTI_LINE_35
933 * @arg @ref LL_EXTI_LINE_36
934 * @arg @ref LL_EXTI_LINE_37
935 * @arg @ref LL_EXTI_LINE_38
936 * @arg @ref LL_EXTI_LINE_39
937 * @arg @ref LL_EXTI_LINE_40
938 * @arg @ref LL_EXTI_LINE_41
939 * @arg @ref LL_EXTI_LINE_42
940 * @arg @ref LL_EXTI_LINE_43
941 * @arg @ref LL_EXTI_LINE_44
942 * @arg @ref LL_EXTI_LINE_45
943 * @arg @ref LL_EXTI_LINE_46
944 * @arg @ref LL_EXTI_LINE_47
945 * @arg @ref LL_EXTI_LINE_48
946 * @arg @ref LL_EXTI_LINE_49
947 * @arg @ref LL_EXTI_LINE_50
948 * @arg @ref LL_EXTI_LINE_51
949 * @arg @ref LL_EXTI_LINE_52
950 * @arg @ref LL_EXTI_LINE_53
951 * @arg @ref LL_EXTI_LINE_54
952 * @arg @ref LL_EXTI_LINE_55
953 * @arg @ref LL_EXTI_LINE_56
954 * @arg @ref LL_EXTI_LINE_57
955 * @arg @ref LL_EXTI_LINE_58
956 * @arg @ref LL_EXTI_LINE_62
957 * @arg @ref LL_EXTI_LINE_61
958 * @arg @ref LL_EXTI_LINE_62
959 * @arg @ref LL_EXTI_LINE_63
960 * @arg @ref LL_EXTI_LINE_ALL_32_63
961 * @retval State of bit (1 or 0).
962 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)963 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
964 {
965 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
966 }
967
968 /**
969 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 64 to 95
970 * @rmtoll EMR3 EMx LL_EXTI_IsEnabledEvent_64_95
971 * @param ExtiLine This parameter can be a combination of the following values:
972 * @arg @ref LL_EXTI_LINE_64
973 * @arg @ref LL_EXTI_LINE_65
974 * @arg @ref LL_EXTI_LINE_66
975 * @arg @ref LL_EXTI_LINE_68
976 * @arg @ref LL_EXTI_LINE_69
977 * @arg @ref LL_EXTI_LINE_70
978 * @arg @ref LL_EXTI_LINE_71
979 * @arg @ref LL_EXTI_LINE_72
980 * @arg @ref LL_EXTI_LINE_73
981 * @arg @ref LL_EXTI_LINE_74
982 * @arg @ref LL_EXTI_LINE_77
983 * @arg @ref LL_EXTI_LINE_ALL_64_95
984 * @retval State of bit (1 or 0).
985 */
LL_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine)986 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_64_95(uint32_t ExtiLine)
987 {
988 return ((READ_BIT(EXTI->EMR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
989 }
990
991 /**
992 * @}
993 */
994
995 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
996 * @{
997 */
998
999 /**
1000 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
1001 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1002 * generated on these lines. If a rising edge on a configurable interrupt
1003 * line occurs during a write operation in the EXTI_RTSR register, the
1004 * pending bit is not set.
1005 * Rising and falling edge triggers can be set for
1006 * the same interrupt line. In this case, both generate a trigger
1007 * condition.
1008 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
1009 * @param ExtiLine This parameter can be a combination of the following values:
1010 * @arg @ref LL_EXTI_LINE_0
1011 * @arg @ref LL_EXTI_LINE_1
1012 * @arg @ref LL_EXTI_LINE_2
1013 * @arg @ref LL_EXTI_LINE_3
1014 * @arg @ref LL_EXTI_LINE_4
1015 * @arg @ref LL_EXTI_LINE_5
1016 * @arg @ref LL_EXTI_LINE_6
1017 * @arg @ref LL_EXTI_LINE_7
1018 * @arg @ref LL_EXTI_LINE_8
1019 * @arg @ref LL_EXTI_LINE_9
1020 * @arg @ref LL_EXTI_LINE_10
1021 * @arg @ref LL_EXTI_LINE_11
1022 * @arg @ref LL_EXTI_LINE_12
1023 * @arg @ref LL_EXTI_LINE_13
1024 * @arg @ref LL_EXTI_LINE_14
1025 * @arg @ref LL_EXTI_LINE_15
1026 * @arg @ref LL_EXTI_LINE_20
1027 * @arg @ref LL_EXTI_LINE_21
1028 * @note Please check each device line mapping for EXTI Line availability
1029 * @retval None
1030 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)1031 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
1032 {
1033 SET_BIT(EXTI->RTSR1, ExtiLine);
1034 }
1035
1036 /**
1037 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1038 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1039 * generated on these lines. If a rising edge on a configurable interrupt
1040 * line occurs during a write operation in the EXTI_RTSR register, the
1041 * pending bit is not set.Rising and falling edge triggers can be set for
1042 * the same interrupt line. In this case, both generate a trigger
1043 * condition.
1044 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
1045 * @param ExtiLine This parameter can be a combination of the following values:
1046 * @arg @ref LL_EXTI_LINE_39
1047 * @arg @ref LL_EXTI_LINE_40
1048 * @arg @ref LL_EXTI_LINE_51
1049 * @arg @ref LL_EXTI_LINE_54
1050 * @arg @ref LL_EXTI_LINE_56
1051 * @retval None
1052 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)1053 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
1054 {
1055 SET_BIT(EXTI->RTSR2, ExtiLine);
1056 }
1057
1058 /**
1059 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 64 to 95
1060 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1061 * generated on these lines. If a rising edge on a configurable interrupt
1062 * line occurs during a write operation in the EXTI_RTSR register, the
1063 * pending bit is not set.Rising and falling edge triggers can be set for
1064 * the same interrupt line. In this case, both generate a trigger
1065 * condition.
1066 * @rmtoll RTSR3 RTx LL_EXTI_EnableRisingTrig_64_95
1067 * @param ExtiLine This parameter can be a combination of the following values:
1068 * @arg @ref LL_EXTI_LINE_66
1069 * @arg @ref LL_EXTI_LINE_68
1070 * @arg @ref LL_EXTI_LINE_69
1071 * @arg @ref LL_EXTI_LINE_70
1072 * @arg @ref LL_EXTI_LINE_71
1073 * @arg @ref LL_EXTI_LINE_72
1074 * @arg @ref LL_EXTI_LINE_73
1075 * @arg @ref LL_EXTI_LINE_74
1076 * @retval None
1077 */
LL_EXTI_EnableRisingTrig_64_95(uint32_t ExtiLine)1078 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_64_95(uint32_t ExtiLine)
1079 {
1080 SET_BIT(EXTI->RTSR3, ExtiLine);
1081 }
1082
1083
1084 /**
1085 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
1086 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1087 * generated on these lines. If a rising edge on a configurable interrupt
1088 * line occurs during a write operation in the EXTI_RTSR register, the
1089 * pending bit is not set.
1090 * Rising and falling edge triggers can be set for
1091 * the same interrupt line. In this case, both generate a trigger
1092 * condition.
1093 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
1094 * @param ExtiLine This parameter can be a combination of the following values:
1095 * @arg @ref LL_EXTI_LINE_0
1096 * @arg @ref LL_EXTI_LINE_1
1097 * @arg @ref LL_EXTI_LINE_2
1098 * @arg @ref LL_EXTI_LINE_3
1099 * @arg @ref LL_EXTI_LINE_4
1100 * @arg @ref LL_EXTI_LINE_5
1101 * @arg @ref LL_EXTI_LINE_6
1102 * @arg @ref LL_EXTI_LINE_7
1103 * @arg @ref LL_EXTI_LINE_8
1104 * @arg @ref LL_EXTI_LINE_9
1105 * @arg @ref LL_EXTI_LINE_10
1106 * @arg @ref LL_EXTI_LINE_11
1107 * @arg @ref LL_EXTI_LINE_12
1108 * @arg @ref LL_EXTI_LINE_13
1109 * @arg @ref LL_EXTI_LINE_14
1110 * @arg @ref LL_EXTI_LINE_15
1111 * @arg @ref LL_EXTI_LINE_20
1112 * @arg @ref LL_EXTI_LINE_21
1113 * @note Please check each device line mapping for EXTI Line availability
1114 * @retval None
1115 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)1116 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
1117 {
1118 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
1119
1120 }
1121
1122 /**
1123 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
1124 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1125 * generated on these lines. If a rising edge on a configurable interrupt
1126 * line occurs during a write operation in the EXTI_RTSR register, the
1127 * pending bit is not set.
1128 * Rising and falling edge triggers can be set for
1129 * the same interrupt line. In this case, both generate a trigger
1130 * condition.
1131 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
1132 * @param ExtiLine This parameter can be a combination of the following values:
1133 * @arg @ref LL_EXTI_LINE_39
1134 * @arg @ref LL_EXTI_LINE_40
1135 * @arg @ref LL_EXTI_LINE_51
1136 * @arg @ref LL_EXTI_LINE_54
1137 * @arg @ref LL_EXTI_LINE_56
1138 * @retval None
1139 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)1140 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
1141 {
1142 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
1143 }
1144
1145 /**
1146 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 64 to 95
1147 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1148 * generated on these lines. If a rising edge on a configurable interrupt
1149 * line occurs during a write operation in the EXTI_RTSR register, the
1150 * pending bit is not set.
1151 * Rising and falling edge triggers can be set for
1152 * the same interrupt line. In this case, both generate a trigger
1153 * condition.
1154 * @rmtoll RTSR3 RTx LL_EXTI_DisableRisingTrig_64_95
1155 * @param ExtiLine This parameter can be a combination of the following values:
1156 * @arg @ref LL_EXTI_LINE_66
1157 * @arg @ref LL_EXTI_LINE_68
1158 * @arg @ref LL_EXTI_LINE_69
1159 * @arg @ref LL_EXTI_LINE_70
1160 * @arg @ref LL_EXTI_LINE_71
1161 * @arg @ref LL_EXTI_LINE_72
1162 * @arg @ref LL_EXTI_LINE_73
1163 * @arg @ref LL_EXTI_LINE_74
1164 * @retval None
1165 */
LL_EXTI_DisableRisingTrig_64_95(uint32_t ExtiLine)1166 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_64_95(uint32_t ExtiLine)
1167 {
1168 CLEAR_BIT(EXTI->RTSR3, ExtiLine);
1169 }
1170
1171 /**
1172 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
1173 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
1174 * @param ExtiLine This parameter can be a combination of the following values:
1175 * @arg @ref LL_EXTI_LINE_0
1176 * @arg @ref LL_EXTI_LINE_1
1177 * @arg @ref LL_EXTI_LINE_2
1178 * @arg @ref LL_EXTI_LINE_3
1179 * @arg @ref LL_EXTI_LINE_4
1180 * @arg @ref LL_EXTI_LINE_5
1181 * @arg @ref LL_EXTI_LINE_6
1182 * @arg @ref LL_EXTI_LINE_7
1183 * @arg @ref LL_EXTI_LINE_8
1184 * @arg @ref LL_EXTI_LINE_9
1185 * @arg @ref LL_EXTI_LINE_10
1186 * @arg @ref LL_EXTI_LINE_11
1187 * @arg @ref LL_EXTI_LINE_12
1188 * @arg @ref LL_EXTI_LINE_13
1189 * @arg @ref LL_EXTI_LINE_14
1190 * @arg @ref LL_EXTI_LINE_15
1191 * @arg @ref LL_EXTI_LINE_20
1192 * @arg @ref LL_EXTI_LINE_21
1193 * @note Please check each device line mapping for EXTI Line availability
1194 * @retval State of bit (1 or 0).
1195 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)1196 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
1197 {
1198 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1199 }
1200
1201 /**
1202 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
1203 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
1204 * @param ExtiLine This parameter can be a combination of the following values:
1205 * @arg @ref LL_EXTI_LINE_39
1206 * @arg @ref LL_EXTI_LINE_40
1207 * @arg @ref LL_EXTI_LINE_51
1208 * @arg @ref LL_EXTI_LINE_54
1209 * @arg @ref LL_EXTI_LINE_56
1210 * @retval State of bit (1 or 0).
1211 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)1212 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
1213 {
1214 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1215 }
1216
1217 /**
1218 * @brief Check if rising edge trigger is enabled for Lines in range 64 to 95
1219 * @rmtoll RTSR3 RTx LL_EXTI_IsEnabledRisingTrig_64_95
1220 * @param ExtiLine This parameter can be a combination of the following values:
1221 * @arg @ref LL_EXTI_LINE_66
1222 * @arg @ref LL_EXTI_LINE_68
1223 * @arg @ref LL_EXTI_LINE_69
1224 * @arg @ref LL_EXTI_LINE_70
1225 * @arg @ref LL_EXTI_LINE_71
1226 * @arg @ref LL_EXTI_LINE_72
1227 * @arg @ref LL_EXTI_LINE_73
1228 * @arg @ref LL_EXTI_LINE_74
1229 * @retval State of bit (1 or 0).
1230 */
LL_EXTI_IsEnabledRisingTrig_64_95(uint32_t ExtiLine)1231 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_64_95(uint32_t ExtiLine)
1232 {
1233 return ((READ_BIT(EXTI->RTSR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1234 }
1235
1236 /**
1237 * @}
1238 */
1239
1240 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
1241 * @{
1242 */
1243
1244 /**
1245 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1246 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1247 * generated on these lines. If a falling edge on a configurable interrupt
1248 * line occurs during a write operation in the EXTI_FTSR register, the
1249 * pending bit is not set.
1250 * Rising and falling edge triggers can be set for
1251 * the same interrupt line. In this case, both generate a trigger
1252 * condition.
1253 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
1254 * @param ExtiLine This parameter can be a combination of the following values:
1255 * @arg @ref LL_EXTI_LINE_0
1256 * @arg @ref LL_EXTI_LINE_1
1257 * @arg @ref LL_EXTI_LINE_2
1258 * @arg @ref LL_EXTI_LINE_3
1259 * @arg @ref LL_EXTI_LINE_4
1260 * @arg @ref LL_EXTI_LINE_5
1261 * @arg @ref LL_EXTI_LINE_6
1262 * @arg @ref LL_EXTI_LINE_7
1263 * @arg @ref LL_EXTI_LINE_8
1264 * @arg @ref LL_EXTI_LINE_9
1265 * @arg @ref LL_EXTI_LINE_10
1266 * @arg @ref LL_EXTI_LINE_11
1267 * @arg @ref LL_EXTI_LINE_12
1268 * @arg @ref LL_EXTI_LINE_13
1269 * @arg @ref LL_EXTI_LINE_14
1270 * @arg @ref LL_EXTI_LINE_15
1271 * @arg @ref LL_EXTI_LINE_20
1272 * @arg @ref LL_EXTI_LINE_21
1273 * @note Please check each device line mapping for EXTI Line availability
1274 * @retval None
1275 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)1276 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
1277 {
1278 SET_BIT(EXTI->FTSR1, ExtiLine);
1279 }
1280
1281 /**
1282 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1283 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1284 * generated on these lines. If a Falling edge on a configurable interrupt
1285 * line occurs during a write operation in the EXTI_FTSR register, the
1286 * pending bit is not set.
1287 * Rising and falling edge triggers can be set for
1288 * the same interrupt line. In this case, both generate a trigger
1289 * condition.
1290 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
1291 * @param ExtiLine This parameter can be a combination of the following values:
1292 * @arg @ref LL_EXTI_LINE_39
1293 * @arg @ref LL_EXTI_LINE_40
1294 * @arg @ref LL_EXTI_LINE_51
1295 * @arg @ref LL_EXTI_LINE_54
1296 * @arg @ref LL_EXTI_LINE_56
1297 * @retval None
1298 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)1299 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
1300 {
1301 SET_BIT(EXTI->FTSR2, ExtiLine);
1302 }
1303
1304 /**
1305 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 64 to 95
1306 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1307 * generated on these lines. If a Falling edge on a configurable interrupt
1308 * line occurs during a write operation in the EXTI_FTSR register, the
1309 * pending bit is not set.
1310 * Rising and falling edge triggers can be set for
1311 * the same interrupt line. In this case, both generate a trigger
1312 * condition.
1313 * @rmtoll FTSR3 FTx LL_EXTI_EnableFallingTrig_64_95
1314 * @param ExtiLine This parameter can be a combination of the following values:
1315 * @arg @ref LL_EXTI_LINE_66
1316 * @arg @ref LL_EXTI_LINE_68
1317 * @arg @ref LL_EXTI_LINE_69
1318 * @arg @ref LL_EXTI_LINE_70
1319 * @arg @ref LL_EXTI_LINE_71
1320 * @arg @ref LL_EXTI_LINE_72
1321 * @arg @ref LL_EXTI_LINE_73
1322 * @arg @ref LL_EXTI_LINE_74
1323 * @retval None
1324 */
LL_EXTI_EnableFallingTrig_64_95(uint32_t ExtiLine)1325 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_64_95(uint32_t ExtiLine)
1326 {
1327 SET_BIT(EXTI->FTSR3, ExtiLine);
1328 }
1329
1330 /**
1331 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
1332 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1333 * generated on these lines. If a Falling edge on a configurable interrupt
1334 * line occurs during a write operation in the EXTI_FTSR register, the
1335 * pending bit is not set.
1336 * Rising and falling edge triggers can be set for the same interrupt line.
1337 * In this case, both generate a trigger condition.
1338 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
1339 * @param ExtiLine This parameter can be a combination of the following values:
1340 * @arg @ref LL_EXTI_LINE_0
1341 * @arg @ref LL_EXTI_LINE_1
1342 * @arg @ref LL_EXTI_LINE_2
1343 * @arg @ref LL_EXTI_LINE_3
1344 * @arg @ref LL_EXTI_LINE_4
1345 * @arg @ref LL_EXTI_LINE_5
1346 * @arg @ref LL_EXTI_LINE_6
1347 * @arg @ref LL_EXTI_LINE_7
1348 * @arg @ref LL_EXTI_LINE_8
1349 * @arg @ref LL_EXTI_LINE_9
1350 * @arg @ref LL_EXTI_LINE_10
1351 * @arg @ref LL_EXTI_LINE_11
1352 * @arg @ref LL_EXTI_LINE_12
1353 * @arg @ref LL_EXTI_LINE_13
1354 * @arg @ref LL_EXTI_LINE_14
1355 * @arg @ref LL_EXTI_LINE_15
1356 * @arg @ref LL_EXTI_LINE_20
1357 * @arg @ref LL_EXTI_LINE_21
1358 * @note Please check each device line mapping for EXTI Line availability
1359 * @retval None
1360 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1361 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1362 {
1363 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1364 }
1365
1366 /**
1367 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1368 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1369 * generated on these lines. If a Falling edge on a configurable interrupt
1370 * line occurs during a write operation in the EXTI_FTSR register, the
1371 * pending bit is not set.
1372 * Rising and falling edge triggers can be set for the same interrupt line.
1373 * In this case, both generate a trigger condition.
1374 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1375 * @param ExtiLine This parameter can be a combination of the following values:
1376 * @arg @ref LL_EXTI_LINE_39
1377 * @arg @ref LL_EXTI_LINE_40
1378 * @arg @ref LL_EXTI_LINE_51
1379 * @arg @ref LL_EXTI_LINE_54
1380 * @arg @ref LL_EXTI_LINE_56
1381 * @retval None
1382 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1383 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1384 {
1385 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1386 }
1387
1388 /**
1389 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 64 to 95
1390 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1391 * generated on these lines. If a Falling edge on a configurable interrupt
1392 * line occurs during a write operation in the EXTI_FTSR register, the
1393 * pending bit is not set.
1394 * Rising and falling edge triggers can be set for the same interrupt line.
1395 * In this case, both generate a trigger condition.
1396 * @rmtoll FTSR3 FTx LL_EXTI_DisableFallingTrig_64_95
1397 * @param ExtiLine This parameter can be a combination of the following values:
1398 * @arg @ref LL_EXTI_LINE_66
1399 * @arg @ref LL_EXTI_LINE_68
1400 * @arg @ref LL_EXTI_LINE_69
1401 * @arg @ref LL_EXTI_LINE_70
1402 * @arg @ref LL_EXTI_LINE_71
1403 * @arg @ref LL_EXTI_LINE_72
1404 * @arg @ref LL_EXTI_LINE_73
1405 * @arg @ref LL_EXTI_LINE_74
1406 * @retval None
1407 */
LL_EXTI_DisableFallingTrig_64_95(uint32_t ExtiLine)1408 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_64_95(uint32_t ExtiLine)
1409 {
1410 CLEAR_BIT(EXTI->FTSR3, ExtiLine);
1411 }
1412
1413 /**
1414 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1415 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1416 * @param ExtiLine This parameter can be a combination of the following values:
1417 * @arg @ref LL_EXTI_LINE_0
1418 * @arg @ref LL_EXTI_LINE_1
1419 * @arg @ref LL_EXTI_LINE_2
1420 * @arg @ref LL_EXTI_LINE_3
1421 * @arg @ref LL_EXTI_LINE_4
1422 * @arg @ref LL_EXTI_LINE_5
1423 * @arg @ref LL_EXTI_LINE_6
1424 * @arg @ref LL_EXTI_LINE_7
1425 * @arg @ref LL_EXTI_LINE_8
1426 * @arg @ref LL_EXTI_LINE_9
1427 * @arg @ref LL_EXTI_LINE_10
1428 * @arg @ref LL_EXTI_LINE_11
1429 * @arg @ref LL_EXTI_LINE_12
1430 * @arg @ref LL_EXTI_LINE_13
1431 * @arg @ref LL_EXTI_LINE_14
1432 * @arg @ref LL_EXTI_LINE_15
1433 * @arg @ref LL_EXTI_LINE_20
1434 * @arg @ref LL_EXTI_LINE_21
1435 * @note Please check each device line mapping for EXTI Line availability
1436 * @retval State of bit (1 or 0).
1437 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1438 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1439 {
1440 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1441 }
1442
1443 /**
1444 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1445 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1446 * @param ExtiLine This parameter can be a combination of the following values:
1447 * @arg @ref LL_EXTI_LINE_39
1448 * @arg @ref LL_EXTI_LINE_40
1449 * @arg @ref LL_EXTI_LINE_51
1450 * @arg @ref LL_EXTI_LINE_54
1451 * @arg @ref LL_EXTI_LINE_56
1452 * @retval State of bit (1 or 0).
1453 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1454 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1455 {
1456 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1457 }
1458
1459 /**
1460 * @brief Check if falling edge trigger is enabled for Lines in range 64 to 95
1461 * @rmtoll FTSR3 FTx LL_EXTI_IsEnabledFallingTrig_64_95
1462 * @param ExtiLine This parameter can be a combination of the following values:
1463 * @arg @ref LL_EXTI_LINE_66
1464 * @arg @ref LL_EXTI_LINE_68
1465 * @arg @ref LL_EXTI_LINE_69
1466 * @arg @ref LL_EXTI_LINE_70
1467 * @arg @ref LL_EXTI_LINE_71
1468 * @arg @ref LL_EXTI_LINE_72
1469 * @arg @ref LL_EXTI_LINE_73
1470 * @arg @ref LL_EXTI_LINE_74
1471 * @retval State of bit (1 or 0).
1472 */
LL_EXTI_IsEnabledFallingTrig_64_95(uint32_t ExtiLine)1473 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_64_95(uint32_t ExtiLine)
1474 {
1475 return ((READ_BIT(EXTI->FTSR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1476 }
1477
1478 /**
1479 * @}
1480 */
1481
1482 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1483 * @{
1484 */
1485
1486 /**
1487 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1488 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
1489 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
1490 * resulting in an interrupt request generation.
1491 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
1492 * register (by writing a 1 into the bit)
1493 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1494 * @param ExtiLine This parameter can be a combination of the following values:
1495 * @arg @ref LL_EXTI_LINE_0
1496 * @arg @ref LL_EXTI_LINE_1
1497 * @arg @ref LL_EXTI_LINE_2
1498 * @arg @ref LL_EXTI_LINE_3
1499 * @arg @ref LL_EXTI_LINE_4
1500 * @arg @ref LL_EXTI_LINE_5
1501 * @arg @ref LL_EXTI_LINE_6
1502 * @arg @ref LL_EXTI_LINE_7
1503 * @arg @ref LL_EXTI_LINE_8
1504 * @arg @ref LL_EXTI_LINE_9
1505 * @arg @ref LL_EXTI_LINE_10
1506 * @arg @ref LL_EXTI_LINE_11
1507 * @arg @ref LL_EXTI_LINE_12
1508 * @arg @ref LL_EXTI_LINE_13
1509 * @arg @ref LL_EXTI_LINE_14
1510 * @arg @ref LL_EXTI_LINE_15
1511 * @arg @ref LL_EXTI_LINE_20
1512 * @arg @ref LL_EXTI_LINE_21
1513 * @note Please check each device line mapping for EXTI Line availability
1514 * @retval None
1515 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1516 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1517 {
1518 SET_BIT(EXTI->SWIER1, ExtiLine);
1519 }
1520
1521 /**
1522 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1523 * @note If the interrupt is enabled on this line in the EXTI_IMR2, writing a 1 to
1524 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1525 * resulting in an interrupt request generation.
1526 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1527 * register (by writing a 1 into the bit)
1528 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1529 * @param ExtiLine This parameter can be a combination of the following values:
1530 * @arg @ref LL_EXTI_LINE_39
1531 * @arg @ref LL_EXTI_LINE_40
1532 * @arg @ref LL_EXTI_LINE_51
1533 * @arg @ref LL_EXTI_LINE_54
1534 * @arg @ref LL_EXTI_LINE_56
1535 * @retval None
1536 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1537 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1538 {
1539 SET_BIT(EXTI->SWIER2, ExtiLine);
1540 }
1541
1542 /**
1543 * @brief Generate a software Interrupt Event for Lines in range 64 to 95
1544 * @note If the interrupt is enabled on this line in the EXTI_IMR3, writing a 1 to
1545 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR3
1546 * resulting in an interrupt request generation.
1547 * This bit is cleared by clearing the corresponding bit in the EXTI_PR3
1548 * register (by writing a 1 into the bit)
1549 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_64_95
1550 * @param ExtiLine This parameter can be a combination of the following values:
1551 * @arg @ref LL_EXTI_LINE_66
1552 * @arg @ref LL_EXTI_LINE_68
1553 * @arg @ref LL_EXTI_LINE_69
1554 * @arg @ref LL_EXTI_LINE_70
1555 * @arg @ref LL_EXTI_LINE_71
1556 * @arg @ref LL_EXTI_LINE_72
1557 * @arg @ref LL_EXTI_LINE_73
1558 * @arg @ref LL_EXTI_LINE_74
1559 * @retval None
1560 */
LL_EXTI_GenerateSWI_64_95(uint32_t ExtiLine)1561 __STATIC_INLINE void LL_EXTI_GenerateSWI_64_95(uint32_t ExtiLine)
1562 {
1563 SET_BIT(EXTI->SWIER3, ExtiLine);
1564 }
1565
1566 /**
1567 * @}
1568 */
1569
1570 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1571 * @{
1572 */
1573
1574 /**
1575 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 0 to 31
1576 * @note This bit is set when the falling edge event arrives on the interrupt
1577 * line. This bit is cleared by writing a 1 to the bit.
1578 * @rmtoll FPR1 FPIFx LL_EXTI_IsActiveFallingFlag_0_31
1579 * @param ExtiLine This parameter can be a combination of the following values:
1580 * @arg @ref LL_EXTI_LINE_0
1581 * @arg @ref LL_EXTI_LINE_1
1582 * @arg @ref LL_EXTI_LINE_2
1583 * @arg @ref LL_EXTI_LINE_3
1584 * @arg @ref LL_EXTI_LINE_4
1585 * @arg @ref LL_EXTI_LINE_5
1586 * @arg @ref LL_EXTI_LINE_6
1587 * @arg @ref LL_EXTI_LINE_7
1588 * @arg @ref LL_EXTI_LINE_8
1589 * @arg @ref LL_EXTI_LINE_9
1590 * @arg @ref LL_EXTI_LINE_10
1591 * @arg @ref LL_EXTI_LINE_11
1592 * @arg @ref LL_EXTI_LINE_12
1593 * @arg @ref LL_EXTI_LINE_13
1594 * @arg @ref LL_EXTI_LINE_14
1595 * @arg @ref LL_EXTI_LINE_15
1596 * @arg @ref LL_EXTI_LINE_20
1597 * @arg @ref LL_EXTI_LINE_21
1598 * @note Please check each device line mapping for EXTI Line availability
1599 * @retval State of bit (1 or 0).
1600 */
LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)1601 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)
1602 {
1603 return ((READ_BIT(EXTI->FPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1604 }
1605
1606 /**
1607 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1608 * @note This bit is set when the selected edge event arrives on the interrupt
1609 * line. This bit is cleared by writing a 1 to the bit.
1610 * @rmtoll FPR2 FPIFx LL_EXTI_IsActiveFallingFlag_32_63
1611 * @param ExtiLine This parameter can be a combination of the following values:
1612 * @arg @ref LL_EXTI_LINE_39
1613 * @arg @ref LL_EXTI_LINE_40
1614 * @arg @ref LL_EXTI_LINE_51
1615 * @arg @ref LL_EXTI_LINE_54
1616 * @arg @ref LL_EXTI_LINE_56
1617 * @retval State of bit (1 or 0).
1618 */
LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)1619 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)
1620 {
1621 return ((READ_BIT(EXTI->FPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1622 }
1623
1624 /**
1625 * @brief Check if the ExtLine Flag is set or not for Lines in range 64 to 95
1626 * @note This bit is set when the selected edge event arrives on the interrupt
1627 * line. This bit is cleared by writing a 1 to the bit.
1628 * @rmtoll FPR3 FPIFx LL_EXTI_IsActiveFallingFlag_64_95
1629 * @param ExtiLine This parameter can be a combination of the following values:
1630 * @arg @ref LL_EXTI_LINE_66
1631 * @arg @ref LL_EXTI_LINE_68
1632 * @arg @ref LL_EXTI_LINE_69
1633 * @arg @ref LL_EXTI_LINE_70
1634 * @arg @ref LL_EXTI_LINE_71
1635 * @arg @ref LL_EXTI_LINE_72
1636 * @arg @ref LL_EXTI_LINE_73
1637 * @arg @ref LL_EXTI_LINE_74
1638 * @retval State of bit (1 or 0).
1639 */
LL_EXTI_IsActiveFallingFlag_64_95(uint32_t ExtiLine)1640 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_64_95(uint32_t ExtiLine)
1641 {
1642 return ((READ_BIT(EXTI->FPR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1643 }
1644
1645 /**
1646 * @brief Read ExtLine Combination Falling Flag for Lines in range 0 to 31
1647 * @note This bit is set when the falling edge event arrives on the interrupt
1648 * line. This bit is cleared by writing a 1 to the bit.
1649 * @rmtoll FPR1 FPIFx LL_EXTI_ReadFallingFlag_0_31
1650 * @param ExtiLine This parameter can be a combination of the following values:
1651 * @arg @ref LL_EXTI_LINE_0
1652 * @arg @ref LL_EXTI_LINE_1
1653 * @arg @ref LL_EXTI_LINE_2
1654 * @arg @ref LL_EXTI_LINE_3
1655 * @arg @ref LL_EXTI_LINE_4
1656 * @arg @ref LL_EXTI_LINE_5
1657 * @arg @ref LL_EXTI_LINE_6
1658 * @arg @ref LL_EXTI_LINE_7
1659 * @arg @ref LL_EXTI_LINE_8
1660 * @arg @ref LL_EXTI_LINE_9
1661 * @arg @ref LL_EXTI_LINE_10
1662 * @arg @ref LL_EXTI_LINE_11
1663 * @arg @ref LL_EXTI_LINE_12
1664 * @arg @ref LL_EXTI_LINE_13
1665 * @arg @ref LL_EXTI_LINE_14
1666 * @arg @ref LL_EXTI_LINE_15
1667 * @arg @ref LL_EXTI_LINE_20
1668 * @arg @ref LL_EXTI_LINE_21
1669 * @note Please check each device line mapping for EXTI Line availability
1670 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1671 */
LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)1672 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)
1673 {
1674 return (uint32_t)(READ_BIT(EXTI->FPR1, ExtiLine));
1675 }
1676
1677 /**
1678 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1679 * @note This bit is set when the selected edge event arrives on the interrupt
1680 * line. This bit is cleared by writing a 1 to the bit.
1681 * @rmtoll FPR2 FPIFx LL_EXTI_ReadFallingFlag_32_63
1682 * @param ExtiLine This parameter can be a combination of the following values:
1683 * @arg @ref LL_EXTI_LINE_39
1684 * @arg @ref LL_EXTI_LINE_40
1685 * @arg @ref LL_EXTI_LINE_51
1686 * @arg @ref LL_EXTI_LINE_54
1687 * @arg @ref LL_EXTI_LINE_56
1688 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1689 */
LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)1690 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)
1691 {
1692 return (uint32_t)(READ_BIT(EXTI->FPR2, ExtiLine));
1693 }
1694
1695 /**
1696 * @brief Read ExtLine Combination Flag for Lines in range 64 to 95
1697 * @note This bit is set when the selected edge event arrives on the interrupt
1698 * line. This bit is cleared by writing a 1 to the bit.
1699 * @rmtoll FPR3 FPIFx LL_EXTI_ReadFallingFlag_64_95
1700 * @param ExtiLine This parameter can be a combination of the following values:
1701 * @arg @ref LL_EXTI_LINE_66
1702 * @arg @ref LL_EXTI_LINE_68
1703 * @arg @ref LL_EXTI_LINE_69
1704 * @arg @ref LL_EXTI_LINE_70
1705 * @arg @ref LL_EXTI_LINE_71
1706 * @arg @ref LL_EXTI_LINE_72
1707 * @arg @ref LL_EXTI_LINE_73
1708 * @arg @ref LL_EXTI_LINE_74
1709 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1710 */
LL_EXTI_ReadFallingFlag_64_95(uint32_t ExtiLine)1711 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_64_95(uint32_t ExtiLine)
1712 {
1713 return (uint32_t)(READ_BIT(EXTI->FPR3, ExtiLine));
1714 }
1715
1716
1717 /**
1718 * @brief Clear ExtLine Falling Flags for Lines in range 0 to 31
1719 * @note This bit is set when the falling edge event arrives on the interrupt
1720 * line. This bit is cleared by writing a 1 to the bit.
1721 * @rmtoll FPR1 FPIFx LL_EXTI_ClearFallingFlag_0_31
1722 * @param ExtiLine This parameter can be a combination of the following values:
1723 * @arg @ref LL_EXTI_LINE_0
1724 * @arg @ref LL_EXTI_LINE_1
1725 * @arg @ref LL_EXTI_LINE_2
1726 * @arg @ref LL_EXTI_LINE_3
1727 * @arg @ref LL_EXTI_LINE_4
1728 * @arg @ref LL_EXTI_LINE_5
1729 * @arg @ref LL_EXTI_LINE_6
1730 * @arg @ref LL_EXTI_LINE_7
1731 * @arg @ref LL_EXTI_LINE_8
1732 * @arg @ref LL_EXTI_LINE_9
1733 * @arg @ref LL_EXTI_LINE_10
1734 * @arg @ref LL_EXTI_LINE_11
1735 * @arg @ref LL_EXTI_LINE_12
1736 * @arg @ref LL_EXTI_LINE_13
1737 * @arg @ref LL_EXTI_LINE_14
1738 * @arg @ref LL_EXTI_LINE_15
1739 * @arg @ref LL_EXTI_LINE_20
1740 * @arg @ref LL_EXTI_LINE_21
1741 * @note Please check each device line mapping for EXTI Line availability
1742 * @retval None
1743 */
LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)1744 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)
1745 {
1746 WRITE_REG(EXTI->FPR1, ExtiLine);
1747 }
1748
1749 /**
1750 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1751 * @note This bit is set when the selected edge event arrives on the interrupt
1752 * line. This bit is cleared by writing a 1 to the bit.
1753 * @rmtoll FPR2 FPIFx LL_EXTI_ClearFallingFlag_32_63
1754 * @param ExtiLine This parameter can be a combination of the following values:
1755 * @arg @ref LL_EXTI_LINE_39
1756 * @arg @ref LL_EXTI_LINE_40
1757 * @arg @ref LL_EXTI_LINE_51
1758 * @arg @ref LL_EXTI_LINE_54
1759 * @arg @ref LL_EXTI_LINE_56
1760 * @retval None
1761 */
LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)1762 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)
1763 {
1764 WRITE_REG(EXTI->FPR2, ExtiLine);
1765 }
1766
1767 /**
1768 * @brief Clear ExtLine Flags for Lines in range 64 to 95
1769 * @note This bit is set when the selected edge event arrives on the interrupt
1770 * line. This bit is cleared by writing a 1 to the bit.
1771 * @rmtoll FPR3 FPIFx LL_EXTI_ClearFallingFlag_64_95
1772 * @param ExtiLine This parameter can be a combination of the following values:
1773 * @arg @ref LL_EXTI_LINE_66
1774 * @arg @ref LL_EXTI_LINE_68
1775 * @arg @ref LL_EXTI_LINE_69
1776 * @arg @ref LL_EXTI_LINE_70
1777 * @arg @ref LL_EXTI_LINE_71
1778 * @arg @ref LL_EXTI_LINE_72
1779 * @arg @ref LL_EXTI_LINE_73
1780 * @arg @ref LL_EXTI_LINE_74
1781 * @retval None
1782 */
LL_EXTI_ClearFallingFlag_64_95(uint32_t ExtiLine)1783 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_64_95(uint32_t ExtiLine)
1784 {
1785 WRITE_REG(EXTI->FPR3, ExtiLine);
1786 }
1787
1788 /**
1789 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 0 to 31
1790 * @note This bit is set when the Rising edge event arrives on the interrupt
1791 * line. This bit is cleared by writing a 1 to the bit.
1792 * @rmtoll RPR1 RPIFx LL_EXTI_IsActiveRisingFlag_0_31
1793 * @param ExtiLine This parameter can be a combination of the following values:
1794 * @arg @ref LL_EXTI_LINE_0
1795 * @arg @ref LL_EXTI_LINE_1
1796 * @arg @ref LL_EXTI_LINE_2
1797 * @arg @ref LL_EXTI_LINE_3
1798 * @arg @ref LL_EXTI_LINE_4
1799 * @arg @ref LL_EXTI_LINE_5
1800 * @arg @ref LL_EXTI_LINE_6
1801 * @arg @ref LL_EXTI_LINE_7
1802 * @arg @ref LL_EXTI_LINE_8
1803 * @arg @ref LL_EXTI_LINE_9
1804 * @arg @ref LL_EXTI_LINE_10
1805 * @arg @ref LL_EXTI_LINE_11
1806 * @arg @ref LL_EXTI_LINE_12
1807 * @arg @ref LL_EXTI_LINE_13
1808 * @arg @ref LL_EXTI_LINE_14
1809 * @arg @ref LL_EXTI_LINE_15
1810 * @arg @ref LL_EXTI_LINE_20
1811 * @arg @ref LL_EXTI_LINE_21
1812 * @note Please check each device line mapping for EXTI Line availability
1813 * @retval State of bit (1 or 0).
1814 */
LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)1815 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)
1816 {
1817 return ((READ_BIT(EXTI->RPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1818 }
1819
1820 /**
1821 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 32 to 63
1822 * @note This bit is set when the Rising edge event arrives on the interrupt
1823 * line. This bit is cleared by writing a 1 to the bit.
1824 * @rmtoll RPR2 RPIFx LL_EXTI_IsActiveRisingFlag_32_63
1825 * @param ExtiLine This parameter can be a combination of the following values:
1826 * @arg @ref LL_EXTI_LINE_39
1827 * @arg @ref LL_EXTI_LINE_40
1828 * @arg @ref LL_EXTI_LINE_51
1829 * @arg @ref LL_EXTI_LINE_54
1830 * @arg @ref LL_EXTI_LINE_56
1831 * @note Please check each device line mapping for EXTI Line availability
1832 * @retval State of bit (1 or 0).
1833 */
LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)1834 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)
1835 {
1836 return ((READ_BIT(EXTI->RPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1837 }
1838
1839 /**
1840 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 64 to 95
1841 * @note This bit is set when the Rising edge event arrives on the interrupt
1842 * line. This bit is cleared by writing a 1 to the bit.
1843 * @rmtoll RPR3 RPIFx LL_EXTI_IsActiveRisingFlag_64_95
1844 * @param ExtiLine This parameter can be a combination of the following values:
1845 * @arg @ref LL_EXTI_LINE_66
1846 * @arg @ref LL_EXTI_LINE_68
1847 * @arg @ref LL_EXTI_LINE_69
1848 * @arg @ref LL_EXTI_LINE_70
1849 * @arg @ref LL_EXTI_LINE_71
1850 * @arg @ref LL_EXTI_LINE_72
1851 * @arg @ref LL_EXTI_LINE_73
1852 * @arg @ref LL_EXTI_LINE_74
1853 * @note Please check each device line mapping for EXTI Line availability
1854 * @retval State of bit (1 or 0).
1855 */
LL_EXTI_IsActiveRisingFlag_64_95(uint32_t ExtiLine)1856 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_64_95(uint32_t ExtiLine)
1857 {
1858 return ((READ_BIT(EXTI->RPR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1859 }
1860
1861 /**
1862 * @brief Read ExtLine Combination Rising Flag for Lines in range 0 to 31
1863 * @note This bit is set when the Rising edge event arrives on the interrupt
1864 * line. This bit is cleared by writing a 1 to the bit.
1865 * @rmtoll RPR1 RPIFx LL_EXTI_ReadRisingFlag_0_31
1866 * @param ExtiLine This parameter can be a combination of the following values:
1867 * @arg @ref LL_EXTI_LINE_0
1868 * @arg @ref LL_EXTI_LINE_1
1869 * @arg @ref LL_EXTI_LINE_2
1870 * @arg @ref LL_EXTI_LINE_3
1871 * @arg @ref LL_EXTI_LINE_4
1872 * @arg @ref LL_EXTI_LINE_5
1873 * @arg @ref LL_EXTI_LINE_6
1874 * @arg @ref LL_EXTI_LINE_7
1875 * @arg @ref LL_EXTI_LINE_8
1876 * @arg @ref LL_EXTI_LINE_9
1877 * @arg @ref LL_EXTI_LINE_10
1878 * @arg @ref LL_EXTI_LINE_11
1879 * @arg @ref LL_EXTI_LINE_12
1880 * @arg @ref LL_EXTI_LINE_13
1881 * @arg @ref LL_EXTI_LINE_14
1882 * @arg @ref LL_EXTI_LINE_15
1883 * @arg @ref LL_EXTI_LINE_20
1884 * @arg @ref LL_EXTI_LINE_21
1885 * @note Please check each device line mapping for EXTI Line availability
1886 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1887 */
LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)1888 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)
1889 {
1890 return (uint32_t)(READ_BIT(EXTI->RPR1, ExtiLine));
1891 }
1892
1893 /**
1894 * @brief Read ExtLine Combination Rising Flag for Lines in range 32 to 63
1895 * @note This bit is set when the Rising edge event arrives on the interrupt
1896 * line. This bit is cleared by writing a 1 to the bit.
1897 * @rmtoll RPR2 RPIFx LL_EXTI_ReadRisingFlag_32_63
1898 * @param ExtiLine This parameter can be a combination of the following values:
1899 * @arg @ref LL_EXTI_LINE_39
1900 * @arg @ref LL_EXTI_LINE_40
1901 * @arg @ref LL_EXTI_LINE_51
1902 * @arg @ref LL_EXTI_LINE_54
1903 * @arg @ref LL_EXTI_LINE_56
1904 * @note Please check each device line mapping for EXTI Line availability
1905 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1906 */
LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)1907 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)
1908 {
1909 return (uint32_t)(READ_BIT(EXTI->RPR2, ExtiLine));
1910 }
1911
1912 /**
1913 * @brief Read ExtLine Combination Rising Flag for Lines in range 64 to 95
1914 * @note This bit is set when the Rising edge event arrives on the interrupt
1915 * line. This bit is cleared by writing a 1 to the bit.
1916 * @rmtoll RPR3 RPIFx LL_EXTI_ReadRisingFlag_64_95
1917 * @param ExtiLine This parameter can be a combination of the following values:
1918 * @arg @ref LL_EXTI_LINE_66
1919 * @arg @ref LL_EXTI_LINE_68
1920 * @arg @ref LL_EXTI_LINE_69
1921 * @arg @ref LL_EXTI_LINE_70
1922 * @arg @ref LL_EXTI_LINE_71
1923 * @arg @ref LL_EXTI_LINE_72
1924 * @arg @ref LL_EXTI_LINE_73
1925 * @arg @ref LL_EXTI_LINE_74
1926 * @note Please check each device line mapping for EXTI Line availability
1927 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1928 */
LL_EXTI_ReadRisingFlag_64_95(uint32_t ExtiLine)1929 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_64_95(uint32_t ExtiLine)
1930 {
1931 return (uint32_t)(READ_BIT(EXTI->RPR3, ExtiLine));
1932 }
1933
1934 /**
1935 * @brief Clear ExtLine Rising Flags for Lines in range 0 to 31
1936 * @note This bit is set when the Rising edge event arrives on the interrupt
1937 * line. This bit is cleared by writing a 1 to the bit.
1938 * @rmtoll RPR1 RPIFx LL_EXTI_ClearRisingFlag_0_31
1939 * @param ExtiLine This parameter can be a combination of the following values:
1940 * @arg @ref LL_EXTI_LINE_0
1941 * @arg @ref LL_EXTI_LINE_1
1942 * @arg @ref LL_EXTI_LINE_2
1943 * @arg @ref LL_EXTI_LINE_3
1944 * @arg @ref LL_EXTI_LINE_4
1945 * @arg @ref LL_EXTI_LINE_5
1946 * @arg @ref LL_EXTI_LINE_6
1947 * @arg @ref LL_EXTI_LINE_7
1948 * @arg @ref LL_EXTI_LINE_8
1949 * @arg @ref LL_EXTI_LINE_9
1950 * @arg @ref LL_EXTI_LINE_10
1951 * @arg @ref LL_EXTI_LINE_11
1952 * @arg @ref LL_EXTI_LINE_12
1953 * @arg @ref LL_EXTI_LINE_13
1954 * @arg @ref LL_EXTI_LINE_14
1955 * @arg @ref LL_EXTI_LINE_15
1956 * @arg @ref LL_EXTI_LINE_20
1957 * @arg @ref LL_EXTI_LINE_21
1958 * @note Please check each device line mapping for EXTI Line availability
1959 * @retval None
1960 */
LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)1961 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)
1962 {
1963 WRITE_REG(EXTI->RPR1, ExtiLine);
1964 }
1965
1966 /**
1967 * @brief Clear ExtLine Rising Flags for Lines in range 32 to 63
1968 * @note This bit is set when the Rising edge event arrives on the interrupt
1969 * line. This bit is cleared by writing a 1 to the bit.
1970 * @rmtoll RPR2 RPIFx LL_EXTI_ClearRisingFlag_32_63
1971 * @param ExtiLine This parameter can be a combination of the following values:
1972 * @arg @ref LL_EXTI_LINE_39
1973 * @arg @ref LL_EXTI_LINE_40
1974 * @arg @ref LL_EXTI_LINE_51
1975 * @arg @ref LL_EXTI_LINE_54
1976 * @arg @ref LL_EXTI_LINE_56
1977 * @note Please check each device line mapping for EXTI Line availability
1978 * @retval None
1979 */
LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)1980 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)
1981 {
1982 WRITE_REG(EXTI->RPR2, ExtiLine);
1983 }
1984
1985 /**
1986 * @brief Clear ExtLine Rising Flags for Lines in range 64 to 95
1987 * @note This bit is set when the Rising edge event arrives on the interrupt
1988 * line. This bit is cleared by writing a 1 to the bit.
1989 * @rmtoll RPR3 RPIFx LL_EXTI_ClearRisingFlag_64_95
1990 * @param ExtiLine This parameter can be a combination of the following values:
1991 * @arg @ref LL_EXTI_LINE_66
1992 * @arg @ref LL_EXTI_LINE_68
1993 * @arg @ref LL_EXTI_LINE_69
1994 * @arg @ref LL_EXTI_LINE_70
1995 * @arg @ref LL_EXTI_LINE_71
1996 * @arg @ref LL_EXTI_LINE_72
1997 * @arg @ref LL_EXTI_LINE_73
1998 * @arg @ref LL_EXTI_LINE_74
1999 * @note Please check each device line mapping for EXTI Line availability
2000 * @retval None
2001 */
LL_EXTI_ClearRisingFlag_64_95(uint32_t ExtiLine)2002 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_64_95(uint32_t ExtiLine)
2003 {
2004 WRITE_REG(EXTI->RPR3, ExtiLine);
2005 }
2006
2007 /**
2008 * @}
2009 */
2010 /** @defgroup EXTI_LL_EF_Config EF configuration functions
2011 * @{
2012 */
2013
2014 /**
2015 * @brief Configure source input for the EXTI external interrupt.
2016 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
2017 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
2018 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
2019 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
2020 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
2021 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
2022 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
2023 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
2024 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
2025 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
2026 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
2027 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
2028 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
2029 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
2030 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
2031 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
2032 * @param Port This parameter can be one of the following values:
2033 * @arg @ref LL_EXTI_EXTI_PORTA
2034 * @arg @ref LL_EXTI_EXTI_PORTB
2035 * @arg @ref LL_EXTI_EXTI_PORTC
2036 * @arg @ref LL_EXTI_EXTI_PORTD
2037 * @arg @ref LL_EXTI_EXTI_PORTE
2038 * @arg @ref LL_EXTI_EXTI_PORTF
2039 * @arg @ref LL_EXTI_EXTI_PORTG
2040 * @arg @ref LL_EXTI_EXTI_PORTH
2041 * @arg @ref LL_EXTI_EXTI_PORTN
2042 * @arg @ref LL_EXTI_EXTI_PORTO
2043 * @arg @ref LL_EXTI_EXTI_PORTP
2044 * @arg @ref LL_EXTI_EXTI_PORTQ
2045 * @param Line This parameter can be one of the following values:
2046 * @arg @ref LL_EXTI_EXTI_LINE0
2047 * @arg @ref LL_EXTI_EXTI_LINE1
2048 * @arg @ref LL_EXTI_EXTI_LINE2
2049 * @arg @ref LL_EXTI_EXTI_LINE3
2050 * @arg @ref LL_EXTI_EXTI_LINE4
2051 * @arg @ref LL_EXTI_EXTI_LINE5
2052 * @arg @ref LL_EXTI_EXTI_LINE6
2053 * @arg @ref LL_EXTI_EXTI_LINE7
2054 * @arg @ref LL_EXTI_EXTI_LINE8
2055 * @arg @ref LL_EXTI_EXTI_LINE9
2056 * @arg @ref LL_EXTI_EXTI_LINE10
2057 * @arg @ref LL_EXTI_EXTI_LINE11
2058 * @arg @ref LL_EXTI_EXTI_LINE12
2059 * @arg @ref LL_EXTI_EXTI_LINE13
2060 * @arg @ref LL_EXTI_EXTI_LINE14
2061 * @arg @ref LL_EXTI_EXTI_LINE15
2062 * @retval None
2063 */
LL_EXTI_SetEXTISource(uint32_t Port,uint32_t Line)2064 __STATIC_INLINE void LL_EXTI_SetEXTISource(uint32_t Port, uint32_t Line)
2065 {
2066 MODIFY_REG(EXTI->EXTICR[Line & 0x03U], EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT),
2067 Port << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
2068 }
2069
2070 /**
2071 * @brief Get the configured defined for specific EXTI Line
2072 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_GetEXTISource\n
2073 * EXTI_EXTICR1 EXTI1 LL_EXTI_GetEXTISource\n
2074 * EXTI_EXTICR1 EXTI2 LL_EXTI_GetEXTISource\n
2075 * EXTI_EXTICR1 EXTI3 LL_EXTI_GetEXTISource\n
2076 * EXTI_EXTICR2 EXTI4 LL_EXTI_GetEXTISource\n
2077 * EXTI_EXTICR2 EXTI5 LL_EXTI_GetEXTISource\n
2078 * EXTI_EXTICR2 EXTI6 LL_EXTI_GetEXTISource\n
2079 * EXTI_EXTICR2 EXTI7 LL_EXTI_GetEXTISource\n
2080 * EXTI_EXTICR3 EXTI8 LL_EXTI_GetEXTISource\n
2081 * EXTI_EXTICR3 EXTI9 LL_EXTI_GetEXTISource\n
2082 * EXTI_EXTICR3 EXTI10 LL_EXTI_GetEXTISource\n
2083 * EXTI_EXTICR3 EXTI11 LL_EXTI_GetEXTISource\n
2084 * EXTI_EXTICR4 EXTI12 LL_EXTI_GetEXTISource\n
2085 * EXTI_EXTICR4 EXTI13 LL_EXTI_GetEXTISource\n
2086 * EXTI_EXTICR4 EXTI14 LL_EXTI_GetEXTISource\n
2087 * EXTI_EXTICR4 EXTI15 LL_EXTI_GetEXTISource
2088 * @param Line This parameter can be one of the following values:
2089 * @arg @ref LL_EXTI_EXTI_LINE0
2090 * @arg @ref LL_EXTI_EXTI_LINE1
2091 * @arg @ref LL_EXTI_EXTI_LINE2
2092 * @arg @ref LL_EXTI_EXTI_LINE3
2093 * @arg @ref LL_EXTI_EXTI_LINE4
2094 * @arg @ref LL_EXTI_EXTI_LINE5
2095 * @arg @ref LL_EXTI_EXTI_LINE6
2096 * @arg @ref LL_EXTI_EXTI_LINE7
2097 * @arg @ref LL_EXTI_EXTI_LINE8
2098 * @arg @ref LL_EXTI_EXTI_LINE9
2099 * @arg @ref LL_EXTI_EXTI_LINE10
2100 * @arg @ref LL_EXTI_EXTI_LINE11
2101 * @arg @ref LL_EXTI_EXTI_LINE12
2102 * @arg @ref LL_EXTI_EXTI_LINE13
2103 * @arg @ref LL_EXTI_EXTI_LINE14
2104 * @arg @ref LL_EXTI_EXTI_LINE15
2105 * @retval Returned value can be one of the following values:
2106 * @arg @ref LL_EXTI_EXTI_PORTA
2107 * @arg @ref LL_EXTI_EXTI_PORTB
2108 * @arg @ref LL_EXTI_EXTI_PORTC
2109 * @arg @ref LL_EXTI_EXTI_PORTD
2110 * @arg @ref LL_EXTI_EXTI_PORTE
2111 * @arg @ref LL_EXTI_EXTI_PORTF
2112 * @arg @ref LL_EXTI_EXTI_PORTG
2113 * @arg @ref LL_EXTI_EXTI_PORTH
2114 * @arg @ref LL_EXTI_EXTI_PORTN
2115 * @arg @ref LL_EXTI_EXTI_PORTO
2116 * @arg @ref LL_EXTI_EXTI_PORTP
2117 * @arg @ref LL_EXTI_EXTI_PORTQ
2118 */
LL_EXTI_GetEXTISource(uint32_t Line)2119 __STATIC_INLINE uint32_t LL_EXTI_GetEXTISource(uint32_t Line)
2120 {
2121 return (uint32_t)(READ_BIT(EXTI->EXTICR[Line & 0x03U],
2122 (EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT))) >> (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
2123 }
2124 /**
2125 * @}
2126 */
2127
2128 /** @defgroup EXTI_LL_EF_Secure_Management Secure_Management
2129 * @{
2130 */
2131
2132 #if defined CPU_IN_SECURE_STATE
2133
2134 /**
2135 * @brief Enable ExtiLine Secure attribute for Lines in range 0 to 31
2136 * @rmtoll SECCFGR1 SECx LL_EXTI_EnableSecure_0_31
2137 * @param ExtiLine This parameter can be one of the following values:
2138 * @arg @ref LL_EXTI_LINE_0
2139 * @arg @ref LL_EXTI_LINE_1
2140 * @arg @ref LL_EXTI_LINE_2
2141 * @arg @ref LL_EXTI_LINE_3
2142 * @arg @ref LL_EXTI_LINE_4
2143 * @arg @ref LL_EXTI_LINE_5
2144 * @arg @ref LL_EXTI_LINE_6
2145 * @arg @ref LL_EXTI_LINE_7
2146 * @arg @ref LL_EXTI_LINE_8
2147 * @arg @ref LL_EXTI_LINE_9
2148 * @arg @ref LL_EXTI_LINE_10
2149 * @arg @ref LL_EXTI_LINE_11
2150 * @arg @ref LL_EXTI_LINE_12
2151 * @arg @ref LL_EXTI_LINE_13
2152 * @arg @ref LL_EXTI_LINE_14
2153 * @arg @ref LL_EXTI_LINE_15
2154 * @arg @ref LL_EXTI_LINE_17
2155 * @arg @ref LL_EXTI_LINE_18
2156 * @arg @ref LL_EXTI_LINE_19
2157 * @arg @ref LL_EXTI_LINE_20
2158 * @arg @ref LL_EXTI_LINE_21
2159 * @arg @ref LL_EXTI_LINE_22
2160 * @arg @ref LL_EXTI_LINE_23
2161 * @arg @ref LL_EXTI_LINE_24
2162 * @arg @ref LL_EXTI_LINE_25
2163 * @arg @ref LL_EXTI_LINE_26
2164 * @arg @ref LL_EXTI_LINE_27
2165 * @arg @ref LL_EXTI_LINE_28
2166 * @arg @ref LL_EXTI_LINE_29
2167 * @arg @ref LL_EXTI_LINE_30
2168 * @arg @ref LL_EXTI_LINE_31
2169 * @arg @ref LL_EXTI_LINE_ALL_0_31
2170 * @note Please check each device line mapping for EXTI Line availability
2171 * @retval None
2172 */
LL_EXTI_EnableSecure_0_31(uint32_t ExtiLine)2173 __STATIC_INLINE void LL_EXTI_EnableSecure_0_31(uint32_t ExtiLine)
2174 {
2175 SET_BIT(EXTI->SECCFGR1, ExtiLine);
2176 }
2177
2178 /**
2179 * @brief Enable ExtiLine Secure attribute for Lines in range 32 to 63
2180 * @rmtoll SECCFGR2 SECx LL_EXTI_EnableSecure_32_63
2181 * @param ExtiLine This parameter can be one of the following values:
2182 * @arg @ref LL_EXTI_LINE_32
2183 * @arg @ref LL_EXTI_LINE_33
2184 * @arg @ref LL_EXTI_LINE_34
2185 * @arg @ref LL_EXTI_LINE_35
2186 * @arg @ref LL_EXTI_LINE_36
2187 * @arg @ref LL_EXTI_LINE_37
2188 * @arg @ref LL_EXTI_LINE_38
2189 * @arg @ref LL_EXTI_LINE_39
2190 * @arg @ref LL_EXTI_LINE_40
2191 * @arg @ref LL_EXTI_LINE_41
2192 * @arg @ref LL_EXTI_LINE_42
2193 * @arg @ref LL_EXTI_LINE_43
2194 * @arg @ref LL_EXTI_LINE_44
2195 * @arg @ref LL_EXTI_LINE_45
2196 * @arg @ref LL_EXTI_LINE_46
2197 * @arg @ref LL_EXTI_LINE_47
2198 * @arg @ref LL_EXTI_LINE_48
2199 * @arg @ref LL_EXTI_LINE_49
2200 * @arg @ref LL_EXTI_LINE_50
2201 * @arg @ref LL_EXTI_LINE_51
2202 * @arg @ref LL_EXTI_LINE_52
2203 * @arg @ref LL_EXTI_LINE_53
2204 * @arg @ref LL_EXTI_LINE_54
2205 * @arg @ref LL_EXTI_LINE_55
2206 * @arg @ref LL_EXTI_LINE_56
2207 * @arg @ref LL_EXTI_LINE_57
2208 * @arg @ref LL_EXTI_LINE_58
2209 * @arg @ref LL_EXTI_LINE_62
2210 * @arg @ref LL_EXTI_LINE_61
2211 * @arg @ref LL_EXTI_LINE_62
2212 * @arg @ref LL_EXTI_LINE_63
2213 * @arg @ref LL_EXTI_LINE_ALL_32_63
2214 * @note Please check each device line mapping for EXTI Line availability
2215 * @retval None
2216 */
LL_EXTI_EnableSecure_32_63(uint32_t ExtiLine)2217 __STATIC_INLINE void LL_EXTI_EnableSecure_32_63(uint32_t ExtiLine)
2218 {
2219 SET_BIT(EXTI->SECCFGR2, ExtiLine);
2220 }
2221
2222 /**
2223 * @brief Enable ExtiLine Secure attribute for Lines in range 64 to 95
2224 * @rmtoll SECCFGR3 SECx LL_EXTI_EnableSecure_64_95
2225 * @param ExtiLine This parameter can be one of the following values:
2226 * @arg @ref LL_EXTI_LINE_64
2227 * @arg @ref LL_EXTI_LINE_65
2228 * @arg @ref LL_EXTI_LINE_66
2229 * @arg @ref LL_EXTI_LINE_68
2230 * @arg @ref LL_EXTI_LINE_69
2231 * @arg @ref LL_EXTI_LINE_70
2232 * @arg @ref LL_EXTI_LINE_71
2233 * @arg @ref LL_EXTI_LINE_72
2234 * @arg @ref LL_EXTI_LINE_73
2235 * @arg @ref LL_EXTI_LINE_74
2236 * @arg @ref LL_EXTI_LINE_77
2237 * @arg @ref LL_EXTI_LINE_ALL_64_95
2238 * @note Please check each device line mapping for EXTI Line availability
2239 * @retval None
2240 */
LL_EXTI_EnableSecure_64_95(uint32_t ExtiLine)2241 __STATIC_INLINE void LL_EXTI_EnableSecure_64_95(uint32_t ExtiLine)
2242 {
2243 SET_BIT(EXTI->SECCFGR3, ExtiLine);
2244 }
2245
2246 /**
2247 * @brief Disable ExtiLine Secure attribute for Lines in range 0 to 31
2248 * @rmtoll SECCFGR1 SECx LL_EXTI_DisableSecure_0_31
2249 * @param ExtiLine This parameter can be one of the following values:
2250 * @arg @ref LL_EXTI_LINE_0
2251 * @arg @ref LL_EXTI_LINE_1
2252 * @arg @ref LL_EXTI_LINE_2
2253 * @arg @ref LL_EXTI_LINE_3
2254 * @arg @ref LL_EXTI_LINE_4
2255 * @arg @ref LL_EXTI_LINE_5
2256 * @arg @ref LL_EXTI_LINE_6
2257 * @arg @ref LL_EXTI_LINE_7
2258 * @arg @ref LL_EXTI_LINE_8
2259 * @arg @ref LL_EXTI_LINE_9
2260 * @arg @ref LL_EXTI_LINE_10
2261 * @arg @ref LL_EXTI_LINE_11
2262 * @arg @ref LL_EXTI_LINE_12
2263 * @arg @ref LL_EXTI_LINE_13
2264 * @arg @ref LL_EXTI_LINE_14
2265 * @arg @ref LL_EXTI_LINE_15
2266 * @arg @ref LL_EXTI_LINE_17
2267 * @arg @ref LL_EXTI_LINE_18
2268 * @arg @ref LL_EXTI_LINE_19
2269 * @arg @ref LL_EXTI_LINE_20
2270 * @arg @ref LL_EXTI_LINE_21
2271 * @arg @ref LL_EXTI_LINE_22
2272 * @arg @ref LL_EXTI_LINE_23
2273 * @arg @ref LL_EXTI_LINE_24
2274 * @arg @ref LL_EXTI_LINE_25
2275 * @arg @ref LL_EXTI_LINE_26
2276 * @arg @ref LL_EXTI_LINE_27
2277 * @arg @ref LL_EXTI_LINE_28
2278 * @arg @ref LL_EXTI_LINE_29
2279 * @arg @ref LL_EXTI_LINE_30
2280 * @arg @ref LL_EXTI_LINE_31
2281 * @arg @ref LL_EXTI_LINE_ALL_0_31
2282 * @note Please check each device line mapping for EXTI Line availability
2283 * @retval None
2284 */
LL_EXTI_DisableSecure_0_31(uint32_t ExtiLine)2285 __STATIC_INLINE void LL_EXTI_DisableSecure_0_31(uint32_t ExtiLine)
2286 {
2287 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine);
2288 }
2289
2290 /**
2291 * @brief Disable ExtiLine Secure attribute for Lines in range 32 to 63
2292 * @rmtoll SECCFGR2 SECx LL_EXTI_DisableSecure_32_63
2293 * @param ExtiLine This parameter can be one of the following values:
2294 * @arg @ref LL_EXTI_LINE_32
2295 * @arg @ref LL_EXTI_LINE_33
2296 * @arg @ref LL_EXTI_LINE_34
2297 * @arg @ref LL_EXTI_LINE_35
2298 * @arg @ref LL_EXTI_LINE_36
2299 * @arg @ref LL_EXTI_LINE_37
2300 * @arg @ref LL_EXTI_LINE_38
2301 * @arg @ref LL_EXTI_LINE_39
2302 * @arg @ref LL_EXTI_LINE_40
2303 * @arg @ref LL_EXTI_LINE_41
2304 * @arg @ref LL_EXTI_LINE_42
2305 * @arg @ref LL_EXTI_LINE_43
2306 * @arg @ref LL_EXTI_LINE_44
2307 * @arg @ref LL_EXTI_LINE_45
2308 * @arg @ref LL_EXTI_LINE_46
2309 * @arg @ref LL_EXTI_LINE_47
2310 * @arg @ref LL_EXTI_LINE_48
2311 * @arg @ref LL_EXTI_LINE_49
2312 * @arg @ref LL_EXTI_LINE_50
2313 * @arg @ref LL_EXTI_LINE_51
2314 * @arg @ref LL_EXTI_LINE_52
2315 * @arg @ref LL_EXTI_LINE_53
2316 * @arg @ref LL_EXTI_LINE_54
2317 * @arg @ref LL_EXTI_LINE_55
2318 * @arg @ref LL_EXTI_LINE_56
2319 * @arg @ref LL_EXTI_LINE_57
2320 * @arg @ref LL_EXTI_LINE_58
2321 * @arg @ref LL_EXTI_LINE_62
2322 * @arg @ref LL_EXTI_LINE_61
2323 * @arg @ref LL_EXTI_LINE_62
2324 * @arg @ref LL_EXTI_LINE_63
2325 * @arg @ref LL_EXTI_LINE_ALL_32_63
2326 * @note Please check each device line mapping for EXTI Line availability
2327 * @retval None
2328 */
LL_EXTI_DisableSecure_32_63(uint32_t ExtiLine)2329 __STATIC_INLINE void LL_EXTI_DisableSecure_32_63(uint32_t ExtiLine)
2330 {
2331 CLEAR_BIT(EXTI->SECCFGR2, ExtiLine);
2332 }
2333
2334 /**
2335 * @brief Disable ExtiLine Secure attribute for Lines in range 64 to 95
2336 * @rmtoll SECCFGR3 SECx LL_EXTI_DisableSecure_64_95
2337 * @param ExtiLine This parameter can be one of the following values:
2338 * @arg @ref LL_EXTI_LINE_64
2339 * @arg @ref LL_EXTI_LINE_65
2340 * @arg @ref LL_EXTI_LINE_66
2341 * @arg @ref LL_EXTI_LINE_68
2342 * @arg @ref LL_EXTI_LINE_69
2343 * @arg @ref LL_EXTI_LINE_70
2344 * @arg @ref LL_EXTI_LINE_71
2345 * @arg @ref LL_EXTI_LINE_72
2346 * @arg @ref LL_EXTI_LINE_73
2347 * @arg @ref LL_EXTI_LINE_74
2348 * @arg @ref LL_EXTI_LINE_77
2349 * @arg @ref LL_EXTI_LINE_ALL_64_95
2350 * @note Please check each device line mapping for EXTI Line availability
2351 * @retval None
2352 */
LL_EXTI_DisableSecure_64_95(uint32_t ExtiLine)2353 __STATIC_INLINE void LL_EXTI_DisableSecure_64_95(uint32_t ExtiLine)
2354 {
2355 CLEAR_BIT(EXTI->SECCFGR3, ExtiLine);
2356 }
2357 #endif /* CPU_IN_SECURE_STATE */
2358
2359 /**
2360 * @brief Indicate if ExtiLine Secure attribute is enabled for Lines in range 0 to 31
2361 * @rmtoll SECCFGR1 SECx LL_EXTI_IsEnabledSecure_0_31
2362 * @param ExtiLine This parameter can be one of the following values:
2363 * @arg @ref LL_EXTI_LINE_0
2364 * @arg @ref LL_EXTI_LINE_1
2365 * @arg @ref LL_EXTI_LINE_2
2366 * @arg @ref LL_EXTI_LINE_3
2367 * @arg @ref LL_EXTI_LINE_4
2368 * @arg @ref LL_EXTI_LINE_5
2369 * @arg @ref LL_EXTI_LINE_6
2370 * @arg @ref LL_EXTI_LINE_7
2371 * @arg @ref LL_EXTI_LINE_8
2372 * @arg @ref LL_EXTI_LINE_9
2373 * @arg @ref LL_EXTI_LINE_10
2374 * @arg @ref LL_EXTI_LINE_11
2375 * @arg @ref LL_EXTI_LINE_12
2376 * @arg @ref LL_EXTI_LINE_13
2377 * @arg @ref LL_EXTI_LINE_14
2378 * @arg @ref LL_EXTI_LINE_15
2379 * @arg @ref LL_EXTI_LINE_17
2380 * @arg @ref LL_EXTI_LINE_18
2381 * @arg @ref LL_EXTI_LINE_19
2382 * @arg @ref LL_EXTI_LINE_20
2383 * @arg @ref LL_EXTI_LINE_21
2384 * @arg @ref LL_EXTI_LINE_22
2385 * @arg @ref LL_EXTI_LINE_23
2386 * @arg @ref LL_EXTI_LINE_24
2387 * @arg @ref LL_EXTI_LINE_25
2388 * @arg @ref LL_EXTI_LINE_26
2389 * @arg @ref LL_EXTI_LINE_27
2390 * @arg @ref LL_EXTI_LINE_28
2391 * @arg @ref LL_EXTI_LINE_29
2392 * @arg @ref LL_EXTI_LINE_30
2393 * @arg @ref LL_EXTI_LINE_31
2394 * @arg @ref LL_EXTI_LINE_ALL_0_31
2395 * @note Please check each device line mapping for EXTI Line availability
2396 * @retval State of bit (1 or 0).
2397 */
LL_EXTI_IsEnabledSecure_0_31(uint32_t ExtiLine)2398 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledSecure_0_31(uint32_t ExtiLine)
2399 {
2400 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2401 }
2402
2403 /**
2404 * @brief Indicate if ExtiLine Secure attribute is enabled for Lines in range 32 to 63
2405 * @rmtoll SECCFGR2 SECx LL_EXTI_IsEnabledSecure_32_63
2406 * @param ExtiLine This parameter can be one of the following values:
2407 * @arg @ref LL_EXTI_LINE_32
2408 * @arg @ref LL_EXTI_LINE_33
2409 * @arg @ref LL_EXTI_LINE_34
2410 * @arg @ref LL_EXTI_LINE_35
2411 * @arg @ref LL_EXTI_LINE_36
2412 * @arg @ref LL_EXTI_LINE_37
2413 * @arg @ref LL_EXTI_LINE_38
2414 * @arg @ref LL_EXTI_LINE_39
2415 * @arg @ref LL_EXTI_LINE_40
2416 * @arg @ref LL_EXTI_LINE_41
2417 * @arg @ref LL_EXTI_LINE_42
2418 * @arg @ref LL_EXTI_LINE_43
2419 * @arg @ref LL_EXTI_LINE_44
2420 * @arg @ref LL_EXTI_LINE_45
2421 * @arg @ref LL_EXTI_LINE_46
2422 * @arg @ref LL_EXTI_LINE_47
2423 * @arg @ref LL_EXTI_LINE_48
2424 * @arg @ref LL_EXTI_LINE_49
2425 * @arg @ref LL_EXTI_LINE_50
2426 * @arg @ref LL_EXTI_LINE_51
2427 * @arg @ref LL_EXTI_LINE_52
2428 * @arg @ref LL_EXTI_LINE_53
2429 * @arg @ref LL_EXTI_LINE_54
2430 * @arg @ref LL_EXTI_LINE_55
2431 * @arg @ref LL_EXTI_LINE_56
2432 * @arg @ref LL_EXTI_LINE_57
2433 * @arg @ref LL_EXTI_LINE_58
2434 * @arg @ref LL_EXTI_LINE_62
2435 * @arg @ref LL_EXTI_LINE_61
2436 * @arg @ref LL_EXTI_LINE_62
2437 * @arg @ref LL_EXTI_LINE_63
2438 * @arg @ref LL_EXTI_LINE_ALL_32_63
2439 * @note Please check each device line mapping for EXTI Line availability
2440 * @retval State of bit (1 or 0).
2441 */
LL_EXTI_IsEnabledSecure_32_63(uint32_t ExtiLine)2442 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledSecure_32_63(uint32_t ExtiLine)
2443 {
2444 return ((READ_BIT(EXTI->SECCFGR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2445 }
2446
2447 /**
2448 * @brief Indicate if ExtiLine Secure attribute is enabled for Lines in range 64 to 95
2449 * @rmtoll SECCFGR3 SECx LL_EXTI_IsEnabledSecure_64_95
2450 * @param ExtiLine This parameter can be one of the following values:
2451 * @arg @ref LL_EXTI_LINE_64
2452 * @arg @ref LL_EXTI_LINE_65
2453 * @arg @ref LL_EXTI_LINE_66
2454 * @arg @ref LL_EXTI_LINE_68
2455 * @arg @ref LL_EXTI_LINE_69
2456 * @arg @ref LL_EXTI_LINE_70
2457 * @arg @ref LL_EXTI_LINE_71
2458 * @arg @ref LL_EXTI_LINE_72
2459 * @arg @ref LL_EXTI_LINE_73
2460 * @arg @ref LL_EXTI_LINE_74
2461 * @arg @ref LL_EXTI_LINE_77
2462 * @arg @ref LL_EXTI_LINE_ALL_64_95
2463 * @note Please check each device line mapping for EXTI Line availability
2464 * @retval State of bit (1 or 0).
2465 */
LL_EXTI_IsEnabledSecure_64_95(uint32_t ExtiLine)2466 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledSecure_64_95(uint32_t ExtiLine)
2467 {
2468 return ((READ_BIT(EXTI->SECCFGR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2469 }
2470
2471 /**
2472 * @}
2473 */
2474
2475 /** @defgroup EXTI_LL_EF_Privilege_Management Privilege_Management
2476 * @{
2477 */
2478
2479 /**
2480 * @brief Enable ExtiLine Privilege attribute for Lines in range 0 to 31
2481 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_EnablePrivilege_0_31
2482 * @param ExtiLine This parameter can be one of the following values:
2483 * @arg @ref LL_EXTI_LINE_0
2484 * @arg @ref LL_EXTI_LINE_1
2485 * @arg @ref LL_EXTI_LINE_2
2486 * @arg @ref LL_EXTI_LINE_3
2487 * @arg @ref LL_EXTI_LINE_4
2488 * @arg @ref LL_EXTI_LINE_5
2489 * @arg @ref LL_EXTI_LINE_6
2490 * @arg @ref LL_EXTI_LINE_7
2491 * @arg @ref LL_EXTI_LINE_8
2492 * @arg @ref LL_EXTI_LINE_9
2493 * @arg @ref LL_EXTI_LINE_10
2494 * @arg @ref LL_EXTI_LINE_11
2495 * @arg @ref LL_EXTI_LINE_12
2496 * @arg @ref LL_EXTI_LINE_13
2497 * @arg @ref LL_EXTI_LINE_14
2498 * @arg @ref LL_EXTI_LINE_15
2499 * @arg @ref LL_EXTI_LINE_17
2500 * @arg @ref LL_EXTI_LINE_18
2501 * @arg @ref LL_EXTI_LINE_19
2502 * @arg @ref LL_EXTI_LINE_20
2503 * @arg @ref LL_EXTI_LINE_21
2504 * @arg @ref LL_EXTI_LINE_22
2505 * @arg @ref LL_EXTI_LINE_23
2506 * @arg @ref LL_EXTI_LINE_24
2507 * @arg @ref LL_EXTI_LINE_25
2508 * @arg @ref LL_EXTI_LINE_26
2509 * @arg @ref LL_EXTI_LINE_27
2510 * @arg @ref LL_EXTI_LINE_28
2511 * @arg @ref LL_EXTI_LINE_29
2512 * @arg @ref LL_EXTI_LINE_30
2513 * @arg @ref LL_EXTI_LINE_31
2514 * @arg @ref LL_EXTI_LINE_ALL_0_31
2515 * @note Please check each device line mapping for EXTI Line availability
2516 * @retval None
2517 */
LL_EXTI_EnablePrivilege_0_31(uint32_t ExtiLine)2518 __STATIC_INLINE void LL_EXTI_EnablePrivilege_0_31(uint32_t ExtiLine)
2519 {
2520 SET_BIT(EXTI->PRIVCFGR1, ExtiLine);
2521 }
2522
2523 /**
2524 * @brief Enable ExtiLine Privilege attribute for Lines in range 32 to 63
2525 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_EnablePrivilege_32_63
2526 * @param ExtiLine This parameter can be one of the following values:
2527 * @arg @ref LL_EXTI_LINE_32
2528 * @arg @ref LL_EXTI_LINE_33
2529 * @arg @ref LL_EXTI_LINE_34
2530 * @arg @ref LL_EXTI_LINE_35
2531 * @arg @ref LL_EXTI_LINE_36
2532 * @arg @ref LL_EXTI_LINE_37
2533 * @arg @ref LL_EXTI_LINE_38
2534 * @arg @ref LL_EXTI_LINE_39
2535 * @arg @ref LL_EXTI_LINE_40
2536 * @arg @ref LL_EXTI_LINE_41
2537 * @arg @ref LL_EXTI_LINE_42
2538 * @arg @ref LL_EXTI_LINE_43
2539 * @arg @ref LL_EXTI_LINE_44
2540 * @arg @ref LL_EXTI_LINE_45
2541 * @arg @ref LL_EXTI_LINE_46
2542 * @arg @ref LL_EXTI_LINE_47
2543 * @arg @ref LL_EXTI_LINE_48
2544 * @arg @ref LL_EXTI_LINE_49
2545 * @arg @ref LL_EXTI_LINE_50
2546 * @arg @ref LL_EXTI_LINE_51
2547 * @arg @ref LL_EXTI_LINE_52
2548 * @arg @ref LL_EXTI_LINE_53
2549 * @arg @ref LL_EXTI_LINE_54
2550 * @arg @ref LL_EXTI_LINE_55
2551 * @arg @ref LL_EXTI_LINE_56
2552 * @arg @ref LL_EXTI_LINE_57
2553 * @arg @ref LL_EXTI_LINE_58
2554 * @arg @ref LL_EXTI_LINE_62
2555 * @arg @ref LL_EXTI_LINE_61
2556 * @arg @ref LL_EXTI_LINE_62
2557 * @arg @ref LL_EXTI_LINE_63
2558 * @arg @ref LL_EXTI_LINE_ALL_32_63
2559 * @note Please check each device line mapping for EXTI Line availability
2560 * @retval None
2561 */
LL_EXTI_EnablePrivilege_32_63(uint32_t ExtiLine)2562 __STATIC_INLINE void LL_EXTI_EnablePrivilege_32_63(uint32_t ExtiLine)
2563 {
2564 SET_BIT(EXTI->PRIVCFGR2, ExtiLine);
2565 }
2566
2567 /**
2568 * @brief Enable ExtiLine Privilege attribute for Lines in range 64 to 95
2569 * @rmtoll PRIVCFGR3 PRIVx LL_EXTI_EnablePrivilege_64_95
2570 * @param ExtiLine This parameter can be one of the following values:
2571 * @arg @ref LL_EXTI_LINE_64
2572 * @arg @ref LL_EXTI_LINE_65
2573 * @arg @ref LL_EXTI_LINE_66
2574 * @arg @ref LL_EXTI_LINE_68
2575 * @arg @ref LL_EXTI_LINE_69
2576 * @arg @ref LL_EXTI_LINE_70
2577 * @arg @ref LL_EXTI_LINE_71
2578 * @arg @ref LL_EXTI_LINE_72
2579 * @arg @ref LL_EXTI_LINE_73
2580 * @arg @ref LL_EXTI_LINE_74
2581 * @arg @ref LL_EXTI_LINE_77
2582 * @arg @ref LL_EXTI_LINE_ALL_64_95
2583 * @note Please check each device line mapping for EXTI Line availability
2584 * @retval None
2585 */
LL_EXTI_EnablePrivilege_64_95(uint32_t ExtiLine)2586 __STATIC_INLINE void LL_EXTI_EnablePrivilege_64_95(uint32_t ExtiLine)
2587 {
2588 SET_BIT(EXTI->PRIVCFGR3, ExtiLine);
2589 }
2590
2591 /**
2592 * @brief Disable ExtiLine Privilege attribute for Lines in range 0 to 31
2593 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_DisablePrivilege_0_31
2594 * @param ExtiLine This parameter can be one of the following values:
2595 * @arg @ref LL_EXTI_LINE_0
2596 * @arg @ref LL_EXTI_LINE_1
2597 * @arg @ref LL_EXTI_LINE_2
2598 * @arg @ref LL_EXTI_LINE_3
2599 * @arg @ref LL_EXTI_LINE_4
2600 * @arg @ref LL_EXTI_LINE_5
2601 * @arg @ref LL_EXTI_LINE_6
2602 * @arg @ref LL_EXTI_LINE_7
2603 * @arg @ref LL_EXTI_LINE_8
2604 * @arg @ref LL_EXTI_LINE_9
2605 * @arg @ref LL_EXTI_LINE_10
2606 * @arg @ref LL_EXTI_LINE_11
2607 * @arg @ref LL_EXTI_LINE_12
2608 * @arg @ref LL_EXTI_LINE_13
2609 * @arg @ref LL_EXTI_LINE_14
2610 * @arg @ref LL_EXTI_LINE_15
2611 * @arg @ref LL_EXTI_LINE_17
2612 * @arg @ref LL_EXTI_LINE_18
2613 * @arg @ref LL_EXTI_LINE_19
2614 * @arg @ref LL_EXTI_LINE_20
2615 * @arg @ref LL_EXTI_LINE_21
2616 * @arg @ref LL_EXTI_LINE_22
2617 * @arg @ref LL_EXTI_LINE_23
2618 * @arg @ref LL_EXTI_LINE_24
2619 * @arg @ref LL_EXTI_LINE_25
2620 * @arg @ref LL_EXTI_LINE_26
2621 * @arg @ref LL_EXTI_LINE_27
2622 * @arg @ref LL_EXTI_LINE_28
2623 * @arg @ref LL_EXTI_LINE_29
2624 * @arg @ref LL_EXTI_LINE_30
2625 * @arg @ref LL_EXTI_LINE_31
2626 * @arg @ref LL_EXTI_LINE_ALL_0_31
2627 * @note Please check each device line mapping for EXTI Line availability
2628 * @retval None
2629 */
LL_EXTI_DisablePrivilege_0_31(uint32_t ExtiLine)2630 __STATIC_INLINE void LL_EXTI_DisablePrivilege_0_31(uint32_t ExtiLine)
2631 {
2632 CLEAR_BIT(EXTI->PRIVCFGR1, ExtiLine);
2633 }
2634
2635 /**
2636 * @brief Disable ExtiLine Privilege attribute for Lines in range 32 to 63
2637 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_DisablePrivilege_32_63
2638 * @param ExtiLine This parameter can be one of the following values:
2639 * @arg @ref LL_EXTI_LINE_32
2640 * @arg @ref LL_EXTI_LINE_33
2641 * @arg @ref LL_EXTI_LINE_34
2642 * @arg @ref LL_EXTI_LINE_35
2643 * @arg @ref LL_EXTI_LINE_36
2644 * @arg @ref LL_EXTI_LINE_37
2645 * @arg @ref LL_EXTI_LINE_38
2646 * @arg @ref LL_EXTI_LINE_39
2647 * @arg @ref LL_EXTI_LINE_40
2648 * @arg @ref LL_EXTI_LINE_41
2649 * @arg @ref LL_EXTI_LINE_42
2650 * @arg @ref LL_EXTI_LINE_43
2651 * @arg @ref LL_EXTI_LINE_44
2652 * @arg @ref LL_EXTI_LINE_45
2653 * @arg @ref LL_EXTI_LINE_46
2654 * @arg @ref LL_EXTI_LINE_47
2655 * @arg @ref LL_EXTI_LINE_48
2656 * @arg @ref LL_EXTI_LINE_49
2657 * @arg @ref LL_EXTI_LINE_50
2658 * @arg @ref LL_EXTI_LINE_51
2659 * @arg @ref LL_EXTI_LINE_52
2660 * @arg @ref LL_EXTI_LINE_53
2661 * @arg @ref LL_EXTI_LINE_54
2662 * @arg @ref LL_EXTI_LINE_55
2663 * @arg @ref LL_EXTI_LINE_56
2664 * @arg @ref LL_EXTI_LINE_57
2665 * @arg @ref LL_EXTI_LINE_58
2666 * @arg @ref LL_EXTI_LINE_62
2667 * @arg @ref LL_EXTI_LINE_61
2668 * @arg @ref LL_EXTI_LINE_62
2669 * @arg @ref LL_EXTI_LINE_63
2670 * @arg @ref LL_EXTI_LINE_ALL_32_63
2671 * @note Please check each device line mapping for EXTI Line availability
2672 * @retval None
2673 */
LL_EXTI_DisablePrivilege_32_63(uint32_t ExtiLine)2674 __STATIC_INLINE void LL_EXTI_DisablePrivilege_32_63(uint32_t ExtiLine)
2675 {
2676 CLEAR_BIT(EXTI->PRIVCFGR2, ExtiLine);
2677 }
2678
2679 /**
2680 * @brief Disable ExtiLine Privilege attribute for Lines in range 64 to 95
2681 * @rmtoll PRIVCFGR3 PRIVx LL_EXTI_DisablePrivilege_64_95
2682 * @param ExtiLine This parameter can be one of the following values:
2683 * @arg @ref LL_EXTI_LINE_64
2684 * @arg @ref LL_EXTI_LINE_65
2685 * @arg @ref LL_EXTI_LINE_66
2686 * @arg @ref LL_EXTI_LINE_68
2687 * @arg @ref LL_EXTI_LINE_69
2688 * @arg @ref LL_EXTI_LINE_70
2689 * @arg @ref LL_EXTI_LINE_71
2690 * @arg @ref LL_EXTI_LINE_72
2691 * @arg @ref LL_EXTI_LINE_73
2692 * @arg @ref LL_EXTI_LINE_74
2693 * @arg @ref LL_EXTI_LINE_77
2694 * @arg @ref LL_EXTI_LINE_ALL_64_95
2695 * @note Please check each device line mapping for EXTI Line availability
2696 * @retval None
2697 */
LL_EXTI_DisablePrivilege_64_95(uint32_t ExtiLine)2698 __STATIC_INLINE void LL_EXTI_DisablePrivilege_64_95(uint32_t ExtiLine)
2699 {
2700 CLEAR_BIT(EXTI->PRIVCFGR3, ExtiLine);
2701 }
2702
2703 /**
2704 * @brief Indicate if ExtiLine Privilege attribute is enabled for Lines in range 0 to 31
2705 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_IsEnabledPrivilege_0_31
2706 * @param ExtiLine This parameter can be one of the following values:
2707 * @arg @ref LL_EXTI_LINE_0
2708 * @arg @ref LL_EXTI_LINE_1
2709 * @arg @ref LL_EXTI_LINE_2
2710 * @arg @ref LL_EXTI_LINE_3
2711 * @arg @ref LL_EXTI_LINE_4
2712 * @arg @ref LL_EXTI_LINE_5
2713 * @arg @ref LL_EXTI_LINE_6
2714 * @arg @ref LL_EXTI_LINE_7
2715 * @arg @ref LL_EXTI_LINE_8
2716 * @arg @ref LL_EXTI_LINE_9
2717 * @arg @ref LL_EXTI_LINE_10
2718 * @arg @ref LL_EXTI_LINE_11
2719 * @arg @ref LL_EXTI_LINE_12
2720 * @arg @ref LL_EXTI_LINE_13
2721 * @arg @ref LL_EXTI_LINE_14
2722 * @arg @ref LL_EXTI_LINE_15
2723 * @arg @ref LL_EXTI_LINE_17
2724 * @arg @ref LL_EXTI_LINE_18
2725 * @arg @ref LL_EXTI_LINE_19
2726 * @arg @ref LL_EXTI_LINE_20
2727 * @arg @ref LL_EXTI_LINE_21
2728 * @arg @ref LL_EXTI_LINE_22
2729 * @arg @ref LL_EXTI_LINE_23
2730 * @arg @ref LL_EXTI_LINE_24
2731 * @arg @ref LL_EXTI_LINE_25
2732 * @arg @ref LL_EXTI_LINE_26
2733 * @arg @ref LL_EXTI_LINE_27
2734 * @arg @ref LL_EXTI_LINE_28
2735 * @arg @ref LL_EXTI_LINE_29
2736 * @arg @ref LL_EXTI_LINE_30
2737 * @arg @ref LL_EXTI_LINE_31
2738 * @arg @ref LL_EXTI_LINE_ALL_0_31
2739 * @note Please check each device line mapping for EXTI Line availability
2740 * @retval State of bit (1 or 0).
2741 */
LL_EXTI_IsEnabledPrivilege_0_31(uint32_t ExtiLine)2742 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledPrivilege_0_31(uint32_t ExtiLine)
2743 {
2744 return ((READ_BIT(EXTI->PRIVCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2745 }
2746
2747 /**
2748 * @brief Indicate if ExtiLine Privilege attribute is enabled for Lines in range 32 to 63
2749 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_IsEnabledPrivilege_32_63
2750 * @param ExtiLine This parameter can be one of the following values:
2751 * @arg @ref LL_EXTI_LINE_32
2752 * @arg @ref LL_EXTI_LINE_33
2753 * @arg @ref LL_EXTI_LINE_34
2754 * @arg @ref LL_EXTI_LINE_35
2755 * @arg @ref LL_EXTI_LINE_36
2756 * @arg @ref LL_EXTI_LINE_37
2757 * @arg @ref LL_EXTI_LINE_38
2758 * @arg @ref LL_EXTI_LINE_39
2759 * @arg @ref LL_EXTI_LINE_40
2760 * @arg @ref LL_EXTI_LINE_41
2761 * @arg @ref LL_EXTI_LINE_42
2762 * @arg @ref LL_EXTI_LINE_43
2763 * @arg @ref LL_EXTI_LINE_44
2764 * @arg @ref LL_EXTI_LINE_45
2765 * @arg @ref LL_EXTI_LINE_46
2766 * @arg @ref LL_EXTI_LINE_47
2767 * @arg @ref LL_EXTI_LINE_48
2768 * @arg @ref LL_EXTI_LINE_49
2769 * @arg @ref LL_EXTI_LINE_50
2770 * @arg @ref LL_EXTI_LINE_51
2771 * @arg @ref LL_EXTI_LINE_52
2772 * @arg @ref LL_EXTI_LINE_53
2773 * @arg @ref LL_EXTI_LINE_54
2774 * @arg @ref LL_EXTI_LINE_55
2775 * @arg @ref LL_EXTI_LINE_56
2776 * @arg @ref LL_EXTI_LINE_57
2777 * @arg @ref LL_EXTI_LINE_58
2778 * @arg @ref LL_EXTI_LINE_62
2779 * @arg @ref LL_EXTI_LINE_61
2780 * @arg @ref LL_EXTI_LINE_62
2781 * @arg @ref LL_EXTI_LINE_63
2782 * @arg @ref LL_EXTI_LINE_ALL_32_63
2783 * @note Please check each device line mapping for EXTI Line availability
2784 * @retval State of bit (1 or 0).
2785 */
LL_EXTI_IsEnabledPrivilege_32_63(uint32_t ExtiLine)2786 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledPrivilege_32_63(uint32_t ExtiLine)
2787 {
2788 return ((READ_BIT(EXTI->PRIVCFGR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2789 }
2790
2791 /**
2792 * @brief Indicate if ExtiLine Privilege attribute is enabled for Lines in range 64 to 95
2793 * @rmtoll PRIVCFGR3 PRIVx LL_EXTI_IsEnabledPrivilege_64_95
2794 * @param ExtiLine This parameter can be one of the following values:
2795 * @arg @ref LL_EXTI_LINE_0
2796 * @arg @ref LL_EXTI_LINE_1
2797 * @arg @ref LL_EXTI_LINE_2
2798 * @arg @ref LL_EXTI_LINE_3
2799 * @arg @ref LL_EXTI_LINE_4
2800 * @arg @ref LL_EXTI_LINE_5
2801 * @arg @ref LL_EXTI_LINE_6
2802 * @arg @ref LL_EXTI_LINE_7
2803 * @arg @ref LL_EXTI_LINE_8
2804 * @arg @ref LL_EXTI_LINE_9
2805 * @arg @ref LL_EXTI_LINE_10
2806 * @arg @ref LL_EXTI_LINE_11
2807 * @arg @ref LL_EXTI_LINE_12
2808 * @arg @ref LL_EXTI_LINE_13
2809 * @arg @ref LL_EXTI_LINE_14
2810 * @arg @ref LL_EXTI_LINE_15
2811 * @arg @ref LL_EXTI_LINE_17
2812 * @arg @ref LL_EXTI_LINE_18
2813 * @arg @ref LL_EXTI_LINE_19
2814 * @arg @ref LL_EXTI_LINE_20
2815 * @arg @ref LL_EXTI_LINE_21
2816 * @arg @ref LL_EXTI_LINE_22
2817 * @arg @ref LL_EXTI_LINE_23
2818 * @arg @ref LL_EXTI_LINE_24
2819 * @arg @ref LL_EXTI_LINE_25
2820 * @arg @ref LL_EXTI_LINE_26
2821 * @arg @ref LL_EXTI_LINE_27
2822 * @arg @ref LL_EXTI_LINE_28
2823 * @arg @ref LL_EXTI_LINE_29
2824 * @arg @ref LL_EXTI_LINE_30
2825 * @arg @ref LL_EXTI_LINE_31
2826 * @arg @ref LL_EXTI_LINE_ALL_0_31
2827 * @note Please check each device line mapping for EXTI Line availability
2828 * @retval State of bit (1 or 0).
2829 */
LL_EXTI_IsEnabledPrivilege_64_95(uint32_t ExtiLine)2830 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledPrivilege_64_95(uint32_t ExtiLine)
2831 {
2832 return ((READ_BIT(EXTI->PRIVCFGR3, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
2833 }
2834
2835 /**
2836 * @}
2837 */
2838
2839 #if defined CPU_IN_SECURE_STATE
2840 /**
2841 * @brief Lock the secure and privilege configuration registers.
2842 * @rmtoll LOCKR LOCK LL_EXTI_LockAttributes
2843 * @retval None
2844 */
LL_EXTI_LockAttributes(void)2845 __STATIC_INLINE void LL_EXTI_LockAttributes(void)
2846 {
2847 SET_BIT(EXTI->LOCKR, EXTI_LOCKR_LOCK);
2848 }
2849
2850 /**
2851 * @brief Return the secure and privilege configuration registers LOCK status
2852 * @rmtoll LOCKR LOCK LL_EXTI_GetLockAttributes
2853 * @retval 1 if the secure and privilege configuration registers have been locked else 0.
2854 */
LL_EXTI_GetLockAttributes(void)2855 __STATIC_INLINE uint32_t LL_EXTI_GetLockAttributes(void)
2856 {
2857 return READ_BIT(EXTI->LOCKR, EXTI_LOCKR_LOCK);
2858 }
2859 #endif /* CPU_IN_SECURE_STATE */
2860
2861
2862 #if defined(USE_FULL_LL_DRIVER)
2863 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
2864 * @{
2865 */
2866
2867 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
2868 uint32_t LL_EXTI_DeInit(void);
2869 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
2870
2871
2872 /**
2873 * @}
2874 */
2875 #endif /* USE_FULL_LL_DRIVER */
2876
2877 /**
2878 * @}
2879 */
2880
2881 /**
2882 * @}
2883 */
2884
2885 #endif /* EXTI */
2886
2887 /**
2888 * @}
2889 */
2890
2891 #ifdef __cplusplus
2892 }
2893 #endif
2894
2895 #endif /* STM32N6xx_LL_EXTI_H */
2896
2897
