1 /**
2 ******************************************************************************
3 * @file stm32l5xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 ******************************************************************************
30 */
31
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef STM32L5xx_LL_UTILS_H
34 #define STM32L5xx_LL_UTILS_H
35
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32l5xx.h"
42
43 /** @addtogroup STM32L5xx_LL_Driver
44 * @{
45 */
46
47 /** @defgroup UTILS_LL UTILS
48 * @{
49 */
50
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56 * @{
57 */
58
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61
62 /**
63 * @brief Unique device ID register base address
64 */
65 #define UID_BASE_ADDRESS UID_BASE
66
67 /**
68 * @brief Flash size data register base address
69 */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71
72 /**
73 * @brief Package data register base address
74 */
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
76
77 /**
78 * @}
79 */
80
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
83 * @{
84 */
85 /**
86 * @}
87 */
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
90 * @{
91 */
92 /**
93 * @brief UTILS PLL structure definition
94 */
95 typedef struct
96 {
97 uint32_t PLLM; /*!< Division factor for PLL VCO input clock.
98 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
99
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
102
103 uint32_t PLLN; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 8 and Max_Data = 86
105
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
108
109 uint32_t PLLR; /*!< Division for the main system clock.
110 This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV
111
112 This feature can be modified afterwards using unitary function
113 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
114 } LL_UTILS_PLLInitTypeDef;
115
116 /**
117 * @brief UTILS System, AHB and APB buses clock configuration structure definition
118 */
119 typedef struct
120 {
121 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
122 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
123
124 This feature can be modified afterwards using unitary function
125 @ref LL_RCC_SetAHBPrescaler(). */
126
127 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
128 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
129
130 This feature can be modified afterwards using unitary function
131 @ref LL_RCC_SetAPB1Prescaler(). */
132
133 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
134 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
135
136 This feature can be modified afterwards using unitary function
137 @ref LL_RCC_SetAPB2Prescaler(). */
138
139 } LL_UTILS_ClkInitTypeDef;
140
141 /**
142 * @}
143 */
144
145 /* Exported constants --------------------------------------------------------*/
146 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
147 * @{
148 */
149
150 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
151 * @{
152 */
153 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
154 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
155 /**
156 * @}
157 */
158
159 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
160 * @{
161 */
162 #define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
163 #define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
164 #define LL_UTILS_PACKAGETYPE_UFBGA132 0x00000003U /*!< UFBGA132 package type */
165 #define LL_UTILS_PACKAGETYPE_LQFP144 0x00000004U /*!< LQFP144 package type */
166 #define LL_UTILS_PACKAGETYPE_WLCSP81 0x00000005U /*!< WLCSP81 package type */
167 #define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 and UFQFPN48 package type */
168 #define LL_UTILS_PACKAGETYPE_LQFP144_INTSMPS 0x00000011U /*!< LQFP144 with internal SMPS package type */
169 #define LL_UTILS_PACKAGETYPE_UFBGA132_INTSMPS 0x00000012U /*!< UFBGA132 with internal SMPS package type */
170 #define LL_UTILS_PACKAGETYPE_LQFP100_INTSMPS 0x00000013U /*!< LQFP100 with internal SMPS package type */
171 #define LL_UTILS_PACKAGETYPE_WLCSP81_INTSMPS 0x00000014U /*!< WLCSP81 with internal SMPS package type */
172 #define LL_UTILS_PACKAGETYPE_LQFP64_INTSMPS 0x00000015U /*!< LQFP64 with internal SMPS package type */
173 #define LL_UTILS_PACKAGETYPE_LQFP48_INTSMPS 0x00000016U /*!< LQFP48 and UFQFPN48 with internal SMPS package type */
174 #define LL_UTILS_PACKAGETYPE_LQFP144_EXTSMPS 0x00000018U /*!< LQFP144 with external SMPS package type */
175 #define LL_UTILS_PACKAGETYPE_UFBGA132_EXTSMPS 0x00000019U /*!< UFBGA132 with external SMPS package type */
176 #define LL_UTILS_PACKAGETYPE_LQFP100_EXTSMPS 0x0000001AU /*!< LQFP100 with external SMPS package type */
177 #define LL_UTILS_PACKAGETYPE_WLCSP81_EXTSMPS 0x0000001BU /*!< WLCSP81 with external SMPS package type */
178 #define LL_UTILS_PACKAGETYPE_LQFP64_EXTSMPS 0x0000001CU /*!< LQFP64 with external SMPS package type */
179 #define LL_UTILS_PACKAGETYPE_LQFP48_EXTSMPS 0x0000001DU /*!< LQFP48 with external SMPS package type */
180 /**
181 * @}
182 */
183
184 /**
185 * @}
186 */
187
188 /* Exported macro ------------------------------------------------------------*/
189
190 /* Exported functions --------------------------------------------------------*/
191 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
192 * @{
193 */
194
195 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
196 * @{
197 */
198
199 /**
200 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
201 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
202 */
LL_GetUID_Word0(void)203 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
204 {
205 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
206 }
207
208 /**
209 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
210 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
211 */
LL_GetUID_Word1(void)212 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
213 {
214 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
215 }
216
217 /**
218 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
219 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
220 */
LL_GetUID_Word2(void)221 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
222 {
223 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
224 }
225
226 /**
227 * @brief Get Flash memory size
228 * @note This bitfield indicates the size of the device Flash memory expressed in
229 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
230 * @retval FLASH_SIZE[15:0]: Flash memory size
231 */
LL_GetFlashSize(void)232 __STATIC_INLINE uint32_t LL_GetFlashSize(void)
233 {
234 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)) & 0xFFFFU);
235 }
236
237 /**
238 * @brief Get Package type
239 * @retval Returned value can be one of the following values:
240 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64
241 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
242 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA132
243 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144
244 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP81
245 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48
246 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_INTSMPS
247 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA132_INTSMPS
248 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_INTSMPS
249 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP81_INTSMPS
250 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64_INTSMPS
251 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48_INTSMPS
252 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP144_EXTSMPS
253 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA132_EXTSMPS
254 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100_EXTSMPS
255 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP81_EXTSMPS
256 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64_EXTSMPS
257 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48_EXTSMPS
258 */
LL_GetPackageType(void)259 __STATIC_INLINE uint32_t LL_GetPackageType(void)
260 {
261 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x1FU);
262 }
263
264 /**
265 * @}
266 */
267
268 /** @defgroup UTILS_LL_EF_DELAY DELAY
269 * @{
270 */
271
272 /**
273 * @brief This function configures the Cortex-M SysTick source of the time base.
274 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
275 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
276 * configuration by calling this function, for a delay use rather osDelay RTOS service.
277 * @param Ticks Frequency of Ticks (Hz)
278 * @retval None
279 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)280 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
281 {
282 /* Configure the SysTick to have interrupt in 1ms time base */
283 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
284 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
285 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
286 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
287 }
288
289 void LL_Init1msTick(uint32_t HCLKFrequency);
290 void LL_mDelay(uint32_t Delay);
291
292 /**
293 * @}
294 */
295
296 /** @defgroup UTILS_EF_SYSTEM SYSTEM
297 * @{
298 */
299
300 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
301 ErrorStatus LL_SetFlashLatency(uint32_t HCLKFrequency);
302 ErrorStatus LL_PLL_ConfigSystemClock_MSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
303 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
304 ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
305 LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
306 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
307 LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
308
309 /**
310 * @}
311 */
312
313 /**
314 * @}
315 */
316
317 /**
318 * @}
319 */
320
321 /**
322 * @}
323 */
324
325 #ifdef __cplusplus
326 }
327 #endif
328
329 #endif /* STM32L5xx_LL_UTILS_H */
330
