1 /**
2 ******************************************************************************
3 * @file stm32l5xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2019 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L5xx_LL_EXTI_H
21 #define STM32L5xx_LL_EXTI_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l5xx.h"
29
30 /** @addtogroup STM32L5xx_LL_Driver
31 * @{
32 */
33
34 #if defined (EXTI)
35
36 /** @defgroup EXTI_LL EXTI
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 #define LL_EXTI_REGISTER_PINPOS_SHFT 16U /*!< Define used to shift pin position in EXTICR register */
44
45 /* Private Macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
48 * @{
49 */
50 /**
51 * @}
52 */
53 #endif /*USE_FULL_LL_DRIVER*/
54 /* Exported types ------------------------------------------------------------*/
55 #if defined(USE_FULL_LL_DRIVER)
56 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
57 * @{
58 */
59 typedef struct
60 {
61
62 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
63 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
64
65 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
66 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
67
68 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
69 This parameter can be set either to ENABLE or DISABLE */
70
71 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
72 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
73
74 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
75 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
76 } LL_EXTI_InitTypeDef;
77
78 /**
79 * @}
80 */
81 #endif /*USE_FULL_LL_DRIVER*/
82
83 /* Exported constants --------------------------------------------------------*/
84 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
85 * @{
86 */
87
88 /** @defgroup EXTI_LL_EC_LINE LINE
89 * @{
90 */
91 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
92 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
93 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
94 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
95 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
96 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
97 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
98 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
99 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
100 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
101 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
102 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
103 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
104 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
105 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
106 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
107 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
108 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
109 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
110 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
111 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
112 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
113 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
114 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
115 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
116 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
117 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
118 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
119 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
120 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
121 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
122 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
123 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
124
125 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
126 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
127 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
128 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
129 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
130 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
131 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
132 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
133 #define LL_EXTI_LINE_41 EXTI_IMR2_IM41 /*!< Extended line 41 */
134 #define LL_EXTI_LINE_42 EXTI_IMR2_IM42 /*!< Extended line 42 */
135 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
136
137
138 #define LL_EXTI_LINE_ALL 0xFFFFFFFFU /*!< All Extended line */
139
140 #if defined(USE_FULL_LL_DRIVER)
141 #define LL_EXTI_LINE_NONE 0x00000000U /*!< None Extended line */
142 #endif /*USE_FULL_LL_DRIVER*/
143
144 /** @defgroup SYSTEM_LL_EC_EXTI_PORT EXTI EXTI PORT
145 * @{
146 */
147 #define LL_EXTI_EXTI_PORTA 0U /*!< EXTI PORT A */
148 #define LL_EXTI_EXTI_PORTB EXTI_EXTICR1_EXTI0_0 /*!< EXTI PORT B */
149 #define LL_EXTI_EXTI_PORTC EXTI_EXTICR1_EXTI0_1 /*!< EXTI PORT C */
150 #define LL_EXTI_EXTI_PORTD (EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT D */
151 #define LL_EXTI_EXTI_PORTE EXTI_EXTICR1_EXTI0_2 /*!< EXTI PORT E */
152 #define LL_EXTI_EXTI_PORTF (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT F */
153 #define LL_EXTI_EXTI_PORTG (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_1) /*!< EXTI PORT G */
154 #define LL_EXTI_EXTI_PORTH (EXTI_EXTICR1_EXTI0_2|EXTI_EXTICR1_EXTI0_1|EXTI_EXTICR1_EXTI0_0) /*!< EXTI PORT H */
155 /**
156 * @}
157 */
158
159 /** @defgroup SYSTEM_LL_EC_EXTI_LINE EXTI EXTI LINE
160 * @{
161 */
162 #define LL_EXTI_EXTI_LINE0 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
163 #define LL_EXTI_EXTI_LINE1 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
164 #define LL_EXTI_EXTI_LINE2 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_16 | EXTICR[0] */
165 #define LL_EXTI_EXTI_LINE3 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 0U) /*!< EXTI_POSITION_24 | EXTICR[0] */
166 #define LL_EXTI_EXTI_LINE4 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
167 #define LL_EXTI_EXTI_LINE5 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
168 #define LL_EXTI_EXTI_LINE6 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_16 | EXTICR[1] */
169 #define LL_EXTI_EXTI_LINE7 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 1U) /*!< EXTI_POSITION_24 | EXTICR[1] */
170 #define LL_EXTI_EXTI_LINE8 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
171 #define LL_EXTI_EXTI_LINE9 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
172 #define LL_EXTI_EXTI_LINE10 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_16 | EXTICR[2] */
173 #define LL_EXTI_EXTI_LINE11 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 2U) /*!< EXTI_POSITION_24 | EXTICR[2] */
174 #define LL_EXTI_EXTI_LINE12 (0U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
175 #define LL_EXTI_EXTI_LINE13 (8U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
176 #define LL_EXTI_EXTI_LINE14 (16U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_16 | EXTICR[3] */
177 #define LL_EXTI_EXTI_LINE15 (24U << LL_EXTI_REGISTER_PINPOS_SHFT | 3U) /*!< EXTI_POSITION_24 | EXTICR[3] */
178 /**
179 * @}
180 */
181 /**
182 * @}
183 */
184 #if defined(USE_FULL_LL_DRIVER)
185
186 /** @defgroup EXTI_LL_EC_MODE Mode
187 * @{
188 */
189 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
190 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
191 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
192 /**
193 * @}
194 */
195
196 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
197 * @{
198 */
199 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
200 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
201 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
202 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
203
204 /**
205 * @}
206 */
207
208
209 #endif /*USE_FULL_LL_DRIVER*/
210
211
212 /**
213 * @}
214 */
215
216 /* Exported macro ------------------------------------------------------------*/
217 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
218 * @{
219 */
220
221 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
222 * @{
223 */
224
225 /**
226 * @brief Write a value in EXTI register
227 * @param __REG__ Register to be written
228 * @param __VALUE__ Value to be written in the register
229 * @retval None
230 */
231 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
232
233 /**
234 * @brief Read a value in EXTI register
235 * @param __REG__ Register to be read
236 * @retval Register value
237 */
238 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
239 /**
240 * @}
241 */
242
243
244 /**
245 * @}
246 */
247
248
249
250 /* Exported functions --------------------------------------------------------*/
251 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
252 * @{
253 */
254 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
255 * @{
256 */
257
258 /**
259 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
260 * @note The reset value for the direct or internal lines (see RM)
261 * is set to 1 in order to enable the interrupt by default.
262 * Bits are set automatically at Power on.
263 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
264 * @param ExtiLine This parameter can be one of the following values:
265 * @arg @ref LL_EXTI_LINE_0
266 * @arg @ref LL_EXTI_LINE_1
267 * @arg @ref LL_EXTI_LINE_2
268 * @arg @ref LL_EXTI_LINE_3
269 * @arg @ref LL_EXTI_LINE_4
270 * @arg @ref LL_EXTI_LINE_5
271 * @arg @ref LL_EXTI_LINE_6
272 * @arg @ref LL_EXTI_LINE_7
273 * @arg @ref LL_EXTI_LINE_8
274 * @arg @ref LL_EXTI_LINE_9
275 * @arg @ref LL_EXTI_LINE_10
276 * @arg @ref LL_EXTI_LINE_11
277 * @arg @ref LL_EXTI_LINE_12
278 * @arg @ref LL_EXTI_LINE_13
279 * @arg @ref LL_EXTI_LINE_14
280 * @arg @ref LL_EXTI_LINE_15
281 * @arg @ref LL_EXTI_LINE_16
282 * @arg @ref LL_EXTI_LINE_17
283 * @arg @ref LL_EXTI_LINE_18
284 * @arg @ref LL_EXTI_LINE_19
285 * @arg @ref LL_EXTI_LINE_20
286 * @arg @ref LL_EXTI_LINE_21
287 * @arg @ref LL_EXTI_LINE_22
288 * @arg @ref LL_EXTI_LINE_23
289 * @arg @ref LL_EXTI_LINE_24
290 * @arg @ref LL_EXTI_LINE_25
291 * @arg @ref LL_EXTI_LINE_26
292 * @arg @ref LL_EXTI_LINE_27
293 * @arg @ref LL_EXTI_LINE_28
294 * @arg @ref LL_EXTI_LINE_29
295 * @arg @ref LL_EXTI_LINE_30
296 * @arg @ref LL_EXTI_LINE_31
297 * @arg @ref LL_EXTI_LINE_ALL_0_31
298 * @note Please check each device line mapping for EXTI Line availability
299 * @retval None
300 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)301 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
302 {
303 SET_BIT(EXTI->IMR1, ExtiLine);
304 }
305 /**
306 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
307 * @note The reset value for the direct lines (lines from 32 to 34, line
308 * 39) is set to 1 in order to enable the interrupt by default.
309 * Bits are set automatically at Power on.
310 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
311 * @param ExtiLine This parameter can be one of the following values:
312 * @arg @ref LL_EXTI_LINE_32
313 * @arg @ref LL_EXTI_LINE_33
314 * @arg @ref LL_EXTI_LINE_34
315 * @arg @ref LL_EXTI_LINE_35
316 * @arg @ref LL_EXTI_LINE_36
317 * @arg @ref LL_EXTI_LINE_37
318 * @arg @ref LL_EXTI_LINE_38
319 * @arg @ref LL_EXTI_LINE_40
320 * @arg @ref LL_EXTI_LINE_41
321 * @arg @ref LL_EXTI_LINE_42
322 * @arg @ref LL_EXTI_LINE_ALL_32_63
323 * @retval None
324 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)325 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
326 {
327 SET_BIT(EXTI->IMR2, ExtiLine);
328 }
329
330 /**
331 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
332 * @note The reset value for the direct or internal lines (see RM)
333 * is set to 1 in order to enable the interrupt by default.
334 * Bits are set automatically at Power on.
335 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
336 * @param ExtiLine This parameter can be one of the following values:
337 * @arg @ref LL_EXTI_LINE_0
338 * @arg @ref LL_EXTI_LINE_1
339 * @arg @ref LL_EXTI_LINE_2
340 * @arg @ref LL_EXTI_LINE_3
341 * @arg @ref LL_EXTI_LINE_4
342 * @arg @ref LL_EXTI_LINE_5
343 * @arg @ref LL_EXTI_LINE_6
344 * @arg @ref LL_EXTI_LINE_7
345 * @arg @ref LL_EXTI_LINE_8
346 * @arg @ref LL_EXTI_LINE_9
347 * @arg @ref LL_EXTI_LINE_10
348 * @arg @ref LL_EXTI_LINE_11
349 * @arg @ref LL_EXTI_LINE_12
350 * @arg @ref LL_EXTI_LINE_13
351 * @arg @ref LL_EXTI_LINE_14
352 * @arg @ref LL_EXTI_LINE_15
353 * @arg @ref LL_EXTI_LINE_16
354 * @arg @ref LL_EXTI_LINE_17
355 * @arg @ref LL_EXTI_LINE_18
356 * @arg @ref LL_EXTI_LINE_19
357 * @arg @ref LL_EXTI_LINE_20
358 * @arg @ref LL_EXTI_LINE_21
359 * @arg @ref LL_EXTI_LINE_22
360 * @arg @ref LL_EXTI_LINE_23
361 * @arg @ref LL_EXTI_LINE_24
362 * @arg @ref LL_EXTI_LINE_25
363 * @arg @ref LL_EXTI_LINE_26
364 * @arg @ref LL_EXTI_LINE_27
365 * @arg @ref LL_EXTI_LINE_28
366 * @arg @ref LL_EXTI_LINE_29
367 * @arg @ref LL_EXTI_LINE_30
368 * @arg @ref LL_EXTI_LINE_31
369 * @arg @ref LL_EXTI_LINE_ALL_0_31
370 * @note Please check each device line mapping for EXTI Line availability
371 * @retval None
372 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)373 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
374 {
375 CLEAR_BIT(EXTI->IMR1, ExtiLine);
376 }
377
378 /**
379 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
380 * @note The reset value for the direct lines (lines from 32 to 34, line
381 * 39) is set to 1 in order to enable the interrupt by default.
382 * Bits are set automatically at Power on.
383 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
384 * @param ExtiLine This parameter can be one of the following values:
385 * @arg @ref LL_EXTI_LINE_32
386 * @arg @ref LL_EXTI_LINE_33
387 * @arg @ref LL_EXTI_LINE_34
388 * @arg @ref LL_EXTI_LINE_35
389 * @arg @ref LL_EXTI_LINE_36
390 * @arg @ref LL_EXTI_LINE_37
391 * @arg @ref LL_EXTI_LINE_38
392 * @arg @ref LL_EXTI_LINE_40
393 * @arg @ref LL_EXTI_LINE_41
394 * @arg @ref LL_EXTI_LINE_42
395 * @arg @ref LL_EXTI_LINE_ALL_32_63
396 * @retval None
397 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)398 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
399 {
400 CLEAR_BIT(EXTI->IMR2, ExtiLine);
401 }
402
403 /**
404 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
405 * @note The reset value for the direct or internal lines (see RM)
406 * is set to 1 in order to enable the interrupt by default.
407 * Bits are set automatically at Power on.
408 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
409 * @param ExtiLine This parameter can be one of the following values:
410 * @arg @ref LL_EXTI_LINE_0
411 * @arg @ref LL_EXTI_LINE_1
412 * @arg @ref LL_EXTI_LINE_2
413 * @arg @ref LL_EXTI_LINE_3
414 * @arg @ref LL_EXTI_LINE_4
415 * @arg @ref LL_EXTI_LINE_5
416 * @arg @ref LL_EXTI_LINE_6
417 * @arg @ref LL_EXTI_LINE_7
418 * @arg @ref LL_EXTI_LINE_8
419 * @arg @ref LL_EXTI_LINE_9
420 * @arg @ref LL_EXTI_LINE_10
421 * @arg @ref LL_EXTI_LINE_11
422 * @arg @ref LL_EXTI_LINE_12
423 * @arg @ref LL_EXTI_LINE_13
424 * @arg @ref LL_EXTI_LINE_14
425 * @arg @ref LL_EXTI_LINE_15
426 * @arg @ref LL_EXTI_LINE_16
427 * @arg @ref LL_EXTI_LINE_17
428 * @arg @ref LL_EXTI_LINE_18
429 * @arg @ref LL_EXTI_LINE_19
430 * @arg @ref LL_EXTI_LINE_20
431 * @arg @ref LL_EXTI_LINE_21
432 * @arg @ref LL_EXTI_LINE_22
433 * @arg @ref LL_EXTI_LINE_23
434 * @arg @ref LL_EXTI_LINE_24
435 * @arg @ref LL_EXTI_LINE_25
436 * @arg @ref LL_EXTI_LINE_26
437 * @arg @ref LL_EXTI_LINE_27
438 * @arg @ref LL_EXTI_LINE_28
439 * @arg @ref LL_EXTI_LINE_29
440 * @arg @ref LL_EXTI_LINE_30
441 * @arg @ref LL_EXTI_LINE_31
442 * @arg @ref LL_EXTI_LINE_ALL_0_31
443 * @note Please check each device line mapping for EXTI Line availability
444 * @retval State of bit (1 or 0).
445 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)446 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
447 {
448 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
449 }
450
451 /**
452 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
453 * @note The reset value for the direct lines (lines from 32 to 34, line
454 * 39) is set to 1 in order to enable the interrupt by default.
455 * Bits are set automatically at Power on.
456 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
457 * @param ExtiLine This parameter can be one of the following values:
458 * @arg @ref LL_EXTI_LINE_32
459 * @arg @ref LL_EXTI_LINE_33
460 * @arg @ref LL_EXTI_LINE_34
461 * @arg @ref LL_EXTI_LINE_35
462 * @arg @ref LL_EXTI_LINE_36
463 * @arg @ref LL_EXTI_LINE_37
464 * @arg @ref LL_EXTI_LINE_38
465 * @arg @ref LL_EXTI_LINE_40
466 * @arg @ref LL_EXTI_LINE_41
467 * @arg @ref LL_EXTI_LINE_42
468 * @arg @ref LL_EXTI_LINE_ALL_32_63
469 * @retval State of bit (1 or 0).
470 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)471 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
472 {
473 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
474 }
475
476 /**
477 * @}
478 */
479
480 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
481 * @{
482 */
483
484 /**
485 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
486 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
487 * @param ExtiLine This parameter can be one of the following values:
488 * @arg @ref LL_EXTI_LINE_0
489 * @arg @ref LL_EXTI_LINE_1
490 * @arg @ref LL_EXTI_LINE_2
491 * @arg @ref LL_EXTI_LINE_3
492 * @arg @ref LL_EXTI_LINE_4
493 * @arg @ref LL_EXTI_LINE_5
494 * @arg @ref LL_EXTI_LINE_6
495 * @arg @ref LL_EXTI_LINE_7
496 * @arg @ref LL_EXTI_LINE_8
497 * @arg @ref LL_EXTI_LINE_9
498 * @arg @ref LL_EXTI_LINE_10
499 * @arg @ref LL_EXTI_LINE_11
500 * @arg @ref LL_EXTI_LINE_12
501 * @arg @ref LL_EXTI_LINE_13
502 * @arg @ref LL_EXTI_LINE_14
503 * @arg @ref LL_EXTI_LINE_15
504 * @arg @ref LL_EXTI_LINE_16
505 * @arg @ref LL_EXTI_LINE_17
506 * @arg @ref LL_EXTI_LINE_18
507 * @arg @ref LL_EXTI_LINE_19
508 * @arg @ref LL_EXTI_LINE_20
509 * @arg @ref LL_EXTI_LINE_21
510 * @arg @ref LL_EXTI_LINE_22
511 * @arg @ref LL_EXTI_LINE_23
512 * @arg @ref LL_EXTI_LINE_24
513 * @arg @ref LL_EXTI_LINE_25
514 * @arg @ref LL_EXTI_LINE_26
515 * @arg @ref LL_EXTI_LINE_27
516 * @arg @ref LL_EXTI_LINE_28
517 * @arg @ref LL_EXTI_LINE_29
518 * @arg @ref LL_EXTI_LINE_30
519 * @arg @ref LL_EXTI_LINE_31
520 * @arg @ref LL_EXTI_LINE_ALL_0_31
521 * @note Please check each device line mapping for EXTI Line availability
522 * @retval None
523 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)524 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
525 {
526 SET_BIT(EXTI->EMR1, ExtiLine);
527
528 }
529
530 /**
531 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
532 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
533 * @param ExtiLine This parameter can be a combination of the following values:
534 * @arg @ref LL_EXTI_LINE_32
535 * @arg @ref LL_EXTI_LINE_33
536 * @arg @ref LL_EXTI_LINE_34
537 * @arg @ref LL_EXTI_LINE_35
538 * @arg @ref LL_EXTI_LINE_36
539 * @arg @ref LL_EXTI_LINE_37
540 * @arg @ref LL_EXTI_LINE_38
541 * @arg @ref LL_EXTI_LINE_40
542 * @arg @ref LL_EXTI_LINE_41
543 * @arg @ref LL_EXTI_LINE_42
544 * @arg @ref LL_EXTI_LINE_ALL_32_63
545 * @retval None
546 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)547 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
548 {
549 SET_BIT(EXTI->EMR2, ExtiLine);
550 }
551
552 /**
553 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
554 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
555 * @param ExtiLine This parameter can be one of the following values:
556 * @arg @ref LL_EXTI_LINE_0
557 * @arg @ref LL_EXTI_LINE_1
558 * @arg @ref LL_EXTI_LINE_2
559 * @arg @ref LL_EXTI_LINE_3
560 * @arg @ref LL_EXTI_LINE_4
561 * @arg @ref LL_EXTI_LINE_5
562 * @arg @ref LL_EXTI_LINE_6
563 * @arg @ref LL_EXTI_LINE_7
564 * @arg @ref LL_EXTI_LINE_8
565 * @arg @ref LL_EXTI_LINE_9
566 * @arg @ref LL_EXTI_LINE_10
567 * @arg @ref LL_EXTI_LINE_11
568 * @arg @ref LL_EXTI_LINE_12
569 * @arg @ref LL_EXTI_LINE_13
570 * @arg @ref LL_EXTI_LINE_14
571 * @arg @ref LL_EXTI_LINE_15
572 * @arg @ref LL_EXTI_LINE_16
573 * @arg @ref LL_EXTI_LINE_17
574 * @arg @ref LL_EXTI_LINE_18
575 * @arg @ref LL_EXTI_LINE_19
576 * @arg @ref LL_EXTI_LINE_20
577 * @arg @ref LL_EXTI_LINE_21
578 * @arg @ref LL_EXTI_LINE_22
579 * @arg @ref LL_EXTI_LINE_23
580 * @arg @ref LL_EXTI_LINE_24
581 * @arg @ref LL_EXTI_LINE_25
582 * @arg @ref LL_EXTI_LINE_26
583 * @arg @ref LL_EXTI_LINE_27
584 * @arg @ref LL_EXTI_LINE_28
585 * @arg @ref LL_EXTI_LINE_29
586 * @arg @ref LL_EXTI_LINE_30
587 * @arg @ref LL_EXTI_LINE_31
588 * @arg @ref LL_EXTI_LINE_ALL_0_31
589 * @note Please check each device line mapping for EXTI Line availability
590 * @retval None
591 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)592 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
593 {
594 CLEAR_BIT(EXTI->EMR1, ExtiLine);
595 }
596
597 /**
598 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
599 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
600 * @param ExtiLine This parameter can be a combination of the following values:
601 * @arg @ref LL_EXTI_LINE_32
602 * @arg @ref LL_EXTI_LINE_33
603 * @arg @ref LL_EXTI_LINE_34
604 * @arg @ref LL_EXTI_LINE_35
605 * @arg @ref LL_EXTI_LINE_36
606 * @arg @ref LL_EXTI_LINE_37
607 * @arg @ref LL_EXTI_LINE_38
608 * @arg @ref LL_EXTI_LINE_40
609 * @arg @ref LL_EXTI_LINE_41
610 * @arg @ref LL_EXTI_LINE_42
611 * @arg @ref LL_EXTI_LINE_ALL_32_63
612 * @retval None
613 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)614 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
615 {
616 CLEAR_BIT(EXTI->EMR2, ExtiLine);
617 }
618
619 /**
620 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
621 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
622 * @param ExtiLine This parameter can be one of the following values:
623 * @arg @ref LL_EXTI_LINE_0
624 * @arg @ref LL_EXTI_LINE_1
625 * @arg @ref LL_EXTI_LINE_2
626 * @arg @ref LL_EXTI_LINE_3
627 * @arg @ref LL_EXTI_LINE_4
628 * @arg @ref LL_EXTI_LINE_5
629 * @arg @ref LL_EXTI_LINE_6
630 * @arg @ref LL_EXTI_LINE_7
631 * @arg @ref LL_EXTI_LINE_8
632 * @arg @ref LL_EXTI_LINE_9
633 * @arg @ref LL_EXTI_LINE_10
634 * @arg @ref LL_EXTI_LINE_11
635 * @arg @ref LL_EXTI_LINE_12
636 * @arg @ref LL_EXTI_LINE_13
637 * @arg @ref LL_EXTI_LINE_14
638 * @arg @ref LL_EXTI_LINE_15
639 * @arg @ref LL_EXTI_LINE_16
640 * @arg @ref LL_EXTI_LINE_17
641 * @arg @ref LL_EXTI_LINE_18
642 * @arg @ref LL_EXTI_LINE_19
643 * @arg @ref LL_EXTI_LINE_20
644 * @arg @ref LL_EXTI_LINE_21
645 * @arg @ref LL_EXTI_LINE_22
646 * @arg @ref LL_EXTI_LINE_23
647 * @arg @ref LL_EXTI_LINE_24
648 * @arg @ref LL_EXTI_LINE_25
649 * @arg @ref LL_EXTI_LINE_26
650 * @arg @ref LL_EXTI_LINE_27
651 * @arg @ref LL_EXTI_LINE_28
652 * @arg @ref LL_EXTI_LINE_29
653 * @arg @ref LL_EXTI_LINE_30
654 * @arg @ref LL_EXTI_LINE_31
655 * @arg @ref LL_EXTI_LINE_ALL_0_31
656 * @note Please check each device line mapping for EXTI Line availability
657 * @retval State of bit (1 or 0).
658 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)659 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
660 {
661 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
662
663 }
664
665 /**
666 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
667 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
668 * @param ExtiLine This parameter can be a combination of the following values:
669 * @arg @ref LL_EXTI_LINE_32
670 * @arg @ref LL_EXTI_LINE_33
671 * @arg @ref LL_EXTI_LINE_34
672 * @arg @ref LL_EXTI_LINE_35
673 * @arg @ref LL_EXTI_LINE_36
674 * @arg @ref LL_EXTI_LINE_37
675 * @arg @ref LL_EXTI_LINE_38
676 * @arg @ref LL_EXTI_LINE_40
677 * @arg @ref LL_EXTI_LINE_41
678 * @arg @ref LL_EXTI_LINE_42
679 * @arg @ref LL_EXTI_LINE_ALL_32_63
680 * @retval State of bit (1 or 0).
681 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)682 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
683 {
684 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
685 }
686
687 /**
688 * @}
689 */
690
691 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
692 * @{
693 */
694
695 /**
696 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
697 * @note The configurable wakeup lines are edge-triggered. No glitch must be
698 * generated on these lines. If a rising edge on a configurable interrupt
699 * line occurs during a write operation in the EXTI_RTSR register, the
700 * pending bit is not set.
701 * Rising and falling edge triggers can be set for
702 * the same interrupt line. In this case, both generate a trigger
703 * condition.
704 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
705 * @param ExtiLine This parameter can be a combination of the following values:
706 * @arg @ref LL_EXTI_LINE_0
707 * @arg @ref LL_EXTI_LINE_1
708 * @arg @ref LL_EXTI_LINE_2
709 * @arg @ref LL_EXTI_LINE_3
710 * @arg @ref LL_EXTI_LINE_4
711 * @arg @ref LL_EXTI_LINE_5
712 * @arg @ref LL_EXTI_LINE_6
713 * @arg @ref LL_EXTI_LINE_7
714 * @arg @ref LL_EXTI_LINE_8
715 * @arg @ref LL_EXTI_LINE_9
716 * @arg @ref LL_EXTI_LINE_10
717 * @arg @ref LL_EXTI_LINE_11
718 * @arg @ref LL_EXTI_LINE_12
719 * @arg @ref LL_EXTI_LINE_13
720 * @arg @ref LL_EXTI_LINE_14
721 * @arg @ref LL_EXTI_LINE_15
722 * @arg @ref LL_EXTI_LINE_16
723 * @arg @ref LL_EXTI_LINE_21
724 * @arg @ref LL_EXTI_LINE_22
725 * @note Please check each device line mapping for EXTI Line availability
726 * @retval None
727 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)728 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
729 {
730 SET_BIT(EXTI->RTSR1, ExtiLine);
731
732 }
733
734 /**
735 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
736 * @note The configurable wakeup lines are edge-triggered. No glitch must be
737 * generated on these lines. If a rising edge on a configurable interrupt
738 * line occurs during a write operation in the EXTI_RTSR register, the
739 * pending bit is not set.Rising and falling edge triggers can be set for
740 * the same interrupt line. In this case, both generate a trigger
741 * condition.
742 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
743 * @param ExtiLine This parameter can be a combination of the following values:
744 * @arg @ref LL_EXTI_LINE_35
745 * @arg @ref LL_EXTI_LINE_36
746 * @arg @ref LL_EXTI_LINE_37
747 * @arg @ref LL_EXTI_LINE_38
748 * @retval None
749 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)750 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
751 {
752 SET_BIT(EXTI->RTSR2, ExtiLine);
753 }
754
755 /**
756 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
757 * @note The configurable wakeup lines are edge-triggered. No glitch must be
758 * generated on these lines. If a rising edge on a configurable interrupt
759 * line occurs during a write operation in the EXTI_RTSR register, the
760 * pending bit is not set.
761 * Rising and falling edge triggers can be set for
762 * the same interrupt line. In this case, both generate a trigger
763 * condition.
764 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
765 * @param ExtiLine This parameter can be a combination of the following values:
766 * @arg @ref LL_EXTI_LINE_0
767 * @arg @ref LL_EXTI_LINE_1
768 * @arg @ref LL_EXTI_LINE_2
769 * @arg @ref LL_EXTI_LINE_3
770 * @arg @ref LL_EXTI_LINE_4
771 * @arg @ref LL_EXTI_LINE_5
772 * @arg @ref LL_EXTI_LINE_6
773 * @arg @ref LL_EXTI_LINE_7
774 * @arg @ref LL_EXTI_LINE_8
775 * @arg @ref LL_EXTI_LINE_9
776 * @arg @ref LL_EXTI_LINE_10
777 * @arg @ref LL_EXTI_LINE_11
778 * @arg @ref LL_EXTI_LINE_12
779 * @arg @ref LL_EXTI_LINE_13
780 * @arg @ref LL_EXTI_LINE_14
781 * @arg @ref LL_EXTI_LINE_15
782 * @arg @ref LL_EXTI_LINE_16
783 * @arg @ref LL_EXTI_LINE_21
784 * @arg @ref LL_EXTI_LINE_22
785 * @note Please check each device line mapping for EXTI Line availability
786 * @retval None
787 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)788 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
789 {
790 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
791
792 }
793
794 /**
795 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
796 * @note The configurable wakeup lines are edge-triggered. No glitch must be
797 * generated on these lines. If a rising edge on a configurable interrupt
798 * line occurs during a write operation in the EXTI_RTSR register, the
799 * pending bit is not set.
800 * Rising and falling edge triggers can be set for
801 * the same interrupt line. In this case, both generate a trigger
802 * condition.
803 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
804 * @param ExtiLine This parameter can be a combination of the following values:
805 * @arg @ref LL_EXTI_LINE_35
806 * @arg @ref LL_EXTI_LINE_36
807 * @arg @ref LL_EXTI_LINE_37
808 * @arg @ref LL_EXTI_LINE_38
809 * @retval None
810 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)811 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
812 {
813 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
814 }
815
816 /**
817 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
818 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
819 * @param ExtiLine This parameter can be a combination of the following values:
820 * @arg @ref LL_EXTI_LINE_0
821 * @arg @ref LL_EXTI_LINE_1
822 * @arg @ref LL_EXTI_LINE_2
823 * @arg @ref LL_EXTI_LINE_3
824 * @arg @ref LL_EXTI_LINE_4
825 * @arg @ref LL_EXTI_LINE_5
826 * @arg @ref LL_EXTI_LINE_6
827 * @arg @ref LL_EXTI_LINE_7
828 * @arg @ref LL_EXTI_LINE_8
829 * @arg @ref LL_EXTI_LINE_9
830 * @arg @ref LL_EXTI_LINE_10
831 * @arg @ref LL_EXTI_LINE_11
832 * @arg @ref LL_EXTI_LINE_12
833 * @arg @ref LL_EXTI_LINE_13
834 * @arg @ref LL_EXTI_LINE_14
835 * @arg @ref LL_EXTI_LINE_15
836 * @arg @ref LL_EXTI_LINE_16
837 * @arg @ref LL_EXTI_LINE_21
838 * @arg @ref LL_EXTI_LINE_22
839 * @note Please check each device line mapping for EXTI Line availability
840 * @retval State of bit (1 or 0).
841 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)842 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
843 {
844 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
845 }
846
847 /**
848 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
849 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
850 * @param ExtiLine This parameter can be a combination of the following values:
851 * @arg @ref LL_EXTI_LINE_35
852 * @arg @ref LL_EXTI_LINE_36
853 * @arg @ref LL_EXTI_LINE_37
854 * @arg @ref LL_EXTI_LINE_38
855 * @retval State of bit (1 or 0).
856 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)857 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
858 {
859 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
860 }
861
862 /**
863 * @}
864 */
865
866 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
867 * @{
868 */
869
870 /**
871 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
872 * @note The configurable wakeup lines are edge-triggered. No glitch must be
873 * generated on these lines. If a falling edge on a configurable interrupt
874 * line occurs during a write operation in the EXTI_FTSR register, the
875 * pending bit is not set.
876 * Rising and falling edge triggers can be set for
877 * the same interrupt line. In this case, both generate a trigger
878 * condition.
879 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
880 * @param ExtiLine This parameter can be a combination of the following values:
881 * @arg @ref LL_EXTI_LINE_0
882 * @arg @ref LL_EXTI_LINE_1
883 * @arg @ref LL_EXTI_LINE_2
884 * @arg @ref LL_EXTI_LINE_3
885 * @arg @ref LL_EXTI_LINE_4
886 * @arg @ref LL_EXTI_LINE_5
887 * @arg @ref LL_EXTI_LINE_6
888 * @arg @ref LL_EXTI_LINE_7
889 * @arg @ref LL_EXTI_LINE_8
890 * @arg @ref LL_EXTI_LINE_9
891 * @arg @ref LL_EXTI_LINE_10
892 * @arg @ref LL_EXTI_LINE_11
893 * @arg @ref LL_EXTI_LINE_12
894 * @arg @ref LL_EXTI_LINE_13
895 * @arg @ref LL_EXTI_LINE_14
896 * @arg @ref LL_EXTI_LINE_15
897 * @arg @ref LL_EXTI_LINE_16
898 * @arg @ref LL_EXTI_LINE_21
899 * @arg @ref LL_EXTI_LINE_22
900 * @note Please check each device line mapping for EXTI Line availability
901 * @retval None
902 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)903 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
904 {
905 SET_BIT(EXTI->FTSR1, ExtiLine);
906 }
907
908 /**
909 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
910 * @note The configurable wakeup lines are edge-triggered. No glitch must be
911 * generated on these lines. If a Falling edge on a configurable interrupt
912 * line occurs during a write operation in the EXTI_FTSR register, the
913 * pending bit is not set.
914 * Rising and falling edge triggers can be set for
915 * the same interrupt line. In this case, both generate a trigger
916 * condition.
917 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
918 * @param ExtiLine This parameter can be a combination of the following values:
919 * @arg @ref LL_EXTI_LINE_35
920 * @arg @ref LL_EXTI_LINE_36
921 * @arg @ref LL_EXTI_LINE_37
922 * @arg @ref LL_EXTI_LINE_38
923 * @retval None
924 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)925 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
926 {
927 SET_BIT(EXTI->FTSR2, ExtiLine);
928 }
929
930 /**
931 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
932 * @note The configurable wakeup lines are edge-triggered. No glitch must be
933 * generated on these lines. If a Falling edge on a configurable interrupt
934 * line occurs during a write operation in the EXTI_FTSR register, the
935 * pending bit is not set.
936 * Rising and falling edge triggers can be set for the same interrupt line.
937 * In this case, both generate a trigger condition.
938 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
939 * @param ExtiLine This parameter can be a combination of the following values:
940 * @arg @ref LL_EXTI_LINE_0
941 * @arg @ref LL_EXTI_LINE_1
942 * @arg @ref LL_EXTI_LINE_2
943 * @arg @ref LL_EXTI_LINE_3
944 * @arg @ref LL_EXTI_LINE_4
945 * @arg @ref LL_EXTI_LINE_5
946 * @arg @ref LL_EXTI_LINE_6
947 * @arg @ref LL_EXTI_LINE_7
948 * @arg @ref LL_EXTI_LINE_8
949 * @arg @ref LL_EXTI_LINE_9
950 * @arg @ref LL_EXTI_LINE_10
951 * @arg @ref LL_EXTI_LINE_11
952 * @arg @ref LL_EXTI_LINE_12
953 * @arg @ref LL_EXTI_LINE_13
954 * @arg @ref LL_EXTI_LINE_14
955 * @arg @ref LL_EXTI_LINE_15
956 * @arg @ref LL_EXTI_LINE_16
957 * @arg @ref LL_EXTI_LINE_21
958 * @arg @ref LL_EXTI_LINE_22
959 * @note Please check each device line mapping for EXTI Line availability
960 * @retval None
961 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)962 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
963 {
964 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
965 }
966
967 /**
968 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
969 * @note The configurable wakeup lines are edge-triggered. No glitch must be
970 * generated on these lines. If a Falling edge on a configurable interrupt
971 * line occurs during a write operation in the EXTI_FTSR register, the
972 * pending bit is not set.
973 * Rising and falling edge triggers can be set for the same interrupt line.
974 * In this case, both generate a trigger condition.
975 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
976 * @param ExtiLine This parameter can be a combination of the following values:
977 * @arg @ref LL_EXTI_LINE_35
978 * @arg @ref LL_EXTI_LINE_36
979 * @arg @ref LL_EXTI_LINE_37
980 * @arg @ref LL_EXTI_LINE_38
981 * @retval None
982 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)983 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
984 {
985 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
986 }
987
988 /**
989 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
990 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
991 * @param ExtiLine This parameter can be a combination of the following values:
992 * @arg @ref LL_EXTI_LINE_0
993 * @arg @ref LL_EXTI_LINE_1
994 * @arg @ref LL_EXTI_LINE_2
995 * @arg @ref LL_EXTI_LINE_3
996 * @arg @ref LL_EXTI_LINE_4
997 * @arg @ref LL_EXTI_LINE_5
998 * @arg @ref LL_EXTI_LINE_6
999 * @arg @ref LL_EXTI_LINE_7
1000 * @arg @ref LL_EXTI_LINE_8
1001 * @arg @ref LL_EXTI_LINE_9
1002 * @arg @ref LL_EXTI_LINE_10
1003 * @arg @ref LL_EXTI_LINE_11
1004 * @arg @ref LL_EXTI_LINE_12
1005 * @arg @ref LL_EXTI_LINE_13
1006 * @arg @ref LL_EXTI_LINE_14
1007 * @arg @ref LL_EXTI_LINE_15
1008 * @arg @ref LL_EXTI_LINE_16
1009 * @arg @ref LL_EXTI_LINE_21
1010 * @arg @ref LL_EXTI_LINE_22
1011 * @note Please check each device line mapping for EXTI Line availability
1012 * @retval State of bit (1 or 0).
1013 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1014 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1015 {
1016 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1017 }
1018
1019 /**
1020 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1021 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1022 * @param ExtiLine This parameter can be a combination of the following values:
1023 * @arg @ref LL_EXTI_LINE_35
1024 * @arg @ref LL_EXTI_LINE_36
1025 * @arg @ref LL_EXTI_LINE_37
1026 * @arg @ref LL_EXTI_LINE_38
1027 * @retval State of bit (1 or 0).
1028 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1029 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1030 {
1031 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1032 }
1033
1034 /**
1035 * @}
1036 */
1037
1038 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1039 * @{
1040 */
1041
1042 /**
1043 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1044 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
1045 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
1046 * resulting in an interrupt request generation.
1047 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
1048 * register (by writing a 1 into the bit)
1049 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1050 * @param ExtiLine This parameter can be a combination of the following values:
1051 * @arg @ref LL_EXTI_LINE_0
1052 * @arg @ref LL_EXTI_LINE_1
1053 * @arg @ref LL_EXTI_LINE_2
1054 * @arg @ref LL_EXTI_LINE_3
1055 * @arg @ref LL_EXTI_LINE_4
1056 * @arg @ref LL_EXTI_LINE_5
1057 * @arg @ref LL_EXTI_LINE_6
1058 * @arg @ref LL_EXTI_LINE_7
1059 * @arg @ref LL_EXTI_LINE_8
1060 * @arg @ref LL_EXTI_LINE_9
1061 * @arg @ref LL_EXTI_LINE_10
1062 * @arg @ref LL_EXTI_LINE_11
1063 * @arg @ref LL_EXTI_LINE_12
1064 * @arg @ref LL_EXTI_LINE_13
1065 * @arg @ref LL_EXTI_LINE_14
1066 * @arg @ref LL_EXTI_LINE_15
1067 * @arg @ref LL_EXTI_LINE_16
1068 * @arg @ref LL_EXTI_LINE_21
1069 * @arg @ref LL_EXTI_LINE_22
1070 * @note Please check each device line mapping for EXTI Line availability
1071 * @retval None
1072 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1073 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1074 {
1075 SET_BIT(EXTI->SWIER1, ExtiLine);
1076 }
1077
1078 /**
1079 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1080 * @note If the interrupt is enabled on this line in the EXTI_IMR, writing a 1 to
1081 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
1082 * resulting in an interrupt request generation.
1083 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
1084 * register (by writing a 1 into the bit)
1085 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1086 * @param ExtiLine This parameter can be a combination of the following values:
1087 * @arg @ref LL_EXTI_LINE_35
1088 * @arg @ref LL_EXTI_LINE_36
1089 * @arg @ref LL_EXTI_LINE_37
1090 * @arg @ref LL_EXTI_LINE_38
1091 * @retval None
1092 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1093 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1094 {
1095 SET_BIT(EXTI->SWIER2, ExtiLine);
1096 }
1097
1098 /**
1099 * @}
1100 */
1101
1102 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1103 * @{
1104 */
1105
1106 /**
1107 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 0 to 31
1108 * @note This bit is set when the falling edge event arrives on the interrupt
1109 * line. This bit is cleared by writing a 1 to the bit.
1110 * @rmtoll FPR1 FPIFx LL_EXTI_IsActiveFallingFlag_0_31
1111 * @param ExtiLine This parameter can be a combination of the following values:
1112 * @arg @ref LL_EXTI_LINE_0
1113 * @arg @ref LL_EXTI_LINE_1
1114 * @arg @ref LL_EXTI_LINE_2
1115 * @arg @ref LL_EXTI_LINE_3
1116 * @arg @ref LL_EXTI_LINE_4
1117 * @arg @ref LL_EXTI_LINE_5
1118 * @arg @ref LL_EXTI_LINE_6
1119 * @arg @ref LL_EXTI_LINE_7
1120 * @arg @ref LL_EXTI_LINE_8
1121 * @arg @ref LL_EXTI_LINE_9
1122 * @arg @ref LL_EXTI_LINE_10
1123 * @arg @ref LL_EXTI_LINE_11
1124 * @arg @ref LL_EXTI_LINE_12
1125 * @arg @ref LL_EXTI_LINE_13
1126 * @arg @ref LL_EXTI_LINE_14
1127 * @arg @ref LL_EXTI_LINE_15
1128 * @arg @ref LL_EXTI_LINE_16
1129 * @arg @ref LL_EXTI_LINE_21
1130 * @arg @ref LL_EXTI_LINE_22
1131 * @note Please check each device line mapping for EXTI Line availability
1132 * @retval State of bit (1 or 0).
1133 */
LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)1134 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_0_31(uint32_t ExtiLine)
1135 {
1136 return ((READ_BIT(EXTI->FPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1137 }
1138
1139 /**
1140 * @brief Check if the ExtLine Falling Flag is set or not for Lines in range 32 to 63
1141 * @note This bit is set when the falling edge event arrives on the interrupt
1142 * line. This bit is cleared by writing a 1 to the bit.
1143 * @rmtoll FPR2 FPIFx LL_EXTI_IsActiveFallingFlag_32_63
1144 * @param ExtiLine This parameter can be a combination of the following values:
1145 * @arg @ref LL_EXTI_LINE_35
1146 * @arg @ref LL_EXTI_LINE_36
1147 * @arg @ref LL_EXTI_LINE_37
1148 * @arg @ref LL_EXTI_LINE_38
1149
1150 * @retval State of bit (1 or 0).
1151 */
LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)1152 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFallingFlag_32_63(uint32_t ExtiLine)
1153 {
1154 return ((READ_BIT(EXTI->FPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1155 }
1156
1157 /**
1158 * @brief Read ExtLine Combination Falling Flag for Lines in range 0 to 31
1159 * @note This bit is set when the falling edge event arrives on the interrupt
1160 * line. This bit is cleared by writing a 1 to the bit.
1161 * @rmtoll FPR1 FPIFx LL_EXTI_ReadFallingFlag_0_31
1162 * @param ExtiLine This parameter can be a combination of the following values:
1163 * @arg @ref LL_EXTI_LINE_0
1164 * @arg @ref LL_EXTI_LINE_1
1165 * @arg @ref LL_EXTI_LINE_2
1166 * @arg @ref LL_EXTI_LINE_3
1167 * @arg @ref LL_EXTI_LINE_4
1168 * @arg @ref LL_EXTI_LINE_5
1169 * @arg @ref LL_EXTI_LINE_6
1170 * @arg @ref LL_EXTI_LINE_7
1171 * @arg @ref LL_EXTI_LINE_8
1172 * @arg @ref LL_EXTI_LINE_9
1173 * @arg @ref LL_EXTI_LINE_10
1174 * @arg @ref LL_EXTI_LINE_11
1175 * @arg @ref LL_EXTI_LINE_12
1176 * @arg @ref LL_EXTI_LINE_13
1177 * @arg @ref LL_EXTI_LINE_14
1178 * @arg @ref LL_EXTI_LINE_15
1179 * @arg @ref LL_EXTI_LINE_16
1180 * @arg @ref LL_EXTI_LINE_21
1181 * @arg @ref LL_EXTI_LINE_22
1182 * @note Please check each device line mapping for EXTI Line availability
1183 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1184 */
LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)1185 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_0_31(uint32_t ExtiLine)
1186 {
1187 return (uint32_t)(READ_BIT(EXTI->FPR1, ExtiLine));
1188 }
1189
1190
1191 /**
1192 * @brief Read ExtLine Combination falling Flag for Lines in range 32 to 63
1193 * @note This bit is set when the falling edge event arrives on the interrupt
1194 * line. This bit is cleared by writing a 1 to the bit.
1195 * @rmtoll FPR2 FPIFx LL_EXTI_ReadFallingFlag_32_63
1196 * @param ExtiLine This parameter can be a combination of the following values:
1197 * @arg @ref LL_EXTI_LINE_35
1198 * @arg @ref LL_EXTI_LINE_36
1199 * @arg @ref LL_EXTI_LINE_37
1200 * @arg @ref LL_EXTI_LINE_38
1201 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1202 */
LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)1203 __STATIC_INLINE uint32_t LL_EXTI_ReadFallingFlag_32_63(uint32_t ExtiLine)
1204 {
1205 return (uint32_t)(READ_BIT(EXTI->FPR2, ExtiLine));
1206 }
1207
1208 /**
1209 * @brief Clear ExtLine Falling Flags for Lines in range 0 to 31
1210 * @note This bit is set when the falling edge event arrives on the interrupt
1211 * line. This bit is cleared by writing a 1 to the bit.
1212 * @rmtoll FPR1 FPIFx LL_EXTI_ClearFallingFlag_0_31
1213 * @param ExtiLine This parameter can be a combination of the following values:
1214 * @arg @ref LL_EXTI_LINE_0
1215 * @arg @ref LL_EXTI_LINE_1
1216 * @arg @ref LL_EXTI_LINE_2
1217 * @arg @ref LL_EXTI_LINE_3
1218 * @arg @ref LL_EXTI_LINE_4
1219 * @arg @ref LL_EXTI_LINE_5
1220 * @arg @ref LL_EXTI_LINE_6
1221 * @arg @ref LL_EXTI_LINE_7
1222 * @arg @ref LL_EXTI_LINE_8
1223 * @arg @ref LL_EXTI_LINE_9
1224 * @arg @ref LL_EXTI_LINE_10
1225 * @arg @ref LL_EXTI_LINE_11
1226 * @arg @ref LL_EXTI_LINE_12
1227 * @arg @ref LL_EXTI_LINE_13
1228 * @arg @ref LL_EXTI_LINE_14
1229 * @arg @ref LL_EXTI_LINE_15
1230 * @arg @ref LL_EXTI_LINE_16
1231 * @arg @ref LL_EXTI_LINE_21
1232 * @arg @ref LL_EXTI_LINE_22
1233 * @note Please check each device line mapping for EXTI Line availability
1234 * @retval None
1235 */
LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)1236 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_0_31(uint32_t ExtiLine)
1237 {
1238 WRITE_REG(EXTI->FPR1, ExtiLine);
1239 }
1240
1241 /**
1242 * @brief Clear ExtLine Falling Flags for Lines in range 32 to 63
1243 * @note This bit is set when the Falling edge event arrives on the interrupt
1244 * line. This bit is cleared by writing a 1 to the bit.
1245 * @rmtoll FPR2 FPIFx LL_EXTI_ClearFallingFlag_32_63
1246 * @param ExtiLine This parameter can be a combination of the following values:
1247 * @arg @ref LL_EXTI_LINE_35
1248 * @arg @ref LL_EXTI_LINE_36
1249 * @arg @ref LL_EXTI_LINE_37
1250 * @arg @ref LL_EXTI_LINE_38
1251 * @retval None
1252 */
LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)1253 __STATIC_INLINE void LL_EXTI_ClearFallingFlag_32_63(uint32_t ExtiLine)
1254 {
1255 WRITE_REG(EXTI->FPR2, ExtiLine);
1256 }
1257 /**
1258 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 0 to 31
1259 * @note This bit is set when the Rising edge event arrives on the interrupt
1260 * line. This bit is cleared by writing a 1 to the bit.
1261 * @rmtoll RPR1 RPIFx LL_EXTI_IsActiveRisingFlag_0_31
1262 * @param ExtiLine This parameter can be a combination of the following values:
1263 * @arg @ref LL_EXTI_LINE_0
1264 * @arg @ref LL_EXTI_LINE_1
1265 * @arg @ref LL_EXTI_LINE_2
1266 * @arg @ref LL_EXTI_LINE_3
1267 * @arg @ref LL_EXTI_LINE_4
1268 * @arg @ref LL_EXTI_LINE_5
1269 * @arg @ref LL_EXTI_LINE_6
1270 * @arg @ref LL_EXTI_LINE_7
1271 * @arg @ref LL_EXTI_LINE_8
1272 * @arg @ref LL_EXTI_LINE_9
1273 * @arg @ref LL_EXTI_LINE_10
1274 * @arg @ref LL_EXTI_LINE_11
1275 * @arg @ref LL_EXTI_LINE_12
1276 * @arg @ref LL_EXTI_LINE_13
1277 * @arg @ref LL_EXTI_LINE_14
1278 * @arg @ref LL_EXTI_LINE_15
1279 * @arg @ref LL_EXTI_LINE_16
1280 * @arg @ref LL_EXTI_LINE_21
1281 * @arg @ref LL_EXTI_LINE_22
1282 * @note Please check each device line mapping for EXTI Line availability
1283 * @retval State of bit (1 or 0).
1284 */
LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)1285 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_0_31(uint32_t ExtiLine)
1286 {
1287 return ((READ_BIT(EXTI->RPR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1288 }
1289
1290 /**
1291 * @brief Check if the ExtLine Rising Flag is set or not for Lines in range 32 to 63
1292 * @note This bit is set when the Rising edge event arrives on the interrupt
1293 * line. This bit is cleared by writing a 1 to the bit.
1294 * @rmtoll RPR2 RPIFx LL_EXTI_IsActiveRisingFlag_32_63
1295 * @param ExtiLine This parameter can be a combination of the following values:
1296 * @arg @ref LL_EXTI_LINE_35
1297 * @arg @ref LL_EXTI_LINE_36
1298 * @arg @ref LL_EXTI_LINE_37
1299 * @arg @ref LL_EXTI_LINE_38
1300 * @retval State of bit (1 or 0).
1301 */
LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)1302 __STATIC_INLINE uint32_t LL_EXTI_IsActiveRisingFlag_32_63(uint32_t ExtiLine)
1303 {
1304 return ((READ_BIT(EXTI->RPR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1305 }
1306
1307 /**
1308 * @brief Read ExtLine Combination Rising Flag for Lines in range 0 to 31
1309 * @note This bit is set when the Rising edge event arrives on the interrupt
1310 * line. This bit is cleared by writing a 1 to the bit.
1311 * @rmtoll RPR1 RPIFx LL_EXTI_ReadRisingFlag_0_31
1312 * @param ExtiLine This parameter can be a combination of the following values:
1313 * @arg @ref LL_EXTI_LINE_0
1314 * @arg @ref LL_EXTI_LINE_1
1315 * @arg @ref LL_EXTI_LINE_2
1316 * @arg @ref LL_EXTI_LINE_3
1317 * @arg @ref LL_EXTI_LINE_4
1318 * @arg @ref LL_EXTI_LINE_5
1319 * @arg @ref LL_EXTI_LINE_6
1320 * @arg @ref LL_EXTI_LINE_7
1321 * @arg @ref LL_EXTI_LINE_8
1322 * @arg @ref LL_EXTI_LINE_9
1323 * @arg @ref LL_EXTI_LINE_10
1324 * @arg @ref LL_EXTI_LINE_11
1325 * @arg @ref LL_EXTI_LINE_12
1326 * @arg @ref LL_EXTI_LINE_13
1327 * @arg @ref LL_EXTI_LINE_14
1328 * @arg @ref LL_EXTI_LINE_15
1329 * @arg @ref LL_EXTI_LINE_16
1330 * @arg @ref LL_EXTI_LINE_21
1331 * @arg @ref LL_EXTI_LINE_22
1332 * @note Please check each device line mapping for EXTI Line availability
1333 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1334 */
LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)1335 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_0_31(uint32_t ExtiLine)
1336 {
1337 return (uint32_t)(READ_BIT(EXTI->RPR1, ExtiLine));
1338 }
1339
1340
1341 /**
1342 * @brief Read ExtLine Combination Rising Flag for Lines in range 32 to 63
1343 * @note This bit is set when the Rising edge event arrives on the interrupt
1344 * line. This bit is cleared by writing a 1 to the bit.
1345 * @rmtoll RPR2 RPIFx LL_EXTI_ReadRisingFlag_32_63
1346 * @param ExtiLine This parameter can be a combination of the following values:
1347 * @arg @ref LL_EXTI_LINE_35
1348 * @arg @ref LL_EXTI_LINE_36
1349 * @arg @ref LL_EXTI_LINE_37
1350 * @arg @ref LL_EXTI_LINE_38
1351 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1352 */
LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)1353 __STATIC_INLINE uint32_t LL_EXTI_ReadRisingFlag_32_63(uint32_t ExtiLine)
1354 {
1355 return (uint32_t)(READ_BIT(EXTI->RPR2, ExtiLine));
1356 }
1357
1358 /**
1359 * @brief Clear ExtLine Rising Flags for Lines in range 0 to 31
1360 * @note This bit is set when the Rising edge event arrives on the interrupt
1361 * line. This bit is cleared by writing a 1 to the bit.
1362 * @rmtoll RPR1 RPIFx LL_EXTI_ClearRisingFlag_0_31
1363 * @param ExtiLine This parameter can be a combination of the following values:
1364 * @arg @ref LL_EXTI_LINE_0
1365 * @arg @ref LL_EXTI_LINE_1
1366 * @arg @ref LL_EXTI_LINE_2
1367 * @arg @ref LL_EXTI_LINE_3
1368 * @arg @ref LL_EXTI_LINE_4
1369 * @arg @ref LL_EXTI_LINE_5
1370 * @arg @ref LL_EXTI_LINE_6
1371 * @arg @ref LL_EXTI_LINE_7
1372 * @arg @ref LL_EXTI_LINE_8
1373 * @arg @ref LL_EXTI_LINE_9
1374 * @arg @ref LL_EXTI_LINE_10
1375 * @arg @ref LL_EXTI_LINE_11
1376 * @arg @ref LL_EXTI_LINE_12
1377 * @arg @ref LL_EXTI_LINE_13
1378 * @arg @ref LL_EXTI_LINE_14
1379 * @arg @ref LL_EXTI_LINE_15
1380 * @arg @ref LL_EXTI_LINE_16
1381 * @arg @ref LL_EXTI_LINE_21
1382 * @arg @ref LL_EXTI_LINE_22
1383 * @note Please check each device line mapping for EXTI Line availability
1384 * @retval None
1385 */
LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)1386 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_0_31(uint32_t ExtiLine)
1387 {
1388 WRITE_REG(EXTI->RPR1, ExtiLine);
1389 }
1390
1391 /**
1392 * @brief Clear ExtLine Rising Flags for Lines in range 32 to 63
1393 * @note This bit is set when the rising edge event arrives on the interrupt
1394 * line. This bit is cleared by writing a 1 to the bit.
1395 * @rmtoll FPR2 FPIFx LL_EXTI_ClearRisingFlag_32_63
1396 * @param ExtiLine This parameter can be a combination of the following values:
1397 * @arg @ref LL_EXTI_LINE_35
1398 * @arg @ref LL_EXTI_LINE_36
1399 * @arg @ref LL_EXTI_LINE_37
1400 * @arg @ref LL_EXTI_LINE_38
1401 * @retval None
1402 */
LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)1403 __STATIC_INLINE void LL_EXTI_ClearRisingFlag_32_63(uint32_t ExtiLine)
1404 {
1405 WRITE_REG(EXTI->RPR2, ExtiLine);
1406 }
1407
1408 /**
1409 * @}
1410 */
1411 /** @defgroup EXTI_LL_EF_Config EF configuration functions
1412 * @{
1413 */
1414
1415 /**
1416 * @brief Configure source input for the EXTI external interrupt.
1417 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_SetEXTISource\n
1418 * EXTI_EXTICR1 EXTI1 LL_EXTI_SetEXTISource\n
1419 * EXTI_EXTICR1 EXTI2 LL_EXTI_SetEXTISource\n
1420 * EXTI_EXTICR1 EXTI3 LL_EXTI_SetEXTISource\n
1421 * EXTI_EXTICR2 EXTI4 LL_EXTI_SetEXTISource\n
1422 * EXTI_EXTICR2 EXTI5 LL_EXTI_SetEXTISource\n
1423 * EXTI_EXTICR2 EXTI6 LL_EXTI_SetEXTISource\n
1424 * EXTI_EXTICR2 EXTI7 LL_EXTI_SetEXTISource\n
1425 * EXTI_EXTICR3 EXTI8 LL_EXTI_SetEXTISource\n
1426 * EXTI_EXTICR3 EXTI9 LL_EXTI_SetEXTISource\n
1427 * EXTI_EXTICR3 EXTI10 LL_EXTI_SetEXTISource\n
1428 * EXTI_EXTICR3 EXTI11 LL_EXTI_SetEXTISource\n
1429 * EXTI_EXTICR4 EXTI12 LL_EXTI_SetEXTISource\n
1430 * EXTI_EXTICR4 EXTI13 LL_EXTI_SetEXTISource\n
1431 * EXTI_EXTICR4 EXTI14 LL_EXTI_SetEXTISource\n
1432 * EXTI_EXTICR4 EXTI15 LL_EXTI_SetEXTISource
1433 * @param Port This parameter can be one of the following values:
1434 * @arg @ref LL_EXTI_EXTI_PORTA
1435 * @arg @ref LL_EXTI_EXTI_PORTB
1436 * @arg @ref LL_EXTI_EXTI_PORTC
1437 * @arg @ref LL_EXTI_EXTI_PORTD
1438 * @arg @ref LL_EXTI_EXTI_PORTE
1439 * @arg @ref LL_EXTI_EXTI_PORTF
1440 * @arg @ref LL_EXTI_EXTI_PORTG
1441 * @arg @ref LL_EXTI_EXTI_PORTH
1442 *
1443 * (*) value not defined in all devices
1444 * @param Line This parameter can be one of the following values:
1445 * @arg @ref LL_EXTI_EXTI_LINE0
1446 * @arg @ref LL_EXTI_EXTI_LINE1
1447 * @arg @ref LL_EXTI_EXTI_LINE2
1448 * @arg @ref LL_EXTI_EXTI_LINE3
1449 * @arg @ref LL_EXTI_EXTI_LINE4
1450 * @arg @ref LL_EXTI_EXTI_LINE5
1451 * @arg @ref LL_EXTI_EXTI_LINE6
1452 * @arg @ref LL_EXTI_EXTI_LINE7
1453 * @arg @ref LL_EXTI_EXTI_LINE8
1454 * @arg @ref LL_EXTI_EXTI_LINE9
1455 * @arg @ref LL_EXTI_EXTI_LINE10
1456 * @arg @ref LL_EXTI_EXTI_LINE11
1457 * @arg @ref LL_EXTI_EXTI_LINE12
1458 * @arg @ref LL_EXTI_EXTI_LINE13
1459 * @arg @ref LL_EXTI_EXTI_LINE14
1460 * @arg @ref LL_EXTI_EXTI_LINE15
1461 * @retval None
1462 */
LL_EXTI_SetEXTISource(uint32_t Port,uint32_t Line)1463 __STATIC_INLINE void LL_EXTI_SetEXTISource(uint32_t Port, uint32_t Line)
1464 {
1465 MODIFY_REG(EXTI->EXTICR[Line & 0x03U], EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT), Port << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1466 }
1467
1468 /**
1469 * @brief Get the configured defined for specific EXTI Line
1470 * @rmtoll EXTI_EXTICR1 EXTI0 LL_EXTI_GetEXTISource\n
1471 * EXTI_EXTICR1 EXTI1 LL_EXTI_GetEXTISource\n
1472 * EXTI_EXTICR1 EXTI2 LL_EXTI_GetEXTISource\n
1473 * EXTI_EXTICR1 EXTI3 LL_EXTI_GetEXTISource\n
1474 * EXTI_EXTICR2 EXTI4 LL_EXTI_GetEXTISource\n
1475 * EXTI_EXTICR2 EXTI5 LL_EXTI_GetEXTISource\n
1476 * EXTI_EXTICR2 EXTI6 LL_EXTI_GetEXTISource\n
1477 * EXTI_EXTICR2 EXTI7 LL_EXTI_GetEXTISource\n
1478 * EXTI_EXTICR3 EXTI8 LL_EXTI_GetEXTISource\n
1479 * EXTI_EXTICR3 EXTI9 LL_EXTI_GetEXTISource\n
1480 * EXTI_EXTICR3 EXTI10 LL_EXTI_GetEXTISource\n
1481 * EXTI_EXTICR3 EXTI11 LL_EXTI_GetEXTISource\n
1482 * EXTI_EXTICR4 EXTI12 LL_EXTI_GetEXTISource\n
1483 * EXTI_EXTICR4 EXTI13 LL_EXTI_GetEXTISource\n
1484 * EXTI_EXTICR4 EXTI14 LL_EXTI_GetEXTISource\n
1485 * EXTI_EXTICR4 EXTI15 LL_EXTI_GetEXTISource
1486 * @param Line This parameter can be one of the following values:
1487 * @arg @ref LL_EXTI_EXTI_LINE0
1488 * @arg @ref LL_EXTI_EXTI_LINE1
1489 * @arg @ref LL_EXTI_EXTI_LINE2
1490 * @arg @ref LL_EXTI_EXTI_LINE3
1491 * @arg @ref LL_EXTI_EXTI_LINE4
1492 * @arg @ref LL_EXTI_EXTI_LINE5
1493 * @arg @ref LL_EXTI_EXTI_LINE6
1494 * @arg @ref LL_EXTI_EXTI_LINE7
1495 * @arg @ref LL_EXTI_EXTI_LINE8
1496 * @arg @ref LL_EXTI_EXTI_LINE9
1497 * @arg @ref LL_EXTI_EXTI_LINE10
1498 * @arg @ref LL_EXTI_EXTI_LINE11
1499 * @arg @ref LL_EXTI_EXTI_LINE12
1500 * @arg @ref LL_EXTI_EXTI_LINE13
1501 * @arg @ref LL_EXTI_EXTI_LINE14
1502 * @arg @ref LL_EXTI_EXTI_LINE15
1503 * @retval Returned value can be one of the following values:
1504 * @arg @ref LL_EXTI_EXTI_PORTA
1505 * @arg @ref LL_EXTI_EXTI_PORTB
1506 * @arg @ref LL_EXTI_EXTI_PORTC
1507 * @arg @ref LL_EXTI_EXTI_PORTD
1508 * @arg @ref LL_EXTI_EXTI_PORTE
1509 * @arg @ref LL_EXTI_EXTI_PORTF
1510 * @arg @ref LL_EXTI_EXTI_PORTG
1511 * @arg @ref LL_EXTI_EXTI_PORTH
1512 */
LL_EXTI_GetEXTISource(uint32_t Line)1513 __STATIC_INLINE uint32_t LL_EXTI_GetEXTISource(uint32_t Line)
1514 {
1515 return (uint32_t)(READ_BIT(EXTI->EXTICR[Line & 0x03U], (EXTI_EXTICR1_EXTI0 << (Line >> LL_EXTI_REGISTER_PINPOS_SHFT))) >> (Line >> LL_EXTI_REGISTER_PINPOS_SHFT));
1516 }
1517 /**
1518 * @}
1519 */
1520
1521 /** @defgroup EXTI_LL_EF_Secure_Management Secure_Management
1522 * @{
1523 */
1524
1525 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
1526
1527 /**
1528 * @brief Enable ExtiLine Secure attribute for Lines in range 0 to 31
1529 * @rmtoll SECCFGR1 SECx LL_EXTI_EnableSecure_0_31
1530 * @param ExtiLine This parameter can be one of the following values:
1531 * @arg @ref LL_EXTI_LINE_0
1532 * @arg @ref LL_EXTI_LINE_1
1533 * @arg @ref LL_EXTI_LINE_2
1534 * @arg @ref LL_EXTI_LINE_3
1535 * @arg @ref LL_EXTI_LINE_4
1536 * @arg @ref LL_EXTI_LINE_5
1537 * @arg @ref LL_EXTI_LINE_6
1538 * @arg @ref LL_EXTI_LINE_7
1539 * @arg @ref LL_EXTI_LINE_8
1540 * @arg @ref LL_EXTI_LINE_9
1541 * @arg @ref LL_EXTI_LINE_10
1542 * @arg @ref LL_EXTI_LINE_11
1543 * @arg @ref LL_EXTI_LINE_12
1544 * @arg @ref LL_EXTI_LINE_13
1545 * @arg @ref LL_EXTI_LINE_14
1546 * @arg @ref LL_EXTI_LINE_15
1547 * @arg @ref LL_EXTI_LINE_16
1548 * @arg @ref LL_EXTI_LINE_17
1549 * @arg @ref LL_EXTI_LINE_18
1550 * @arg @ref LL_EXTI_LINE_19
1551 * @arg @ref LL_EXTI_LINE_20
1552 * @arg @ref LL_EXTI_LINE_21
1553 * @arg @ref LL_EXTI_LINE_22
1554 * @arg @ref LL_EXTI_LINE_23
1555 * @arg @ref LL_EXTI_LINE_24
1556 * @arg @ref LL_EXTI_LINE_25
1557 * @arg @ref LL_EXTI_LINE_26
1558 * @arg @ref LL_EXTI_LINE_27
1559 * @arg @ref LL_EXTI_LINE_28
1560 * @arg @ref LL_EXTI_LINE_29
1561 * @arg @ref LL_EXTI_LINE_30
1562 * @arg @ref LL_EXTI_LINE_31
1563 * @arg @ref LL_EXTI_LINE_ALL_0_31
1564 * @note Please check each device line mapping for EXTI Line availability
1565 * @retval None
1566 */
LL_EXTI_EnableSecure_0_31(uint32_t ExtiLine)1567 __STATIC_INLINE void LL_EXTI_EnableSecure_0_31(uint32_t ExtiLine)
1568 {
1569 SET_BIT(EXTI->SECCFGR1, ExtiLine);
1570 }
1571
1572 /**
1573 * @brief Enable ExtiLine Secure attribute for Lines in range 32 to 63
1574 * @rmtoll SECCFGR2 SECx LL_EXTI_EnableSecure_32_63
1575 * @param ExtiLine This parameter can be one of the following values:
1576 * @arg @ref LL_EXTI_LINE_32
1577 * @arg @ref LL_EXTI_LINE_33
1578 * @arg @ref LL_EXTI_LINE_34
1579 * @arg @ref LL_EXTI_LINE_35
1580 * @arg @ref LL_EXTI_LINE_36
1581 * @arg @ref LL_EXTI_LINE_37
1582 * @arg @ref LL_EXTI_LINE_38
1583 * @arg @ref LL_EXTI_LINE_40
1584 * @arg @ref LL_EXTI_LINE_41
1585 * @arg @ref LL_EXTI_LINE_42
1586 * @arg @ref LL_EXTI_LINE_ALL_32_63
1587 * @retval None
1588 */
LL_EXTI_EnableSecure_32_63(uint32_t ExtiLine)1589 __STATIC_INLINE void LL_EXTI_EnableSecure_32_63(uint32_t ExtiLine)
1590 {
1591 SET_BIT(EXTI->SECCFGR2, ExtiLine);
1592 }
1593
1594 /**
1595 * @brief Disable ExtiLine Secure attribute for Lines in range 0 to 31
1596 * @rmtoll SECCFGR1 SECx LL_EXTI_DisableSecure_0_31
1597 * @param ExtiLine This parameter can be one of the following values:
1598 * @arg @ref LL_EXTI_LINE_0
1599 * @arg @ref LL_EXTI_LINE_1
1600 * @arg @ref LL_EXTI_LINE_2
1601 * @arg @ref LL_EXTI_LINE_3
1602 * @arg @ref LL_EXTI_LINE_4
1603 * @arg @ref LL_EXTI_LINE_5
1604 * @arg @ref LL_EXTI_LINE_6
1605 * @arg @ref LL_EXTI_LINE_7
1606 * @arg @ref LL_EXTI_LINE_8
1607 * @arg @ref LL_EXTI_LINE_9
1608 * @arg @ref LL_EXTI_LINE_10
1609 * @arg @ref LL_EXTI_LINE_11
1610 * @arg @ref LL_EXTI_LINE_12
1611 * @arg @ref LL_EXTI_LINE_13
1612 * @arg @ref LL_EXTI_LINE_14
1613 * @arg @ref LL_EXTI_LINE_15
1614 * @arg @ref LL_EXTI_LINE_16
1615 * @arg @ref LL_EXTI_LINE_17
1616 * @arg @ref LL_EXTI_LINE_18
1617 * @arg @ref LL_EXTI_LINE_19
1618 * @arg @ref LL_EXTI_LINE_20
1619 * @arg @ref LL_EXTI_LINE_21
1620 * @arg @ref LL_EXTI_LINE_22
1621 * @arg @ref LL_EXTI_LINE_23
1622 * @arg @ref LL_EXTI_LINE_24
1623 * @arg @ref LL_EXTI_LINE_25
1624 * @arg @ref LL_EXTI_LINE_26
1625 * @arg @ref LL_EXTI_LINE_27
1626 * @arg @ref LL_EXTI_LINE_28
1627 * @arg @ref LL_EXTI_LINE_29
1628 * @arg @ref LL_EXTI_LINE_30
1629 * @arg @ref LL_EXTI_LINE_31
1630 * @arg @ref LL_EXTI_LINE_ALL_0_31
1631 * @note Please check each device line mapping for EXTI Line availability
1632 * @retval None
1633 */
LL_EXTI_DisableSecure_0_31(uint32_t ExtiLine)1634 __STATIC_INLINE void LL_EXTI_DisableSecure_0_31(uint32_t ExtiLine)
1635 {
1636 CLEAR_BIT(EXTI->SECCFGR1, ExtiLine);
1637 }
1638
1639 /**
1640 * @brief Disable ExtiLine Secure attribute for Lines in range 32 to 63
1641 * @rmtoll SECCFGR2 SECx LL_EXTI_DisableSecure_32_63
1642 * @param ExtiLine This parameter can be one of the following values:
1643 * @arg @ref LL_EXTI_LINE_32
1644 * @arg @ref LL_EXTI_LINE_33
1645 * @arg @ref LL_EXTI_LINE_34
1646 * @arg @ref LL_EXTI_LINE_35
1647 * @arg @ref LL_EXTI_LINE_36
1648 * @arg @ref LL_EXTI_LINE_37
1649 * @arg @ref LL_EXTI_LINE_38
1650 * @arg @ref LL_EXTI_LINE_40
1651 * @arg @ref LL_EXTI_LINE_41
1652 * @arg @ref LL_EXTI_LINE_42
1653 * @arg @ref LL_EXTI_LINE_ALL_32_63
1654 * @retval None
1655 */
LL_EXTI_DisableSecure_32_63(uint32_t ExtiLine)1656 __STATIC_INLINE void LL_EXTI_DisableSecure_32_63(uint32_t ExtiLine)
1657 {
1658 CLEAR_BIT(EXTI->SECCFGR2, ExtiLine);
1659 }
1660
1661 #endif /* __ARM_FEATURE_CMSE */
1662
1663 /**
1664 * @brief Indicate if ExtiLine Secure attribute is enabled for Lines in range 0 to 31
1665 * @rmtoll SECCFGR1 SECx LL_EXTI_IsEnabledSecure_0_31
1666 * @param ExtiLine This parameter can be one of the following values:
1667 * @arg @ref LL_EXTI_LINE_0
1668 * @arg @ref LL_EXTI_LINE_1
1669 * @arg @ref LL_EXTI_LINE_2
1670 * @arg @ref LL_EXTI_LINE_3
1671 * @arg @ref LL_EXTI_LINE_4
1672 * @arg @ref LL_EXTI_LINE_5
1673 * @arg @ref LL_EXTI_LINE_6
1674 * @arg @ref LL_EXTI_LINE_7
1675 * @arg @ref LL_EXTI_LINE_8
1676 * @arg @ref LL_EXTI_LINE_9
1677 * @arg @ref LL_EXTI_LINE_10
1678 * @arg @ref LL_EXTI_LINE_11
1679 * @arg @ref LL_EXTI_LINE_12
1680 * @arg @ref LL_EXTI_LINE_13
1681 * @arg @ref LL_EXTI_LINE_14
1682 * @arg @ref LL_EXTI_LINE_15
1683 * @arg @ref LL_EXTI_LINE_16
1684 * @arg @ref LL_EXTI_LINE_17
1685 * @arg @ref LL_EXTI_LINE_18
1686 * @arg @ref LL_EXTI_LINE_19
1687 * @arg @ref LL_EXTI_LINE_20
1688 * @arg @ref LL_EXTI_LINE_21
1689 * @arg @ref LL_EXTI_LINE_22
1690 * @arg @ref LL_EXTI_LINE_23
1691 * @arg @ref LL_EXTI_LINE_24
1692 * @arg @ref LL_EXTI_LINE_25
1693 * @arg @ref LL_EXTI_LINE_26
1694 * @arg @ref LL_EXTI_LINE_27
1695 * @arg @ref LL_EXTI_LINE_28
1696 * @arg @ref LL_EXTI_LINE_29
1697 * @arg @ref LL_EXTI_LINE_30
1698 * @arg @ref LL_EXTI_LINE_31
1699 * @arg @ref LL_EXTI_LINE_ALL_0_31
1700 * @note Please check each device line mapping for EXTI Line availability
1701 * @retval State of bit (1 or 0).
1702 */
LL_EXTI_IsEnabledSecure_0_31(uint32_t ExtiLine)1703 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledSecure_0_31(uint32_t ExtiLine)
1704 {
1705 return ((READ_BIT(EXTI->SECCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1706 }
1707
1708 /**
1709 * @brief Indicate if ExtiLine Secure attribute is enabled for Lines in range 32 to 63
1710 * @rmtoll SECCFGR2 SECx LL_EXTI_IsEnabledSecure_32_63
1711 * @param ExtiLine This parameter can be one of the following values:
1712 * @arg @ref LL_EXTI_LINE_32
1713 * @arg @ref LL_EXTI_LINE_33
1714 * @arg @ref LL_EXTI_LINE_34
1715 * @arg @ref LL_EXTI_LINE_35
1716 * @arg @ref LL_EXTI_LINE_36
1717 * @arg @ref LL_EXTI_LINE_37
1718 * @arg @ref LL_EXTI_LINE_38
1719 * @arg @ref LL_EXTI_LINE_40
1720 * @arg @ref LL_EXTI_LINE_41
1721 * @arg @ref LL_EXTI_LINE_42
1722 * @arg @ref LL_EXTI_LINE_ALL_32_63
1723 * @retval State of bit (1 or 0).
1724 */
LL_EXTI_IsEnabledSecure_32_63(uint32_t ExtiLine)1725 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledSecure_32_63(uint32_t ExtiLine)
1726 {
1727 return ((READ_BIT(EXTI->SECCFGR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1728 }
1729
1730 /**
1731 * @}
1732 */
1733
1734 /** @defgroup EXTI_LL_EF_Privilege_Management Privilege_Management
1735 * @{
1736 */
1737
1738 /**
1739 * @brief Enable ExtiLine Privilege attribute for Lines in range 0 to 31
1740 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_EnablePrivilege_0_31
1741 * @param ExtiLine This parameter can be one of the following values:
1742 * @arg @ref LL_EXTI_LINE_0
1743 * @arg @ref LL_EXTI_LINE_1
1744 * @arg @ref LL_EXTI_LINE_2
1745 * @arg @ref LL_EXTI_LINE_3
1746 * @arg @ref LL_EXTI_LINE_4
1747 * @arg @ref LL_EXTI_LINE_5
1748 * @arg @ref LL_EXTI_LINE_6
1749 * @arg @ref LL_EXTI_LINE_7
1750 * @arg @ref LL_EXTI_LINE_8
1751 * @arg @ref LL_EXTI_LINE_9
1752 * @arg @ref LL_EXTI_LINE_10
1753 * @arg @ref LL_EXTI_LINE_11
1754 * @arg @ref LL_EXTI_LINE_12
1755 * @arg @ref LL_EXTI_LINE_13
1756 * @arg @ref LL_EXTI_LINE_14
1757 * @arg @ref LL_EXTI_LINE_15
1758 * @arg @ref LL_EXTI_LINE_16
1759 * @arg @ref LL_EXTI_LINE_17
1760 * @arg @ref LL_EXTI_LINE_18
1761 * @arg @ref LL_EXTI_LINE_19
1762 * @arg @ref LL_EXTI_LINE_20
1763 * @arg @ref LL_EXTI_LINE_21
1764 * @arg @ref LL_EXTI_LINE_22
1765 * @arg @ref LL_EXTI_LINE_23
1766 * @arg @ref LL_EXTI_LINE_24
1767 * @arg @ref LL_EXTI_LINE_25
1768 * @arg @ref LL_EXTI_LINE_26
1769 * @arg @ref LL_EXTI_LINE_27
1770 * @arg @ref LL_EXTI_LINE_28
1771 * @arg @ref LL_EXTI_LINE_29
1772 * @arg @ref LL_EXTI_LINE_30
1773 * @arg @ref LL_EXTI_LINE_31
1774 * @arg @ref LL_EXTI_LINE_ALL_0_31
1775 * @note Please check each device line mapping for EXTI Line availability
1776 * @retval None
1777 */
LL_EXTI_EnablePrivilege_0_31(uint32_t ExtiLine)1778 __STATIC_INLINE void LL_EXTI_EnablePrivilege_0_31(uint32_t ExtiLine)
1779 {
1780 SET_BIT(EXTI->PRIVCFGR1, ExtiLine);
1781 }
1782
1783 /**
1784 * @brief Enable ExtiLine Privilege attribute for Lines in range 32 to 63
1785 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_EnablePrivilege_32_63
1786 * @param ExtiLine This parameter can be one of the following values:
1787 * @arg @ref LL_EXTI_LINE_32
1788 * @arg @ref LL_EXTI_LINE_33
1789 * @arg @ref LL_EXTI_LINE_34
1790 * @arg @ref LL_EXTI_LINE_35
1791 * @arg @ref LL_EXTI_LINE_36
1792 * @arg @ref LL_EXTI_LINE_37
1793 * @arg @ref LL_EXTI_LINE_38
1794 * @arg @ref LL_EXTI_LINE_40
1795 * @arg @ref LL_EXTI_LINE_41
1796 * @arg @ref LL_EXTI_LINE_42
1797 * @arg @ref LL_EXTI_LINE_ALL_32_63
1798 * @retval None
1799 */
LL_EXTI_EnablePrivilege_32_63(uint32_t ExtiLine)1800 __STATIC_INLINE void LL_EXTI_EnablePrivilege_32_63(uint32_t ExtiLine)
1801 {
1802 SET_BIT(EXTI->PRIVCFGR2, ExtiLine);
1803 }
1804
1805 /**
1806 * @brief Disable ExtiLine Privilege attribute for Lines in range 0 to 31
1807 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_DisablePrivilege_0_31
1808 * @param ExtiLine This parameter can be one of the following values:
1809 * @arg @ref LL_EXTI_LINE_0
1810 * @arg @ref LL_EXTI_LINE_1
1811 * @arg @ref LL_EXTI_LINE_2
1812 * @arg @ref LL_EXTI_LINE_3
1813 * @arg @ref LL_EXTI_LINE_4
1814 * @arg @ref LL_EXTI_LINE_5
1815 * @arg @ref LL_EXTI_LINE_6
1816 * @arg @ref LL_EXTI_LINE_7
1817 * @arg @ref LL_EXTI_LINE_8
1818 * @arg @ref LL_EXTI_LINE_9
1819 * @arg @ref LL_EXTI_LINE_10
1820 * @arg @ref LL_EXTI_LINE_11
1821 * @arg @ref LL_EXTI_LINE_12
1822 * @arg @ref LL_EXTI_LINE_13
1823 * @arg @ref LL_EXTI_LINE_14
1824 * @arg @ref LL_EXTI_LINE_15
1825 * @arg @ref LL_EXTI_LINE_16
1826 * @arg @ref LL_EXTI_LINE_17
1827 * @arg @ref LL_EXTI_LINE_18
1828 * @arg @ref LL_EXTI_LINE_19
1829 * @arg @ref LL_EXTI_LINE_20
1830 * @arg @ref LL_EXTI_LINE_21
1831 * @arg @ref LL_EXTI_LINE_22
1832 * @arg @ref LL_EXTI_LINE_23
1833 * @arg @ref LL_EXTI_LINE_24
1834 * @arg @ref LL_EXTI_LINE_25
1835 * @arg @ref LL_EXTI_LINE_26
1836 * @arg @ref LL_EXTI_LINE_27
1837 * @arg @ref LL_EXTI_LINE_28
1838 * @arg @ref LL_EXTI_LINE_29
1839 * @arg @ref LL_EXTI_LINE_30
1840 * @arg @ref LL_EXTI_LINE_31
1841 * @arg @ref LL_EXTI_LINE_ALL_0_31
1842 * @note Please check each device line mapping for EXTI Line availability
1843 * @retval None
1844 */
LL_EXTI_DisablePrivilege_0_31(uint32_t ExtiLine)1845 __STATIC_INLINE void LL_EXTI_DisablePrivilege_0_31(uint32_t ExtiLine)
1846 {
1847 CLEAR_BIT(EXTI->PRIVCFGR1, ExtiLine);
1848 }
1849
1850 /**
1851 * @brief Disable ExtiLine Privilege attribute for Lines in range 32 to 63
1852 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_DisablePrivilege_32_63
1853 * @param ExtiLine This parameter can be one of the following values:
1854 * @arg @ref LL_EXTI_LINE_32
1855 * @arg @ref LL_EXTI_LINE_33
1856 * @arg @ref LL_EXTI_LINE_34
1857 * @arg @ref LL_EXTI_LINE_35
1858 * @arg @ref LL_EXTI_LINE_36
1859 * @arg @ref LL_EXTI_LINE_37
1860 * @arg @ref LL_EXTI_LINE_38
1861 * @arg @ref LL_EXTI_LINE_40
1862 * @arg @ref LL_EXTI_LINE_41
1863 * @arg @ref LL_EXTI_LINE_42
1864 * @arg @ref LL_EXTI_LINE_ALL_32_63
1865 * @retval None
1866 */
LL_EXTI_DisablePrivilege_32_63(uint32_t ExtiLine)1867 __STATIC_INLINE void LL_EXTI_DisablePrivilege_32_63(uint32_t ExtiLine)
1868 {
1869 CLEAR_BIT(EXTI->PRIVCFGR2, ExtiLine);
1870 }
1871
1872 /**
1873 * @brief Indicate if ExtiLine Privilege attribute is enabled for Lines in range 0 to 31
1874 * @rmtoll PRIVCFGR1 PRIVx LL_EXTI_IsEnabledPrivilege_0_31
1875 * @param ExtiLine This parameter can be one of the following values:
1876 * @arg @ref LL_EXTI_LINE_0
1877 * @arg @ref LL_EXTI_LINE_1
1878 * @arg @ref LL_EXTI_LINE_2
1879 * @arg @ref LL_EXTI_LINE_3
1880 * @arg @ref LL_EXTI_LINE_4
1881 * @arg @ref LL_EXTI_LINE_5
1882 * @arg @ref LL_EXTI_LINE_6
1883 * @arg @ref LL_EXTI_LINE_7
1884 * @arg @ref LL_EXTI_LINE_8
1885 * @arg @ref LL_EXTI_LINE_9
1886 * @arg @ref LL_EXTI_LINE_10
1887 * @arg @ref LL_EXTI_LINE_11
1888 * @arg @ref LL_EXTI_LINE_12
1889 * @arg @ref LL_EXTI_LINE_13
1890 * @arg @ref LL_EXTI_LINE_14
1891 * @arg @ref LL_EXTI_LINE_15
1892 * @arg @ref LL_EXTI_LINE_16
1893 * @arg @ref LL_EXTI_LINE_17
1894 * @arg @ref LL_EXTI_LINE_18
1895 * @arg @ref LL_EXTI_LINE_19
1896 * @arg @ref LL_EXTI_LINE_20
1897 * @arg @ref LL_EXTI_LINE_21
1898 * @arg @ref LL_EXTI_LINE_22
1899 * @arg @ref LL_EXTI_LINE_23
1900 * @arg @ref LL_EXTI_LINE_24
1901 * @arg @ref LL_EXTI_LINE_25
1902 * @arg @ref LL_EXTI_LINE_26
1903 * @arg @ref LL_EXTI_LINE_27
1904 * @arg @ref LL_EXTI_LINE_28
1905 * @arg @ref LL_EXTI_LINE_29
1906 * @arg @ref LL_EXTI_LINE_30
1907 * @arg @ref LL_EXTI_LINE_31
1908 * @arg @ref LL_EXTI_LINE_ALL_0_31
1909 * @note Please check each device line mapping for EXTI Line availability
1910 * @retval State of bit (1 or 0).
1911 */
LL_EXTI_IsEnabledPrivilege_0_31(uint32_t ExtiLine)1912 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledPrivilege_0_31(uint32_t ExtiLine)
1913 {
1914 return ((READ_BIT(EXTI->PRIVCFGR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1915 }
1916
1917 /**
1918 * @brief Indicate if ExtiLine Privilege attribute is enabled for Lines in range 32 to 63
1919 * @rmtoll PRIVCFGR2 PRIVx LL_EXTI_IsEnabledPrivilege_32_63
1920 * @param ExtiLine This parameter can be one of the following values:
1921 * @arg @ref LL_EXTI_LINE_32
1922 * @arg @ref LL_EXTI_LINE_33
1923 * @arg @ref LL_EXTI_LINE_34
1924 * @arg @ref LL_EXTI_LINE_35
1925 * @arg @ref LL_EXTI_LINE_36
1926 * @arg @ref LL_EXTI_LINE_37
1927 * @arg @ref LL_EXTI_LINE_38
1928 * @arg @ref LL_EXTI_LINE_40
1929 * @arg @ref LL_EXTI_LINE_41
1930 * @arg @ref LL_EXTI_LINE_42
1931 * @arg @ref LL_EXTI_LINE_ALL_32_63
1932 * @retval State of bit (1 or 0).
1933 */
LL_EXTI_IsEnabledPrivilege_32_63(uint32_t ExtiLine)1934 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledPrivilege_32_63(uint32_t ExtiLine)
1935 {
1936 return ((READ_BIT(EXTI->PRIVCFGR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1937 }
1938
1939 /**
1940 * @}
1941 */
1942
1943 #if defined(USE_FULL_LL_DRIVER)
1944 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1945 * @{
1946 */
1947
1948 ErrorStatus LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1949 ErrorStatus LL_EXTI_DeInit(void);
1950 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1951
1952
1953 /**
1954 * @}
1955 */
1956 #endif /* USE_FULL_LL_DRIVER */
1957
1958 /**
1959 * @}
1960 */
1961
1962 /**
1963 * @}
1964 */
1965
1966 #endif /* EXTI */
1967
1968 /**
1969 * @}
1970 */
1971
1972 #ifdef __cplusplus
1973 }
1974 #endif
1975
1976 #endif /* STM32L5xx_LL_EXTI_H */
1977
1978
