1 /** 2 ****************************************************************************** 3 * @file stm32l5xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L5xx_HAL_UART_H 22 #define STM32L5xx_HAL_UART_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l5xx_hal_def.h" 30 31 /** @addtogroup STM32L5xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup UART 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup UART_Exported_Types UART Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief UART Init Structure definition 46 */ 47 typedef struct 48 { 49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 50 The baud rate register is computed using the following formula: 51 LPUART: 52 ======= 53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 55 UART: 56 ===== 57 - If oversampling is 16 or in LIN mode, 58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 59 - If oversampling is 8, 60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1 63 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 64 65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 66 This parameter can be a value of @ref UARTEx_Word_Length. */ 67 68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 69 This parameter can be a value of @ref UART_Stop_Bits. */ 70 71 uint32_t Parity; /*!< Specifies the parity mode. 72 This parameter can be a value of @ref UART_Parity 73 @note When parity is enabled, the computed parity is inserted 74 at the MSB position of the transmitted data (9th bit when 75 the word length is set to 9 data bits; 8th bit when the 76 word length is set to 8 data bits). */ 77 78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 79 This parameter can be a value of @ref UART_Mode. */ 80 81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 82 or disabled. 83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 84 85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8). 86 This parameter can be a value of @ref UART_Over_Sampling. */ 87 88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 89 Selecting the single sample method increases the receiver tolerance to clock 90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 91 92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 93 This parameter can be a value of @ref UART_ClockPrescaler. */ 94 95 } UART_InitTypeDef; 96 97 /** 98 * @brief UART Advanced Features initialization structure definition 99 */ 100 typedef struct 101 { 102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 103 Advanced Features may be initialized at the same time . 104 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */ 105 106 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 107 This parameter can be a value of @ref UART_Tx_Inv. */ 108 109 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 110 This parameter can be a value of @ref UART_Rx_Inv. */ 111 112 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 113 vs negative/inverted logic). 114 This parameter can be a value of @ref UART_Data_Inv. */ 115 116 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 117 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 118 119 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 120 This parameter can be a value of @ref UART_Overrun_Disable. */ 121 122 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 123 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 124 125 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 126 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 127 128 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 129 detection is carried out. 130 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 131 132 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 133 This parameter can be a value of @ref UART_MSB_First. */ 134 } UART_AdvFeatureInitTypeDef; 135 136 /** 137 * @brief HAL UART State definition 138 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition). 139 * - gState contains UART state information related to global Handle management 140 * and also information related to Tx operations. 141 * gState value coding follow below described bitmap : 142 * b7-b6 Error information 143 * 00 : No Error 144 * 01 : (Not Used) 145 * 10 : Timeout 146 * 11 : Error 147 * b5 Peripheral initialization status 148 * 0 : Reset (Peripheral not initialized) 149 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 150 * b4-b3 (not used) 151 * xx : Should be set to 00 152 * b2 Intrinsic process state 153 * 0 : Ready 154 * 1 : Busy (Peripheral busy with some configuration or internal operations) 155 * b1 (not used) 156 * x : Should be set to 0 157 * b0 Tx state 158 * 0 : Ready (no Tx operation ongoing) 159 * 1 : Busy (Tx operation ongoing) 160 * - RxState contains information related to Rx operations. 161 * RxState value coding follow below described bitmap : 162 * b7-b6 (not used) 163 * xx : Should be set to 00 164 * b5 Peripheral initialization status 165 * 0 : Reset (Peripheral not initialized) 166 * 1 : Init done (Peripheral initialized) 167 * b4-b2 (not used) 168 * xxx : Should be set to 000 169 * b1 Rx state 170 * 0 : Ready (no Rx operation ongoing) 171 * 1 : Busy (Rx operation ongoing) 172 * b0 (not used) 173 * x : Should be set to 0. 174 */ 175 typedef uint32_t HAL_UART_StateTypeDef; 176 177 /** 178 * @brief UART clock sources definition 179 */ 180 typedef enum 181 { 182 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 183 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 184 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 185 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 186 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 187 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 188 } UART_ClockSourceTypeDef; 189 190 /** 191 * @brief HAL UART Reception type definition 192 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 193 * It is expected to admit following values : 194 * HAL_UART_RECEPTION_STANDARD = 0x00U, 195 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 196 * HAL_UART_RECEPTION_TORTO = 0x02U, 197 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 198 */ 199 typedef uint32_t HAL_UART_RxTypeTypeDef; 200 201 /** 202 * @brief UART handle Structure definition 203 */ 204 typedef struct __UART_HandleTypeDef 205 { 206 USART_TypeDef *Instance; /*!< UART registers base address */ 207 208 UART_InitTypeDef Init; /*!< UART communication parameters */ 209 210 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 211 212 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 213 214 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 215 216 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 217 218 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 219 220 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 221 222 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 223 224 uint16_t Mask; /*!< UART Rx RDR register mask */ 225 226 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 227 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 228 229 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 230 231 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 232 233 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 234 235 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 236 237 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 238 239 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 240 241 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 242 243 HAL_LockTypeDef Lock; /*!< Locking object */ 244 245 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 246 and also related to Tx operations. 247 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 248 249 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. 250 This parameter can be a value of @ref HAL_UART_StateTypeDef */ 251 252 __IO uint32_t ErrorCode; /*!< UART Error code */ 253 254 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 255 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 256 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 257 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 258 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 259 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 260 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 261 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 262 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 263 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 264 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 265 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 266 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 267 268 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 269 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 270 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 271 272 } UART_HandleTypeDef; 273 274 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 275 /** 276 * @brief HAL UART Callback ID enumeration definition 277 */ 278 typedef enum 279 { 280 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 281 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 282 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 283 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 284 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 285 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 286 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 287 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 288 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 289 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 290 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 291 292 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 293 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 294 295 } HAL_UART_CallbackIDTypeDef; 296 297 /** 298 * @brief HAL UART Callback pointer definition 299 */ 300 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 301 typedef void (*pUART_RxEventCallbackTypeDef)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 302 303 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 304 305 /** 306 * @} 307 */ 308 309 /* Exported constants --------------------------------------------------------*/ 310 /** @defgroup UART_Exported_Constants UART Exported Constants 311 * @{ 312 */ 313 314 /** @defgroup UART_State_Definition UART State Code Definition 315 * @{ 316 */ 317 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 318 Value is allowed for gState and RxState */ 319 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 320 Value is allowed for gState and RxState */ 321 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 322 Value is allowed for gState only */ 323 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 324 Value is allowed for gState only */ 325 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 326 Value is allowed for RxState only */ 327 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 328 Not to be used for neither gState nor RxState. 329 Value is result of combination (Or) between gState and RxState values */ 330 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 331 Value is allowed for gState only */ 332 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 333 Value is allowed for gState only */ 334 /** 335 * @} 336 */ 337 338 /** @defgroup UART_Error_Definition UART Error Definition 339 * @{ 340 */ 341 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ 342 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */ 343 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */ 344 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */ 345 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */ 346 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */ 347 #define HAL_UART_ERROR_RTO ((uint32_t)0x00000020U) /*!< Receiver Timeout error */ 348 349 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 350 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000040U) /*!< Invalid Callback error */ 351 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 352 /** 353 * @} 354 */ 355 356 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 357 * @{ 358 */ 359 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 360 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 361 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 362 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 363 /** 364 * @} 365 */ 366 367 /** @defgroup UART_Parity UART Parity 368 * @{ 369 */ 370 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 371 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 372 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 373 /** 374 * @} 375 */ 376 377 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 378 * @{ 379 */ 380 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 381 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 382 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 383 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 384 /** 385 * @} 386 */ 387 388 /** @defgroup UART_Mode UART Transfer Mode 389 * @{ 390 */ 391 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 392 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 393 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 394 /** 395 * @} 396 */ 397 398 /** @defgroup UART_State UART State 399 * @{ 400 */ 401 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 402 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 403 /** 404 * @} 405 */ 406 407 /** @defgroup UART_Over_Sampling UART Over Sampling 408 * @{ 409 */ 410 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 411 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 412 /** 413 * @} 414 */ 415 416 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 417 * @{ 418 */ 419 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 420 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 421 /** 422 * @} 423 */ 424 425 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 426 * @{ 427 */ 428 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 429 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 430 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 431 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 432 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 433 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 434 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 435 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 436 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 437 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 438 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 439 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 440 /** 441 * @} 442 */ 443 444 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 445 * @{ 446 */ 447 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */ 448 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */ 449 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */ 450 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */ 451 /** 452 * @} 453 */ 454 455 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 456 * @{ 457 */ 458 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 459 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 460 /** 461 * @} 462 */ 463 464 /** @defgroup UART_LIN UART Local Interconnection Network mode 465 * @{ 466 */ 467 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 468 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 469 /** 470 * @} 471 */ 472 473 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 474 * @{ 475 */ 476 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 477 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 478 /** 479 * @} 480 */ 481 482 /** @defgroup UART_DMA_Tx UART DMA Tx 483 * @{ 484 */ 485 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 486 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 487 /** 488 * @} 489 */ 490 491 /** @defgroup UART_DMA_Rx UART DMA Rx 492 * @{ 493 */ 494 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 495 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 496 /** 497 * @} 498 */ 499 500 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 501 * @{ 502 */ 503 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 504 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 505 /** 506 * @} 507 */ 508 509 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 510 * @{ 511 */ 512 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 513 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 514 /** 515 * @} 516 */ 517 518 /** @defgroup UART_Request_Parameters UART Request Parameters 519 * @{ 520 */ 521 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 522 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 523 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 524 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 525 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 526 /** 527 * @} 528 */ 529 530 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 531 * @{ 532 */ 533 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 534 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 535 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 536 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 537 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 538 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 539 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 540 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 541 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 542 /** 543 * @} 544 */ 545 546 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 547 * @{ 548 */ 549 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 550 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 551 /** 552 * @} 553 */ 554 555 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 556 * @{ 557 */ 558 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 559 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 560 /** 561 * @} 562 */ 563 564 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 565 * @{ 566 */ 567 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 568 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 569 /** 570 * @} 571 */ 572 573 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 574 * @{ 575 */ 576 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 577 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 578 /** 579 * @} 580 */ 581 582 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 583 * @{ 584 */ 585 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 586 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 587 /** 588 * @} 589 */ 590 591 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 592 * @{ 593 */ 594 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 595 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 596 /** 597 * @} 598 */ 599 600 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 601 * @{ 602 */ 603 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 604 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 605 /** 606 * @} 607 */ 608 609 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 610 * @{ 611 */ 612 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */ 613 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */ 614 /** 615 * @} 616 */ 617 618 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 619 * @{ 620 */ 621 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 622 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 623 /** 624 * @} 625 */ 626 627 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 628 * @{ 629 */ 630 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 631 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 632 /** 633 * @} 634 */ 635 636 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 637 * @{ 638 */ 639 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 640 /** 641 * @} 642 */ 643 644 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 645 * @{ 646 */ 647 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 648 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 649 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */ 650 /** 651 * @} 652 */ 653 654 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 655 * @{ 656 */ 657 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 658 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 659 /** 660 * @} 661 */ 662 663 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 664 * @{ 665 */ 666 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */ 667 /** 668 * @} 669 */ 670 671 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 672 * @{ 673 */ 674 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */ 675 /** 676 * @} 677 */ 678 679 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 680 * @{ 681 */ 682 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 683 /** 684 * @} 685 */ 686 687 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 688 * @{ 689 */ 690 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 691 /** 692 * @} 693 */ 694 695 /** @defgroup UART_Flags UART Status Flags 696 * Elements values convention: 0xXXXX 697 * - 0xXXXX : Flag mask in the ISR register 698 * @{ 699 */ 700 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 701 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 702 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 703 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 704 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 705 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 706 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 707 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 708 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 709 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 710 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 711 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 712 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 713 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 714 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 715 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 716 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 717 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 718 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 719 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 720 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 721 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 722 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 723 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 724 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 725 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 726 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 727 /** 728 * @} 729 */ 730 731 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 732 * Elements values convention: 000ZZZZZ0XXYYYYYb 733 * - YYYYY : Interrupt source position in the XX register (5bits) 734 * - XX : Interrupt source register (2bits) 735 * - 01: CR1 register 736 * - 10: CR2 register 737 * - 11: CR3 register 738 * - ZZZZZ : Flag position in the ISR register(5bits) 739 * Elements values convention: 000000000XXYYYYYb 740 * - YYYYY : Interrupt source position in the XX register (5bits) 741 * - XX : Interrupt source register (2bits) 742 * - 01: CR1 register 743 * - 10: CR2 register 744 * - 11: CR3 register 745 * Elements values convention: 0000ZZZZ00000000b 746 * - ZZZZ : Flag position in the ISR register(4bits) 747 * @{ 748 */ 749 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 750 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 751 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 752 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 753 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 754 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 755 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 756 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 757 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 758 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 759 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 760 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 761 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 762 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 763 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 764 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 765 766 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 767 768 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 769 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 770 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 771 /** 772 * @} 773 */ 774 775 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 776 * @{ 777 */ 778 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 779 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 780 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 781 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 782 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 783 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 784 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 785 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 786 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 787 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 788 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 789 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 790 /** 791 * @} 792 */ 793 794 /** @defgroup UART_RECEPTION_TYPE_Values UART Reception type values 795 * @{ 796 */ 797 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 798 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 799 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 800 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 801 /** 802 * @} 803 */ 804 805 /** 806 * @} 807 */ 808 809 /* Exported macros -----------------------------------------------------------*/ 810 /** @defgroup UART_Exported_Macros UART Exported Macros 811 * @{ 812 */ 813 814 /** @brief Reset UART handle states. 815 * @param __HANDLE__ UART handle. 816 * @retval None 817 */ 818 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 819 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 820 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 821 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 822 (__HANDLE__)->MspInitCallback = NULL; \ 823 (__HANDLE__)->MspDeInitCallback = NULL; \ 824 } while(0U) 825 #else 826 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 827 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 828 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 829 } while(0U) 830 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 831 832 /** @brief Flush the UART Data registers. 833 * @param __HANDLE__ specifies the UART Handle. 834 * @retval None 835 */ 836 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 837 do{ \ 838 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 839 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 840 } while(0U) 841 842 /** @brief Clear the specified UART pending flag. 843 * @param __HANDLE__ specifies the UART Handle. 844 * @param __FLAG__ specifies the flag to check. 845 * This parameter can be any combination of the following values: 846 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 847 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 848 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 849 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 850 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 851 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 852 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 853 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 854 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 855 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 856 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 857 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 858 * @retval None 859 */ 860 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 861 862 /** @brief Clear the UART PE pending flag. 863 * @param __HANDLE__ specifies the UART Handle. 864 * @retval None 865 */ 866 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 867 868 /** @brief Clear the UART FE pending flag. 869 * @param __HANDLE__ specifies the UART Handle. 870 * @retval None 871 */ 872 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 873 874 /** @brief Clear the UART NE pending flag. 875 * @param __HANDLE__ specifies the UART Handle. 876 * @retval None 877 */ 878 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 879 880 /** @brief Clear the UART ORE pending flag. 881 * @param __HANDLE__ specifies the UART Handle. 882 * @retval None 883 */ 884 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 885 886 /** @brief Clear the UART IDLE pending flag. 887 * @param __HANDLE__ specifies the UART Handle. 888 * @retval None 889 */ 890 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 891 892 /** @brief Clear the UART TX FIFO empty clear flag. 893 * @param __HANDLE__ specifies the UART Handle. 894 * @retval None 895 */ 896 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 897 898 /** @brief Check whether the specified UART flag is set or not. 899 * @param __HANDLE__ specifies the UART Handle. 900 * @param __FLAG__ specifies the flag to check. 901 * This parameter can be one of the following values: 902 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 903 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 904 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 905 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 906 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 907 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 908 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 909 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 910 * @arg @ref UART_FLAG_SBKF Send Break flag 911 * @arg @ref UART_FLAG_CMF Character match flag 912 * @arg @ref UART_FLAG_BUSY Busy flag 913 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 914 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 915 * @arg @ref UART_FLAG_CTS CTS Change flag 916 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 917 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 918 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 919 * @arg @ref UART_FLAG_TC Transmission Complete flag 920 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 921 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 922 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 923 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 924 * @arg @ref UART_FLAG_ORE Overrun Error flag 925 * @arg @ref UART_FLAG_NE Noise Error flag 926 * @arg @ref UART_FLAG_FE Framing Error flag 927 * @arg @ref UART_FLAG_PE Parity Error flag 928 * @retval The new state of __FLAG__ (TRUE or FALSE). 929 */ 930 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 931 932 /** @brief Enable the specified UART interrupt. 933 * @param __HANDLE__ specifies the UART Handle. 934 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 935 * This parameter can be one of the following values: 936 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 937 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 938 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 939 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 940 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 941 * @arg @ref UART_IT_CM Character match interrupt 942 * @arg @ref UART_IT_CTS CTS change interrupt 943 * @arg @ref UART_IT_LBD LIN Break detection interrupt 944 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 945 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 946 * @arg @ref UART_IT_TC Transmission complete interrupt 947 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 948 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 949 * @arg @ref UART_IT_RTO Receive Timeout interrupt 950 * @arg @ref UART_IT_IDLE Idle line detection interrupt 951 * @arg @ref UART_IT_PE Parity Error interrupt 952 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 953 * @retval None 954 */ 955 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 956 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 957 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 958 959 960 /** @brief Disable the specified UART interrupt. 961 * @param __HANDLE__ specifies the UART Handle. 962 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 963 * This parameter can be one of the following values: 964 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 965 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 966 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 967 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 968 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 969 * @arg @ref UART_IT_CM Character match interrupt 970 * @arg @ref UART_IT_CTS CTS change interrupt 971 * @arg @ref UART_IT_LBD LIN Break detection interrupt 972 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 973 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 974 * @arg @ref UART_IT_TC Transmission complete interrupt 975 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 976 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 977 * @arg @ref UART_IT_RTO Receive Timeout interrupt 978 * @arg @ref UART_IT_IDLE Idle line detection interrupt 979 * @arg @ref UART_IT_PE Parity Error interrupt 980 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 981 * @retval None 982 */ 983 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 984 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \ 985 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK)))) 986 987 /** @brief Check whether the specified UART interrupt has occurred or not. 988 * @param __HANDLE__ specifies the UART Handle. 989 * @param __INTERRUPT__ specifies the UART interrupt to check. 990 * This parameter can be one of the following values: 991 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 992 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 993 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 994 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 995 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 996 * @arg @ref UART_IT_CM Character match interrupt 997 * @arg @ref UART_IT_CTS CTS change interrupt 998 * @arg @ref UART_IT_LBD LIN Break detection interrupt 999 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1000 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1001 * @arg @ref UART_IT_TC Transmission complete interrupt 1002 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1003 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1004 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1005 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1006 * @arg @ref UART_IT_PE Parity Error interrupt 1007 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1008 * @retval The new state of __INTERRUPT__ (SET or RESET). 1009 */ 1010 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1011 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1012 1013 /** @brief Check whether the specified UART interrupt source is enabled or not. 1014 * @param __HANDLE__ specifies the UART Handle. 1015 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1016 * This parameter can be one of the following values: 1017 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1018 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1019 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1020 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1021 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1022 * @arg @ref UART_IT_CM Character match interrupt 1023 * @arg @ref UART_IT_CTS CTS change interrupt 1024 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1025 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1026 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1027 * @arg @ref UART_IT_TC Transmission complete interrupt 1028 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1029 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1030 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1031 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1032 * @arg @ref UART_IT_PE Parity Error interrupt 1033 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1034 * @retval The new state of __INTERRUPT__ (SET or RESET). 1035 */ 1036 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \ 1037 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \ 1038 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET) 1039 1040 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1041 * @param __HANDLE__ specifies the UART Handle. 1042 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1043 * to clear the corresponding interrupt 1044 * This parameter can be one of the following values: 1045 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1046 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1047 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1048 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1049 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1050 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1051 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1052 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1053 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1054 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1055 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1056 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1057 * @retval None 1058 */ 1059 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1060 1061 /** @brief Set a specific UART request flag. 1062 * @param __HANDLE__ specifies the UART Handle. 1063 * @param __REQ__ specifies the request flag to set 1064 * This parameter can be one of the following values: 1065 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1066 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1067 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1068 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1069 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1070 * @retval None 1071 */ 1072 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1073 1074 /** @brief Enable the UART one bit sample method. 1075 * @param __HANDLE__ specifies the UART Handle. 1076 * @retval None 1077 */ 1078 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1079 1080 /** @brief Disable the UART one bit sample method. 1081 * @param __HANDLE__ specifies the UART Handle. 1082 * @retval None 1083 */ 1084 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1085 1086 /** @brief Enable UART. 1087 * @param __HANDLE__ specifies the UART Handle. 1088 * @retval None 1089 */ 1090 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1091 1092 /** @brief Disable UART. 1093 * @param __HANDLE__ specifies the UART Handle. 1094 * @retval None 1095 */ 1096 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1097 1098 /** @brief Enable CTS flow control. 1099 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1100 * without need to call HAL_UART_Init() function. 1101 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1102 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1103 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1104 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1105 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1106 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1107 * @param __HANDLE__ specifies the UART Handle. 1108 * @retval None 1109 */ 1110 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1111 do{ \ 1112 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1113 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1114 } while(0U) 1115 1116 /** @brief Disable CTS flow control. 1117 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1118 * without need to call HAL_UART_Init() function. 1119 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1120 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1121 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1122 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1123 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1124 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1125 * @param __HANDLE__ specifies the UART Handle. 1126 * @retval None 1127 */ 1128 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1129 do{ \ 1130 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1131 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1132 } while(0U) 1133 1134 /** @brief Enable RTS flow control. 1135 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1136 * without need to call HAL_UART_Init() function. 1137 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1138 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1139 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1140 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1141 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1142 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1143 * @param __HANDLE__ specifies the UART Handle. 1144 * @retval None 1145 */ 1146 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1147 do{ \ 1148 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1149 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1150 } while(0U) 1151 1152 /** @brief Disable RTS flow control. 1153 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1154 * without need to call HAL_UART_Init() function. 1155 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1156 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1157 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1158 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1159 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__)) 1160 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1161 * @param __HANDLE__ specifies the UART Handle. 1162 * @retval None 1163 */ 1164 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1165 do{ \ 1166 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1167 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1168 } while(0U) 1169 /** 1170 * @} 1171 */ 1172 1173 /* Private macros --------------------------------------------------------*/ 1174 /** @defgroup UART_Private_Macros UART Private Macros 1175 * @{ 1176 */ 1177 /** @brief Get UART clok division factor from clock prescaler value. 1178 * @param __CLOCKPRESCALER__ UART prescaler value. 1179 * @retval UART clock division factor 1180 */ 1181 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1182 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1183 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1184 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1185 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1186 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1187 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1188 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1189 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1190 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1191 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1192 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \ 1193 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U) 1194 1195 /** @brief BRR division operation to set BRR register with LPUART. 1196 * @param __PCLK__ LPUART clock. 1197 * @param __BAUD__ Baud rate set by the user. 1198 * @param __CLOCKPRESCALER__ UART prescaler value. 1199 * @retval Division result 1200 */ 1201 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)\ 1202 + (uint32_t)((__BAUD__)/2U)) / (__BAUD__))) 1203 1204 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1205 * @param __PCLK__ UART clock. 1206 * @param __BAUD__ Baud rate set by the user. 1207 * @param __CLOCKPRESCALER__ UART prescaler value. 1208 * @retval Division result 1209 */ 1210 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U)\ 1211 + ((__BAUD__)/2U)) / (__BAUD__)) 1212 1213 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1214 * @param __PCLK__ UART clock. 1215 * @param __BAUD__ Baud rate set by the user. 1216 * @param __CLOCKPRESCALER__ UART prescaler value. 1217 * @retval Division result 1218 */ 1219 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])\ 1220 + ((__BAUD__)/2U)) / (__BAUD__)) 1221 1222 /** @brief Check whether or not UART instance is Low Power UART. 1223 * @param __HANDLE__ specifies the UART Handle. 1224 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1225 */ 1226 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1227 1228 /** @brief Check UART Baud rate. 1229 * @param __BAUDRATE__ Baudrate specified by the user. 1230 * The maximum Baud Rate is derived from the maximum clock on L5 (i.e. 120 MHz) 1231 * divided by the smallest oversampling used on the USART (i.e. 8) 1232 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1233 */ 1234 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 1235 1236 /** @brief Check UART assertion time. 1237 * @param __TIME__ 5-bit value assertion time. 1238 * @retval Test result (TRUE or FALSE). 1239 */ 1240 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1241 1242 /** @brief Check UART deassertion time. 1243 * @param __TIME__ 5-bit value deassertion time. 1244 * @retval Test result (TRUE or FALSE). 1245 */ 1246 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1247 1248 /** 1249 * @brief Ensure that UART frame number of stop bits is valid. 1250 * @param __STOPBITS__ UART frame number of stop bits. 1251 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1252 */ 1253 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1254 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1255 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1256 ((__STOPBITS__) == UART_STOPBITS_2)) 1257 1258 /** 1259 * @brief Ensure that LPUART frame number of stop bits is valid. 1260 * @param __STOPBITS__ LPUART frame number of stop bits. 1261 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1262 */ 1263 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1264 ((__STOPBITS__) == UART_STOPBITS_2)) 1265 1266 /** 1267 * @brief Ensure that UART frame parity is valid. 1268 * @param __PARITY__ UART frame parity. 1269 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1270 */ 1271 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1272 ((__PARITY__) == UART_PARITY_EVEN) || \ 1273 ((__PARITY__) == UART_PARITY_ODD)) 1274 1275 /** 1276 * @brief Ensure that UART hardware flow control is valid. 1277 * @param __CONTROL__ UART hardware flow control. 1278 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1279 */ 1280 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1281 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1282 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1283 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1284 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1285 1286 /** 1287 * @brief Ensure that UART communication mode is valid. 1288 * @param __MODE__ UART communication mode. 1289 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1290 */ 1291 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1292 1293 /** 1294 * @brief Ensure that UART state is valid. 1295 * @param __STATE__ UART state. 1296 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1297 */ 1298 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1299 ((__STATE__) == UART_STATE_ENABLE)) 1300 1301 /** 1302 * @brief Ensure that UART oversampling is valid. 1303 * @param __SAMPLING__ UART oversampling. 1304 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1305 */ 1306 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1307 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1308 1309 /** 1310 * @brief Ensure that UART frame sampling is valid. 1311 * @param __ONEBIT__ UART frame sampling. 1312 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1313 */ 1314 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1315 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1316 1317 /** 1318 * @brief Ensure that UART auto Baud rate detection mode is valid. 1319 * @param __MODE__ UART auto Baud rate detection mode. 1320 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1321 */ 1322 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1323 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1324 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1325 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1326 1327 /** 1328 * @brief Ensure that UART receiver timeout setting is valid. 1329 * @param __TIMEOUT__ UART receiver timeout setting. 1330 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1331 */ 1332 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1333 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1334 1335 /** @brief Check the receiver timeout value. 1336 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1337 * @param __TIMEOUTVALUE__ receiver timeout value. 1338 * @retval Test result (TRUE or FALSE) 1339 */ 1340 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1341 1342 /** 1343 * @brief Ensure that UART LIN state is valid. 1344 * @param __LIN__ UART LIN state. 1345 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1346 */ 1347 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1348 ((__LIN__) == UART_LIN_ENABLE)) 1349 1350 /** 1351 * @brief Ensure that UART LIN break detection length is valid. 1352 * @param __LENGTH__ UART LIN break detection length. 1353 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1354 */ 1355 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1356 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1357 1358 /** 1359 * @brief Ensure that UART DMA TX state is valid. 1360 * @param __DMATX__ UART DMA TX state. 1361 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1362 */ 1363 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1364 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1365 1366 /** 1367 * @brief Ensure that UART DMA RX state is valid. 1368 * @param __DMARX__ UART DMA RX state. 1369 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1370 */ 1371 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1372 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1373 1374 /** 1375 * @brief Ensure that UART half-duplex state is valid. 1376 * @param __HDSEL__ UART half-duplex state. 1377 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1378 */ 1379 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1380 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1381 1382 /** 1383 * @brief Ensure that UART wake-up method is valid. 1384 * @param __WAKEUP__ UART wake-up method . 1385 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1386 */ 1387 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1388 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1389 1390 /** 1391 * @brief Ensure that UART request parameter is valid. 1392 * @param __PARAM__ UART request parameter. 1393 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1394 */ 1395 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1396 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1397 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1398 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1399 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1400 1401 /** 1402 * @brief Ensure that UART advanced features initialization is valid. 1403 * @param __INIT__ UART advanced features initialization. 1404 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1405 */ 1406 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1407 UART_ADVFEATURE_TXINVERT_INIT | \ 1408 UART_ADVFEATURE_RXINVERT_INIT | \ 1409 UART_ADVFEATURE_DATAINVERT_INIT | \ 1410 UART_ADVFEATURE_SWAP_INIT | \ 1411 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1412 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1413 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1414 UART_ADVFEATURE_MSBFIRST_INIT)) 1415 1416 /** 1417 * @brief Ensure that UART frame TX inversion setting is valid. 1418 * @param __TXINV__ UART frame TX inversion setting. 1419 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1420 */ 1421 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1422 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1423 1424 /** 1425 * @brief Ensure that UART frame RX inversion setting is valid. 1426 * @param __RXINV__ UART frame RX inversion setting. 1427 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1428 */ 1429 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1430 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1431 1432 /** 1433 * @brief Ensure that UART frame data inversion setting is valid. 1434 * @param __DATAINV__ UART frame data inversion setting. 1435 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1436 */ 1437 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1438 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1439 1440 /** 1441 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1442 * @param __SWAP__ UART frame RX/TX pins swap setting. 1443 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1444 */ 1445 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1446 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1447 1448 /** 1449 * @brief Ensure that UART frame overrun setting is valid. 1450 * @param __OVERRUN__ UART frame overrun setting. 1451 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1452 */ 1453 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1454 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1455 1456 /** 1457 * @brief Ensure that UART auto Baud rate state is valid. 1458 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1459 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1460 */ 1461 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1462 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1463 1464 /** 1465 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1466 * @param __DMA__ UART DMA enabling or disabling on error setting. 1467 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1468 */ 1469 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1470 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1471 1472 /** 1473 * @brief Ensure that UART frame MSB first setting is valid. 1474 * @param __MSBFIRST__ UART frame MSB first setting. 1475 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1476 */ 1477 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1478 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1479 1480 /** 1481 * @brief Ensure that UART stop mode state is valid. 1482 * @param __STOPMODE__ UART stop mode state. 1483 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1484 */ 1485 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1486 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1487 1488 /** 1489 * @brief Ensure that UART mute mode state is valid. 1490 * @param __MUTE__ UART mute mode state. 1491 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1492 */ 1493 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1494 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1495 1496 /** 1497 * @brief Ensure that UART wake-up selection is valid. 1498 * @param __WAKE__ UART wake-up selection. 1499 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1500 */ 1501 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1502 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1503 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1504 1505 /** 1506 * @brief Ensure that UART driver enable polarity is valid. 1507 * @param __POLARITY__ UART driver enable polarity. 1508 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1509 */ 1510 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1511 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1512 1513 /** 1514 * @brief Ensure that UART Prescaler is valid. 1515 * @param __CLOCKPRESCALER__ UART Prescaler value. 1516 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1517 */ 1518 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1519 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1520 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1521 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1522 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1523 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1524 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1525 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1526 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1527 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1528 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1529 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1530 1531 /** 1532 * @} 1533 */ 1534 1535 /* Include UART HAL Extended module */ 1536 #include "stm32l5xx_hal_uart_ex.h" 1537 1538 1539 /* Prescaler Table used in BRR computation macros. 1540 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1541 extern const uint16_t UARTPrescTable[12]; 1542 1543 1544 /* Exported functions --------------------------------------------------------*/ 1545 /** @addtogroup UART_Exported_Functions UART Exported Functions 1546 * @{ 1547 */ 1548 1549 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1550 * @{ 1551 */ 1552 1553 /* Initialization and de-initialization functions ****************************/ 1554 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1555 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1556 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1557 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1558 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1559 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1560 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1561 1562 /* Callbacks Register/UnRegister functions ***********************************/ 1563 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1564 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1565 pUART_CallbackTypeDef pCallback); 1566 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1567 1568 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1569 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1570 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1571 1572 /** 1573 * @} 1574 */ 1575 1576 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1577 * @{ 1578 */ 1579 1580 /* IO operation functions *****************************************************/ 1581 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1582 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1583 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1584 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1585 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1586 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1587 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1588 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1589 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1590 /* Transfer Abort functions */ 1591 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1592 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1593 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1594 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1595 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1596 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1597 1598 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1599 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1600 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1601 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1602 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1603 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1604 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1605 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1606 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1607 1608 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1609 1610 /** 1611 * @} 1612 */ 1613 1614 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1615 * @{ 1616 */ 1617 1618 /* Peripheral Control functions ************************************************/ 1619 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1620 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1621 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1622 1623 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1624 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1625 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1626 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1627 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1628 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1629 1630 /** 1631 * @} 1632 */ 1633 1634 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1635 * @{ 1636 */ 1637 1638 /* Peripheral State and Errors functions **************************************************/ 1639 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); 1640 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); 1641 1642 /** 1643 * @} 1644 */ 1645 1646 /** 1647 * @} 1648 */ 1649 1650 /* Private functions -----------------------------------------------------------*/ 1651 /** @addtogroup UART_Private_Functions UART Private Functions 1652 * @{ 1653 */ 1654 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1655 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1656 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1657 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1658 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1659 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1660 uint32_t Tickstart, uint32_t Timeout); 1661 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1662 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1663 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1664 1665 /** 1666 * @} 1667 */ 1668 1669 /** 1670 * @} 1671 */ 1672 1673 /** 1674 * @} 1675 */ 1676 1677 #ifdef __cplusplus 1678 } 1679 #endif 1680 1681 #endif /* STM32L5xx_HAL_UART_H */ 1682 1683 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1684
