1 /** 2 ****************************************************************************** 3 * @file stm32l5xx_hal_pwr.h 4 * @author MCD Application Team 5 * @brief Header file of PWR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L5xx_HAL_PWR_H 22 #define STM32L5xx_HAL_PWR_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l5xx_hal_def.h" 30 31 /** @addtogroup STM32L5xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup PWR 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 41 /** @defgroup PWR_Exported_Types PWR Exported Types 42 * @{ 43 */ 44 45 /** 46 * @brief PWR PVD configuration structure definition 47 */ 48 typedef struct 49 { 50 uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. 51 This parameter can be a value of @ref PWR_PVD_detection_level. */ 52 53 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. 54 This parameter can be a value of @ref PWR_PVD_Mode. */ 55 } PWR_PVDTypeDef; 56 57 58 /** 59 * @} 60 */ 61 62 /* Exported constants --------------------------------------------------------*/ 63 64 /** @defgroup PWR_Exported_Constants PWR Exported Constants 65 * @{ 66 */ 67 68 69 /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels 70 * @{ 71 */ 72 #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */ 73 #define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */ 74 #define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */ 75 #define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */ 76 #define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */ 77 #define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */ 78 #define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */ 79 #define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */ 80 /** 81 * @} 82 */ 83 84 /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode 85 * @{ 86 */ 87 #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */ 88 #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ 89 #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ 90 #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ 91 #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ 92 #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ 93 #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ 94 /** 95 * @} 96 */ 97 98 99 100 101 /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode 102 * @{ 103 */ 104 #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */ 105 #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */ 106 /** 107 * @} 108 */ 109 110 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry 111 * @{ 112 */ 113 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ 114 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ 115 /** 116 * @} 117 */ 118 119 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry 120 * @{ 121 */ 122 #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ 123 #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ 124 /** 125 * @} 126 */ 127 128 129 /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line 130 * @{ 131 */ 132 #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ 133 /** 134 * @} 135 */ 136 137 /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line 138 * @{ 139 */ 140 #define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */ 141 /** 142 * @} 143 */ 144 145 /** @defgroup PWR_items PWR items 146 * @brief PWR items to configure attributes on 147 * @{ 148 */ 149 #define PWR_LPM PWR_SECCFGR_LPMSEC /*!< Low power mode */ 150 #define PWR_WKUP PWR_SECCFGR_WUPSEC /*!< All wake-up pins */ 151 #define PWR_WKUP1 PWR_SECCFGR_WUP1SEC /*!< Wake-up pin 1 */ 152 #define PWR_WKUP2 PWR_SECCFGR_WUP2SEC /*!< Wake-up pin 2 */ 153 #define PWR_WKUP3 PWR_SECCFGR_WUP3SEC /*!< Wake-up pin 3 */ 154 #define PWR_WKUP4 PWR_SECCFGR_WUP4SEC /*!< Wake-up pin 4 */ 155 #define PWR_WKUP5 PWR_SECCFGR_WUP5SEC /*!< Wake-up pin 5 */ 156 #define PWR_VDM PWR_SECCFGR_VDMSEC /*!< Voltage Detection and Monitoring */ 157 #define PWR_VB PWR_SECCFGR_VBSEC /*!< VBAT */ 158 #define PWR_APC PWR_SECCFGR_APCSEC /*!< Pull-Up/Down Control */ 159 #define PWR_ALL (PWR_LPM|PWR_WKUP|PWR_WKUP1|PWR_WKUP2|PWR_WKUP3|PWR_WKUP4|PWR_WKUP5| \ 160 PWR_VDM|PWR_VB|PWR_APC) /*!< All of the above */ 161 /** 162 * @} 163 */ 164 165 /** @defgroup PWR_attributes PWR attributes 166 * @brief PWR secure/non-secure and privilege/non-privilege attributes 167 * @note secure and non-secure attributes are only available from secure state when the system 168 * implement the security (TZEN=1) 169 * @{ 170 */ 171 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 172 #define PWR_SEC (PWR_ATTR_SEC_MASK | 0x00000001U) /*!< Secure attribute */ 173 #define PWR_NSEC (PWR_ATTR_SEC_MASK | 0x00000000U) /*!< Non-secure attribute */ 174 #endif /* __ARM_FEATURE_CMSE */ 175 #define PWR_PRIV (PWR_ATTR_PRIV_MASK | 0x00000002U) /*!< Privilege attribute */ 176 #define PWR_NPRIV (PWR_ATTR_PRIV_MASK | 0x00000000U) /*!< Non-privilege attribute */ 177 /** 178 * @} 179 */ 180 181 /** 182 * @} 183 */ 184 185 /* Exported macros -----------------------------------------------------------*/ 186 /** @defgroup PWR_Exported_Macros PWR Exported Macros 187 * @{ 188 */ 189 190 /** @brief Check whether or not a specific PWR flag is set. 191 * @param __FLAG__ specifies the flag to check. 192 * This parameter can be one of the following values: 193 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 194 * was received from the WKUP pin 1. 195 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 196 * was received from the WKUP pin 2. 197 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 198 * was received from the WKUP pin 3. 199 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 200 * was received from the WKUP pin 4. 201 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 202 * was received from the WKUP pin 5. 203 * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system 204 * entered StandBy mode. 205 * @arg @ref PWR_FLAG_SMPS_BYPASS_RDY SMPS bypass ready flag. Indicates 206 * SMPS bypass mode now operational. 207 * @arg @ref PWR_FLAG_EXT_SMPS_RDY SMPS external SMPS ready flag. Indicates 208 * external SMPS switch can be closed. 209 * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the 210 * low-power regulator is ready. 211 * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the 212 * regulator is ready in main mode or is in low-power mode. 213 * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready 214 * in the selected voltage range or is still changing to the required voltage level. 215 * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is 216 * below or above the selected PVD threshold. 217 * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is 218 * is below or above PVM1 threshold (applicable when USB feature is supported). 219 * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is 220 * is below or above PVM2 threshold (applicable when VDDIO2 is present on device). 221 * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is 222 * is below or above PVM3 threshold. 223 * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is 224 * is below or above PVM4 threshold. 225 * 226 * @retval The new state of __FLAG__ (TRUE or FALSE). 227 */ 228 #define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\ 229 (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ 230 (PWR->SR2 & (1U << ((__FLAG__) & 31U))) ) 231 232 /** @brief Clear a specific PWR flag. 233 * @param __FLAG__ specifies the flag to clear. 234 * This parameter can be one of the following values: 235 * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event 236 * was received from the WKUP pin 1. 237 * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event 238 * was received from the WKUP pin 2. 239 * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event 240 * was received from the WKUP pin 3. 241 * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event 242 * was received from the WKUP pin 4. 243 * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event 244 * was received from the WKUP pin 5. 245 * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. 246 * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system 247 * entered Standby mode. 248 * @retval None 249 */ 250 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ 251 (PWR->SCR = (__FLAG__)) :\ 252 (PWR->SCR = (1U << ((__FLAG__) & 31U))) ) 253 /** 254 * @brief Enable the PVD Extended Interrupt Line. 255 * @retval None 256 */ 257 #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 258 259 /** 260 * @brief Disable the PVD Extended Interrupt Line. 261 * @retval None 262 */ 263 #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) 264 265 /** 266 * @brief Enable the PVD Event Line. 267 * @retval None 268 */ 269 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 270 271 /** 272 * @brief Disable the PVD Event Line. 273 * @retval None 274 */ 275 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) 276 277 /** 278 * @brief Enable the PVD Extended Interrupt Rising Trigger. 279 * @retval None 280 */ 281 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 282 283 /** 284 * @brief Disable the PVD Extended Interrupt Rising Trigger. 285 * @retval None 286 */ 287 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) 288 289 /** 290 * @brief Enable the PVD Extended Interrupt Falling Trigger. 291 * @retval None 292 */ 293 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 294 295 296 /** 297 * @brief Disable the PVD Extended Interrupt Falling Trigger. 298 * @retval None 299 */ 300 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) 301 302 303 /** 304 * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. 305 * @retval None 306 */ 307 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ 308 do { \ 309 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ 310 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ 311 } while(0) 312 313 /** 314 * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. 315 * @retval None 316 */ 317 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ 318 do { \ 319 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ 320 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ 321 } while(0) 322 323 /** 324 * @brief Generate a Software interrupt on selected EXTI line. 325 * @retval None 326 */ 327 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) 328 329 /** 330 * @brief Check whether or not the PVD EXTI interrupt flag is set. 331 * @retval EXTI PVD Line Status. 332 */ 333 #define __HAL_PWR_PVD_EXTI_GET_FLAG() ((EXTI->RPR1 | EXTI->FPR1) & PWR_EXTI_LINE_PVD) 334 335 /** 336 * @brief Clear the PVD EXTI interrupt flag. 337 * @retval None 338 */ 339 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() \ 340 do { \ 341 WRITE_REG(EXTI->RPR1, PWR_EXTI_LINE_PVD); \ 342 WRITE_REG(EXTI->FPR1, PWR_EXTI_LINE_PVD); \ 343 } while(0) 344 345 /** 346 * @} 347 */ 348 349 /* Private constants -----------------------------------------------------*/ 350 /** @addtogroup PWR_Private_Constants PWR Private Constants 351 * @{ 352 */ 353 /* Defines for attributes */ 354 #define PWR_ATTR_SEC_MASK 0x100U 355 #define PWR_ATTR_PRIV_MASK 0x200U 356 /** 357 * @} 358 */ 359 360 /* Private macros --------------------------------------------------------*/ 361 /** @addtogroup PWR_Private_Macros PWR Private Macros 362 * @{ 363 */ 364 365 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ 366 ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ 367 ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ 368 ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) 369 370 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ 371 ((MODE) == PWR_PVD_MODE_IT_RISING) ||\ 372 ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ 373 ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ 374 ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ 375 ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ 376 ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) 377 378 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ 379 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) 380 381 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) 382 383 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) 384 385 #define IS_PWR_ITEMS_ATTRIBUTES(__ITEM__) ((((__ITEM__) & PWR_LPM) == PWR_LPM) || \ 386 (((__ITEM__) & PWR_WKUP) == PWR_WKUP) || \ 387 (((__ITEM__) & PWR_WKUP1) == PWR_WKUP1) || \ 388 (((__ITEM__) & PWR_WKUP2) == PWR_WKUP2) || \ 389 (((__ITEM__) & PWR_WKUP3) == PWR_WKUP3) || \ 390 (((__ITEM__) & PWR_WKUP4) == PWR_WKUP4) || \ 391 (((__ITEM__) & PWR_WKUP5) == PWR_WKUP5) || \ 392 (((__ITEM__) & PWR_VDM) == PWR_VDM) || \ 393 (((__ITEM__) & PWR_VB) == PWR_VB) || \ 394 (((__ITEM__) & PWR_APC) == PWR_APC) || \ 395 (((__ITEM__) & PWR_ALL) == PWR_ALL) || \ 396 (((__ITEM__) & ~(PWR_ALL)) == 0U)) 397 398 #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) 399 400 #define IS_PWR_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & PWR_SEC) == PWR_SEC) || \ 401 (((__ATTRIBUTES__) & PWR_NSEC) == PWR_NSEC) || \ 402 (((__ATTRIBUTES__) & PWR_PRIV) == PWR_PRIV) || \ 403 (((__ATTRIBUTES__) & PWR_NPRIV) == PWR_NPRIV)) && \ 404 (((__ATTRIBUTES__) & ~(PWR_SEC|PWR_NSEC|PWR_PRIV|PWR_NPRIV)) == 0U)) 405 406 #else 407 408 #define IS_PWR_ATTRIBUTES(__ATTRIBUTES__) (((((__ATTRIBUTES__) & PWR_PRIV) == PWR_PRIV) || \ 409 (((__ATTRIBUTES__) & PWR_NPRIV) == PWR_NPRIV)) && \ 410 (((__ATTRIBUTES__) & ~(PWR_PRIV|PWR_NPRIV)) == 0U)) 411 412 #endif /* __ARM_FEATURE_CMSE */ 413 414 /** 415 * @} 416 */ 417 418 /* Include PWR HAL Extended module */ 419 #include "stm32l5xx_hal_pwr_ex.h" 420 421 /* Exported functions --------------------------------------------------------*/ 422 423 /** @addtogroup PWR_Exported_Functions PWR Exported Functions 424 * @{ 425 */ 426 427 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions 428 * @{ 429 */ 430 431 /* Initialization and de-initialization functions *******************************/ 432 void HAL_PWR_DeInit(void); 433 void HAL_PWR_EnableBkUpAccess(void); 434 void HAL_PWR_DisableBkUpAccess(void); 435 436 /** 437 * @} 438 */ 439 440 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions 441 * @{ 442 */ 443 444 /* Peripheral Control functions ************************************************/ 445 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); 446 void HAL_PWR_EnablePVD(void); 447 void HAL_PWR_DisablePVD(void); 448 449 450 /* WakeUp pins configuration functions ****************************************/ 451 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); 452 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); 453 454 /* Low Power modes configuration functions ************************************/ 455 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); 456 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); 457 void HAL_PWR_EnterSTANDBYMode(void); 458 459 void HAL_PWR_EnableSleepOnExit(void); 460 void HAL_PWR_DisableSleepOnExit(void); 461 void HAL_PWR_EnableSEVOnPend(void); 462 void HAL_PWR_DisableSEVOnPend(void); 463 464 void HAL_PWR_PVDCallback(void); 465 466 467 /** 468 * @} 469 */ 470 471 /** @addtogroup RCC_Exported_Functions_Group3 Attributes management functions 472 * @{ 473 */ 474 475 /* Attributes management functions ******************************************/ 476 void HAL_PWR_ConfigAttributes(uint32_t Item, uint32_t Attributes); 477 HAL_StatusTypeDef HAL_PWR_GetConfigAttributes(uint32_t Item, uint32_t *pAttributes); 478 479 /** 480 * @} 481 */ 482 483 /** 484 * @} 485 */ 486 487 /** 488 * @} 489 */ 490 491 /** 492 * @} 493 */ 494 495 #ifdef __cplusplus 496 } 497 #endif 498 499 500 #endif /* STM32L5xx_HAL_PWR_H */ 501 502 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 503
