1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_exti.h
4 * @author MCD Application Team
5 * @brief Header file of EXTI LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
35
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32L4xx_LL_EXTI_H
38 #define __STM32L4xx_LL_EXTI_H
39
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43
44 /* Includes ------------------------------------------------------------------*/
45 #include "stm32l4xx.h"
46
47 /** @addtogroup STM32L4xx_LL_Driver
48 * @{
49 */
50
51 #if defined (EXTI)
52
53 /** @defgroup EXTI_LL EXTI
54 * @{
55 */
56
57 /* Private types -------------------------------------------------------------*/
58 /* Private variables ---------------------------------------------------------*/
59 /* Private constants ---------------------------------------------------------*/
60 /* Private Macros ------------------------------------------------------------*/
61 #if defined(USE_FULL_LL_DRIVER)
62 /** @defgroup EXTI_LL_Private_Macros EXTI Private Macros
63 * @{
64 */
65 /**
66 * @}
67 */
68 #endif /*USE_FULL_LL_DRIVER*/
69 /* Exported types ------------------------------------------------------------*/
70 #if defined(USE_FULL_LL_DRIVER)
71 /** @defgroup EXTI_LL_ES_INIT EXTI Exported Init structure
72 * @{
73 */
74 typedef struct
75 {
76
77 uint32_t Line_0_31; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 0 to 31
78 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
79
80 uint32_t Line_32_63; /*!< Specifies the EXTI lines to be enabled or disabled for Lines in range 32 to 63
81 This parameter can be any combination of @ref EXTI_LL_EC_LINE */
82
83 FunctionalState LineCommand; /*!< Specifies the new state of the selected EXTI lines.
84 This parameter can be set either to ENABLE or DISABLE */
85
86 uint8_t Mode; /*!< Specifies the mode for the EXTI lines.
87 This parameter can be a value of @ref EXTI_LL_EC_MODE. */
88
89 uint8_t Trigger; /*!< Specifies the trigger signal active edge for the EXTI lines.
90 This parameter can be a value of @ref EXTI_LL_EC_TRIGGER. */
91 } LL_EXTI_InitTypeDef;
92
93 /**
94 * @}
95 */
96 #endif /*USE_FULL_LL_DRIVER*/
97
98 /* Exported constants --------------------------------------------------------*/
99 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
100 * @{
101 */
102
103 /** @defgroup EXTI_LL_EC_LINE LINE
104 * @{
105 */
106 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
107 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
108 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
109 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
110 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
111 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
112 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
113 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
114 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
115 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
116 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
117 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
118 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
119 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
120 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
121 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
122 #if defined(EXTI_IMR1_IM16)
123 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
124 #endif
125 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
126 #if defined(EXTI_IMR1_IM18)
127 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
128 #endif
129 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
130 #if defined(EXTI_IMR1_IM20)
131 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
132 #endif
133 #if defined(EXTI_IMR1_IM21)
134 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
135 #endif
136 #if defined(EXTI_IMR1_IM22)
137 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
138 #endif
139 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
140 #if defined(EXTI_IMR1_IM24)
141 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
142 #endif
143 #if defined(EXTI_IMR1_IM25)
144 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
145 #endif
146 #if defined(EXTI_IMR1_IM26)
147 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
148 #endif
149 #if defined(EXTI_IMR1_IM27)
150 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
151 #endif
152 #if defined(EXTI_IMR1_IM28)
153 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
154 #endif
155 #if defined(EXTI_IMR1_IM29)
156 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
157 #endif
158 #if defined(EXTI_IMR1_IM30)
159 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
160 #endif
161 #if defined(EXTI_IMR1_IM31)
162 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
163 #endif
164 #define LL_EXTI_LINE_ALL_0_31 EXTI_IMR1_IM /*!< All Extended line not reserved*/
165
166 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
167 #if defined(EXTI_IMR2_IM33)
168 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
169 #endif
170 #if defined(EXTI_IMR2_IM34)
171 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
172 #endif
173 #if defined(EXTI_IMR2_IM35)
174 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
175 #endif
176 #if defined(EXTI_IMR2_IM36)
177 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
178 #endif
179 #if defined(EXTI_IMR2_IM37)
180 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
181 #endif
182 #if defined(EXTI_IMR2_IM38)
183 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
184 #endif
185 #if defined(EXTI_IMR2_IM39)
186 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
187 #endif
188 #if defined(EXTI_IMR2_IM40)
189 #define LL_EXTI_LINE_40 EXTI_IMR2_IM40 /*!< Extended line 40 */
190 #endif
191 #define LL_EXTI_LINE_ALL_32_63 EXTI_IMR2_IM /*!< All Extended line not reserved*/
192
193
194 #define LL_EXTI_LINE_ALL (0xFFFFFFFFU) /*!< All Extended line */
195
196 #if defined(USE_FULL_LL_DRIVER)
197 #define LL_EXTI_LINE_NONE (0x00000000U) /*!< None Extended line */
198 #endif /*USE_FULL_LL_DRIVER*/
199
200 /**
201 * @}
202 */
203
204
205 #if defined(USE_FULL_LL_DRIVER)
206
207 /** @defgroup EXTI_LL_EC_MODE Mode
208 * @{
209 */
210 #define LL_EXTI_MODE_IT ((uint8_t)0x00U) /*!< Interrupt Mode */
211 #define LL_EXTI_MODE_EVENT ((uint8_t)0x01U) /*!< Event Mode */
212 #define LL_EXTI_MODE_IT_EVENT ((uint8_t)0x02U) /*!< Interrupt & Event Mode */
213 /**
214 * @}
215 */
216
217 /** @defgroup EXTI_LL_EC_TRIGGER Edge Trigger
218 * @{
219 */
220 #define LL_EXTI_TRIGGER_NONE ((uint8_t)0x00U) /*!< No Trigger Mode */
221 #define LL_EXTI_TRIGGER_RISING ((uint8_t)0x01U) /*!< Trigger Rising Mode */
222 #define LL_EXTI_TRIGGER_FALLING ((uint8_t)0x02U) /*!< Trigger Falling Mode */
223 #define LL_EXTI_TRIGGER_RISING_FALLING ((uint8_t)0x03U) /*!< Trigger Rising & Falling Mode */
224
225 /**
226 * @}
227 */
228
229
230 #endif /*USE_FULL_LL_DRIVER*/
231
232
233 /**
234 * @}
235 */
236
237 /* Exported macro ------------------------------------------------------------*/
238 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
239 * @{
240 */
241
242 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
243 * @{
244 */
245
246 /**
247 * @brief Write a value in EXTI register
248 * @param __REG__ Register to be written
249 * @param __VALUE__ Value to be written in the register
250 * @retval None
251 */
252 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
253
254 /**
255 * @brief Read a value in EXTI register
256 * @param __REG__ Register to be read
257 * @retval Register value
258 */
259 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
260 /**
261 * @}
262 */
263
264
265 /**
266 * @}
267 */
268
269
270
271 /* Exported functions --------------------------------------------------------*/
272 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
273 * @{
274 */
275 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
276 * @{
277 */
278
279 /**
280 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
281 * @note The reset value for the direct or internal lines (see RM)
282 * is set to 1 in order to enable the interrupt by default.
283 * Bits are set automatically at Power on.
284 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
285 * @param ExtiLine This parameter can be one of the following values:
286 * @arg @ref LL_EXTI_LINE_0
287 * @arg @ref LL_EXTI_LINE_1
288 * @arg @ref LL_EXTI_LINE_2
289 * @arg @ref LL_EXTI_LINE_3
290 * @arg @ref LL_EXTI_LINE_4
291 * @arg @ref LL_EXTI_LINE_5
292 * @arg @ref LL_EXTI_LINE_6
293 * @arg @ref LL_EXTI_LINE_7
294 * @arg @ref LL_EXTI_LINE_8
295 * @arg @ref LL_EXTI_LINE_9
296 * @arg @ref LL_EXTI_LINE_10
297 * @arg @ref LL_EXTI_LINE_11
298 * @arg @ref LL_EXTI_LINE_12
299 * @arg @ref LL_EXTI_LINE_13
300 * @arg @ref LL_EXTI_LINE_14
301 * @arg @ref LL_EXTI_LINE_15
302 * @arg @ref LL_EXTI_LINE_16
303 * @arg @ref LL_EXTI_LINE_17
304 * @arg @ref LL_EXTI_LINE_18
305 * @arg @ref LL_EXTI_LINE_19
306 * @arg @ref LL_EXTI_LINE_20
307 * @arg @ref LL_EXTI_LINE_21
308 * @arg @ref LL_EXTI_LINE_22
309 * @arg @ref LL_EXTI_LINE_23
310 * @arg @ref LL_EXTI_LINE_24
311 * @arg @ref LL_EXTI_LINE_25
312 * @arg @ref LL_EXTI_LINE_26
313 * @arg @ref LL_EXTI_LINE_27
314 * @arg @ref LL_EXTI_LINE_28
315 * @arg @ref LL_EXTI_LINE_29
316 * @arg @ref LL_EXTI_LINE_30
317 * @arg @ref LL_EXTI_LINE_31
318 * @arg @ref LL_EXTI_LINE_ALL_0_31
319 * @note Please check each device line mapping for EXTI Line availability
320 * @retval None
321 */
LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)322 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
323 {
324 SET_BIT(EXTI->IMR1, ExtiLine);
325 }
326 /**
327 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
328 * @note The reset value for the direct lines (lines from 32 to 34, line
329 * 39) is set to 1 in order to enable the interrupt by default.
330 * Bits are set automatically at Power on.
331 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
332 * @param ExtiLine This parameter can be one of the following values:
333 * @arg @ref LL_EXTI_LINE_32
334 * @arg @ref LL_EXTI_LINE_33
335 * @arg @ref LL_EXTI_LINE_34(*)
336 * @arg @ref LL_EXTI_LINE_35
337 * @arg @ref LL_EXTI_LINE_36
338 * @arg @ref LL_EXTI_LINE_37
339 * @arg @ref LL_EXTI_LINE_38
340 * @arg @ref LL_EXTI_LINE_39(*)
341 * @arg @ref LL_EXTI_LINE_40(*)
342 * @arg @ref LL_EXTI_LINE_ALL_32_63
343 * @note (*): Available in some devices
344 * @retval None
345 */
LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)346 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
347 {
348 SET_BIT(EXTI->IMR2, ExtiLine);
349 }
350
351 /**
352 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
353 * @note The reset value for the direct or internal lines (see RM)
354 * is set to 1 in order to enable the interrupt by default.
355 * Bits are set automatically at Power on.
356 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
357 * @param ExtiLine This parameter can be one of the following values:
358 * @arg @ref LL_EXTI_LINE_0
359 * @arg @ref LL_EXTI_LINE_1
360 * @arg @ref LL_EXTI_LINE_2
361 * @arg @ref LL_EXTI_LINE_3
362 * @arg @ref LL_EXTI_LINE_4
363 * @arg @ref LL_EXTI_LINE_5
364 * @arg @ref LL_EXTI_LINE_6
365 * @arg @ref LL_EXTI_LINE_7
366 * @arg @ref LL_EXTI_LINE_8
367 * @arg @ref LL_EXTI_LINE_9
368 * @arg @ref LL_EXTI_LINE_10
369 * @arg @ref LL_EXTI_LINE_11
370 * @arg @ref LL_EXTI_LINE_12
371 * @arg @ref LL_EXTI_LINE_13
372 * @arg @ref LL_EXTI_LINE_14
373 * @arg @ref LL_EXTI_LINE_15
374 * @arg @ref LL_EXTI_LINE_16
375 * @arg @ref LL_EXTI_LINE_17
376 * @arg @ref LL_EXTI_LINE_18
377 * @arg @ref LL_EXTI_LINE_19
378 * @arg @ref LL_EXTI_LINE_20
379 * @arg @ref LL_EXTI_LINE_21
380 * @arg @ref LL_EXTI_LINE_22
381 * @arg @ref LL_EXTI_LINE_23
382 * @arg @ref LL_EXTI_LINE_24
383 * @arg @ref LL_EXTI_LINE_25
384 * @arg @ref LL_EXTI_LINE_26
385 * @arg @ref LL_EXTI_LINE_27
386 * @arg @ref LL_EXTI_LINE_28
387 * @arg @ref LL_EXTI_LINE_29
388 * @arg @ref LL_EXTI_LINE_30
389 * @arg @ref LL_EXTI_LINE_31
390 * @arg @ref LL_EXTI_LINE_ALL_0_31
391 * @note Please check each device line mapping for EXTI Line availability
392 * @retval None
393 */
LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)394 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
395 {
396 CLEAR_BIT(EXTI->IMR1, ExtiLine);
397 }
398
399 /**
400 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
401 * @note The reset value for the direct lines (lines from 32 to 34, line
402 * 39) is set to 1 in order to enable the interrupt by default.
403 * Bits are set automatically at Power on.
404 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
405 * @param ExtiLine This parameter can be one of the following values:
406 * @arg @ref LL_EXTI_LINE_32
407 * @arg @ref LL_EXTI_LINE_33
408 * @arg @ref LL_EXTI_LINE_34(*)
409 * @arg @ref LL_EXTI_LINE_35
410 * @arg @ref LL_EXTI_LINE_36
411 * @arg @ref LL_EXTI_LINE_37
412 * @arg @ref LL_EXTI_LINE_38
413 * @arg @ref LL_EXTI_LINE_39(*)
414 * @arg @ref LL_EXTI_LINE_40(*)
415 * @arg @ref LL_EXTI_LINE_ALL_32_63
416 * @note (*): Available in some devices
417 * @retval None
418 */
LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)419 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
420 {
421 CLEAR_BIT(EXTI->IMR2, ExtiLine);
422 }
423
424 /**
425 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
426 * @note The reset value for the direct or internal lines (see RM)
427 * is set to 1 in order to enable the interrupt by default.
428 * Bits are set automatically at Power on.
429 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
430 * @param ExtiLine This parameter can be one of the following values:
431 * @arg @ref LL_EXTI_LINE_0
432 * @arg @ref LL_EXTI_LINE_1
433 * @arg @ref LL_EXTI_LINE_2
434 * @arg @ref LL_EXTI_LINE_3
435 * @arg @ref LL_EXTI_LINE_4
436 * @arg @ref LL_EXTI_LINE_5
437 * @arg @ref LL_EXTI_LINE_6
438 * @arg @ref LL_EXTI_LINE_7
439 * @arg @ref LL_EXTI_LINE_8
440 * @arg @ref LL_EXTI_LINE_9
441 * @arg @ref LL_EXTI_LINE_10
442 * @arg @ref LL_EXTI_LINE_11
443 * @arg @ref LL_EXTI_LINE_12
444 * @arg @ref LL_EXTI_LINE_13
445 * @arg @ref LL_EXTI_LINE_14
446 * @arg @ref LL_EXTI_LINE_15
447 * @arg @ref LL_EXTI_LINE_16
448 * @arg @ref LL_EXTI_LINE_17
449 * @arg @ref LL_EXTI_LINE_18
450 * @arg @ref LL_EXTI_LINE_19
451 * @arg @ref LL_EXTI_LINE_20
452 * @arg @ref LL_EXTI_LINE_21
453 * @arg @ref LL_EXTI_LINE_22
454 * @arg @ref LL_EXTI_LINE_23
455 * @arg @ref LL_EXTI_LINE_24
456 * @arg @ref LL_EXTI_LINE_25
457 * @arg @ref LL_EXTI_LINE_26
458 * @arg @ref LL_EXTI_LINE_27
459 * @arg @ref LL_EXTI_LINE_28
460 * @arg @ref LL_EXTI_LINE_29
461 * @arg @ref LL_EXTI_LINE_30
462 * @arg @ref LL_EXTI_LINE_31
463 * @arg @ref LL_EXTI_LINE_ALL_0_31
464 * @note Please check each device line mapping for EXTI Line availability
465 * @retval State of bit (1 or 0).
466 */
LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)467 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
468 {
469 return ((READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
470 }
471
472 /**
473 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
474 * @note The reset value for the direct lines (lines from 32 to 34, line
475 * 39) is set to 1 in order to enable the interrupt by default.
476 * Bits are set automatically at Power on.
477 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
478 * @param ExtiLine This parameter can be one of the following values:
479 * @arg @ref LL_EXTI_LINE_32
480 * @arg @ref LL_EXTI_LINE_33
481 * @arg @ref LL_EXTI_LINE_34(*)
482 * @arg @ref LL_EXTI_LINE_35
483 * @arg @ref LL_EXTI_LINE_36
484 * @arg @ref LL_EXTI_LINE_37
485 * @arg @ref LL_EXTI_LINE_38
486 * @arg @ref LL_EXTI_LINE_39(*)
487 * @arg @ref LL_EXTI_LINE_40(*)
488 * @arg @ref LL_EXTI_LINE_ALL_32_63
489 * @note (*): Available in some devices
490 * @retval State of bit (1 or 0).
491 */
LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)492 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
493 {
494 return ((READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
495 }
496
497 /**
498 * @}
499 */
500
501 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
502 * @{
503 */
504
505 /**
506 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
507 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
508 * @param ExtiLine This parameter can be one of the following values:
509 * @arg @ref LL_EXTI_LINE_0
510 * @arg @ref LL_EXTI_LINE_1
511 * @arg @ref LL_EXTI_LINE_2
512 * @arg @ref LL_EXTI_LINE_3
513 * @arg @ref LL_EXTI_LINE_4
514 * @arg @ref LL_EXTI_LINE_5
515 * @arg @ref LL_EXTI_LINE_6
516 * @arg @ref LL_EXTI_LINE_7
517 * @arg @ref LL_EXTI_LINE_8
518 * @arg @ref LL_EXTI_LINE_9
519 * @arg @ref LL_EXTI_LINE_10
520 * @arg @ref LL_EXTI_LINE_11
521 * @arg @ref LL_EXTI_LINE_12
522 * @arg @ref LL_EXTI_LINE_13
523 * @arg @ref LL_EXTI_LINE_14
524 * @arg @ref LL_EXTI_LINE_15
525 * @arg @ref LL_EXTI_LINE_16
526 * @arg @ref LL_EXTI_LINE_17
527 * @arg @ref LL_EXTI_LINE_18
528 * @arg @ref LL_EXTI_LINE_19
529 * @arg @ref LL_EXTI_LINE_20
530 * @arg @ref LL_EXTI_LINE_21
531 * @arg @ref LL_EXTI_LINE_22
532 * @arg @ref LL_EXTI_LINE_23
533 * @arg @ref LL_EXTI_LINE_24
534 * @arg @ref LL_EXTI_LINE_25
535 * @arg @ref LL_EXTI_LINE_26
536 * @arg @ref LL_EXTI_LINE_27
537 * @arg @ref LL_EXTI_LINE_28
538 * @arg @ref LL_EXTI_LINE_29
539 * @arg @ref LL_EXTI_LINE_30
540 * @arg @ref LL_EXTI_LINE_31
541 * @arg @ref LL_EXTI_LINE_ALL_0_31
542 * @note Please check each device line mapping for EXTI Line availability
543 * @retval None
544 */
LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)545 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
546 {
547 SET_BIT(EXTI->EMR1, ExtiLine);
548
549 }
550
551 /**
552 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
553 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
554 * @param ExtiLine This parameter can be a combination of the following values:
555 * @arg @ref LL_EXTI_LINE_32
556 * @arg @ref LL_EXTI_LINE_33
557 * @arg @ref LL_EXTI_LINE_34(*)
558 * @arg @ref LL_EXTI_LINE_35
559 * @arg @ref LL_EXTI_LINE_36
560 * @arg @ref LL_EXTI_LINE_37
561 * @arg @ref LL_EXTI_LINE_38
562 * @arg @ref LL_EXTI_LINE_39(*)
563 * @arg @ref LL_EXTI_LINE_40(*)
564 * @arg @ref LL_EXTI_LINE_ALL_32_63
565 * @note (*): Available in some devices
566 * @retval None
567 */
LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)568 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
569 {
570 SET_BIT(EXTI->EMR2, ExtiLine);
571 }
572
573 /**
574 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
575 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
576 * @param ExtiLine This parameter can be one of the following values:
577 * @arg @ref LL_EXTI_LINE_0
578 * @arg @ref LL_EXTI_LINE_1
579 * @arg @ref LL_EXTI_LINE_2
580 * @arg @ref LL_EXTI_LINE_3
581 * @arg @ref LL_EXTI_LINE_4
582 * @arg @ref LL_EXTI_LINE_5
583 * @arg @ref LL_EXTI_LINE_6
584 * @arg @ref LL_EXTI_LINE_7
585 * @arg @ref LL_EXTI_LINE_8
586 * @arg @ref LL_EXTI_LINE_9
587 * @arg @ref LL_EXTI_LINE_10
588 * @arg @ref LL_EXTI_LINE_11
589 * @arg @ref LL_EXTI_LINE_12
590 * @arg @ref LL_EXTI_LINE_13
591 * @arg @ref LL_EXTI_LINE_14
592 * @arg @ref LL_EXTI_LINE_15
593 * @arg @ref LL_EXTI_LINE_16
594 * @arg @ref LL_EXTI_LINE_17
595 * @arg @ref LL_EXTI_LINE_18
596 * @arg @ref LL_EXTI_LINE_19
597 * @arg @ref LL_EXTI_LINE_20
598 * @arg @ref LL_EXTI_LINE_21
599 * @arg @ref LL_EXTI_LINE_22
600 * @arg @ref LL_EXTI_LINE_23
601 * @arg @ref LL_EXTI_LINE_24
602 * @arg @ref LL_EXTI_LINE_25
603 * @arg @ref LL_EXTI_LINE_26
604 * @arg @ref LL_EXTI_LINE_27
605 * @arg @ref LL_EXTI_LINE_28
606 * @arg @ref LL_EXTI_LINE_29
607 * @arg @ref LL_EXTI_LINE_30
608 * @arg @ref LL_EXTI_LINE_31
609 * @arg @ref LL_EXTI_LINE_ALL_0_31
610 * @note Please check each device line mapping for EXTI Line availability
611 * @retval None
612 */
LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)613 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
614 {
615 CLEAR_BIT(EXTI->EMR1, ExtiLine);
616 }
617
618 /**
619 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
620 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
621 * @param ExtiLine This parameter can be a combination of the following values:
622 * @arg @ref LL_EXTI_LINE_32
623 * @arg @ref LL_EXTI_LINE_33
624 * @arg @ref LL_EXTI_LINE_34(*)
625 * @arg @ref LL_EXTI_LINE_35
626 * @arg @ref LL_EXTI_LINE_36
627 * @arg @ref LL_EXTI_LINE_37
628 * @arg @ref LL_EXTI_LINE_38
629 * @arg @ref LL_EXTI_LINE_39(*)
630 * @arg @ref LL_EXTI_LINE_40(*)
631 * @arg @ref LL_EXTI_LINE_ALL_32_63
632 * @note (*): Available in some devices
633 * @retval None
634 */
LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)635 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
636 {
637 CLEAR_BIT(EXTI->EMR2, ExtiLine);
638 }
639
640 /**
641 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
642 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
643 * @param ExtiLine This parameter can be one of the following values:
644 * @arg @ref LL_EXTI_LINE_0
645 * @arg @ref LL_EXTI_LINE_1
646 * @arg @ref LL_EXTI_LINE_2
647 * @arg @ref LL_EXTI_LINE_3
648 * @arg @ref LL_EXTI_LINE_4
649 * @arg @ref LL_EXTI_LINE_5
650 * @arg @ref LL_EXTI_LINE_6
651 * @arg @ref LL_EXTI_LINE_7
652 * @arg @ref LL_EXTI_LINE_8
653 * @arg @ref LL_EXTI_LINE_9
654 * @arg @ref LL_EXTI_LINE_10
655 * @arg @ref LL_EXTI_LINE_11
656 * @arg @ref LL_EXTI_LINE_12
657 * @arg @ref LL_EXTI_LINE_13
658 * @arg @ref LL_EXTI_LINE_14
659 * @arg @ref LL_EXTI_LINE_15
660 * @arg @ref LL_EXTI_LINE_16
661 * @arg @ref LL_EXTI_LINE_17
662 * @arg @ref LL_EXTI_LINE_18
663 * @arg @ref LL_EXTI_LINE_19
664 * @arg @ref LL_EXTI_LINE_20
665 * @arg @ref LL_EXTI_LINE_21
666 * @arg @ref LL_EXTI_LINE_22
667 * @arg @ref LL_EXTI_LINE_23
668 * @arg @ref LL_EXTI_LINE_24
669 * @arg @ref LL_EXTI_LINE_25
670 * @arg @ref LL_EXTI_LINE_26
671 * @arg @ref LL_EXTI_LINE_27
672 * @arg @ref LL_EXTI_LINE_28
673 * @arg @ref LL_EXTI_LINE_29
674 * @arg @ref LL_EXTI_LINE_30
675 * @arg @ref LL_EXTI_LINE_31
676 * @arg @ref LL_EXTI_LINE_ALL_0_31
677 * @note Please check each device line mapping for EXTI Line availability
678 * @retval State of bit (1 or 0).
679 */
LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)680 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
681 {
682 return ((READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
683
684 }
685
686 /**
687 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
688 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
689 * @param ExtiLine This parameter can be a combination of the following values:
690 * @arg @ref LL_EXTI_LINE_32
691 * @arg @ref LL_EXTI_LINE_33
692 * @arg @ref LL_EXTI_LINE_34(*)
693 * @arg @ref LL_EXTI_LINE_35
694 * @arg @ref LL_EXTI_LINE_36
695 * @arg @ref LL_EXTI_LINE_37
696 * @arg @ref LL_EXTI_LINE_38
697 * @arg @ref LL_EXTI_LINE_39(*)
698 * @arg @ref LL_EXTI_LINE_40(*)
699 * @arg @ref LL_EXTI_LINE_ALL_32_63
700 * @note (*): Available in some devices
701 * @retval State of bit (1 or 0).
702 */
LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)703 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
704 {
705 return ((READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
706 }
707
708 /**
709 * @}
710 */
711
712 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
713 * @{
714 */
715
716 /**
717 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
718 * @note The configurable wakeup lines are edge-triggered. No glitch must be
719 * generated on these lines. If a rising edge on a configurable interrupt
720 * line occurs during a write operation in the EXTI_RTSR register, the
721 * pending bit is not set.
722 * Rising and falling edge triggers can be set for
723 * the same interrupt line. In this case, both generate a trigger
724 * condition.
725 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
726 * @param ExtiLine This parameter can be a combination of the following values:
727 * @arg @ref LL_EXTI_LINE_0
728 * @arg @ref LL_EXTI_LINE_1
729 * @arg @ref LL_EXTI_LINE_2
730 * @arg @ref LL_EXTI_LINE_3
731 * @arg @ref LL_EXTI_LINE_4
732 * @arg @ref LL_EXTI_LINE_5
733 * @arg @ref LL_EXTI_LINE_6
734 * @arg @ref LL_EXTI_LINE_7
735 * @arg @ref LL_EXTI_LINE_8
736 * @arg @ref LL_EXTI_LINE_9
737 * @arg @ref LL_EXTI_LINE_10
738 * @arg @ref LL_EXTI_LINE_11
739 * @arg @ref LL_EXTI_LINE_12
740 * @arg @ref LL_EXTI_LINE_13
741 * @arg @ref LL_EXTI_LINE_14
742 * @arg @ref LL_EXTI_LINE_15
743 * @arg @ref LL_EXTI_LINE_16
744 * @arg @ref LL_EXTI_LINE_18
745 * @arg @ref LL_EXTI_LINE_19
746 * @arg @ref LL_EXTI_LINE_20
747 * @arg @ref LL_EXTI_LINE_21
748 * @arg @ref LL_EXTI_LINE_22
749 * @arg @ref LL_EXTI_LINE_29
750 * @arg @ref LL_EXTI_LINE_30
751 * @arg @ref LL_EXTI_LINE_31
752 * @note Please check each device line mapping for EXTI Line availability
753 * @retval None
754 */
LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)755 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
756 {
757 SET_BIT(EXTI->RTSR1, ExtiLine);
758
759 }
760
761 /**
762 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
763 * @note The configurable wakeup lines are edge-triggered. No glitch must be
764 * generated on these lines. If a rising edge on a configurable interrupt
765 * line occurs during a write operation in the EXTI_RTSR register, the
766 * pending bit is not set.Rising and falling edge triggers can be set for
767 * the same interrupt line. In this case, both generate a trigger
768 * condition.
769 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
770 * @param ExtiLine This parameter can be a combination of the following values:
771 * @arg @ref LL_EXTI_LINE_35
772 * @arg @ref LL_EXTI_LINE_36
773 * @arg @ref LL_EXTI_LINE_37
774 * @arg @ref LL_EXTI_LINE_38
775 * @retval None
776 */
LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)777 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
778 {
779 SET_BIT(EXTI->RTSR2, ExtiLine);
780 }
781
782 /**
783 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
784 * @note The configurable wakeup lines are edge-triggered. No glitch must be
785 * generated on these lines. If a rising edge on a configurable interrupt
786 * line occurs during a write operation in the EXTI_RTSR register, the
787 * pending bit is not set.
788 * Rising and falling edge triggers can be set for
789 * the same interrupt line. In this case, both generate a trigger
790 * condition.
791 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
792 * @param ExtiLine This parameter can be a combination of the following values:
793 * @arg @ref LL_EXTI_LINE_0
794 * @arg @ref LL_EXTI_LINE_1
795 * @arg @ref LL_EXTI_LINE_2
796 * @arg @ref LL_EXTI_LINE_3
797 * @arg @ref LL_EXTI_LINE_4
798 * @arg @ref LL_EXTI_LINE_5
799 * @arg @ref LL_EXTI_LINE_6
800 * @arg @ref LL_EXTI_LINE_7
801 * @arg @ref LL_EXTI_LINE_8
802 * @arg @ref LL_EXTI_LINE_9
803 * @arg @ref LL_EXTI_LINE_10
804 * @arg @ref LL_EXTI_LINE_11
805 * @arg @ref LL_EXTI_LINE_12
806 * @arg @ref LL_EXTI_LINE_13
807 * @arg @ref LL_EXTI_LINE_14
808 * @arg @ref LL_EXTI_LINE_15
809 * @arg @ref LL_EXTI_LINE_16
810 * @arg @ref LL_EXTI_LINE_18
811 * @arg @ref LL_EXTI_LINE_19
812 * @arg @ref LL_EXTI_LINE_20
813 * @arg @ref LL_EXTI_LINE_21
814 * @arg @ref LL_EXTI_LINE_22
815 * @arg @ref LL_EXTI_LINE_29
816 * @arg @ref LL_EXTI_LINE_30
817 * @arg @ref LL_EXTI_LINE_31
818 * @note Please check each device line mapping for EXTI Line availability
819 * @retval None
820 */
LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)821 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
822 {
823 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
824
825 }
826
827 /**
828 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
829 * @note The configurable wakeup lines are edge-triggered. No glitch must be
830 * generated on these lines. If a rising edge on a configurable interrupt
831 * line occurs during a write operation in the EXTI_RTSR register, the
832 * pending bit is not set.
833 * Rising and falling edge triggers can be set for
834 * the same interrupt line. In this case, both generate a trigger
835 * condition.
836 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
837 * @param ExtiLine This parameter can be a combination of the following values:
838 * @arg @ref LL_EXTI_LINE_35
839 * @arg @ref LL_EXTI_LINE_36
840 * @arg @ref LL_EXTI_LINE_37
841 * @arg @ref LL_EXTI_LINE_38
842 * @retval None
843 */
LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)844 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
845 {
846 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
847 }
848
849 /**
850 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
851 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
852 * @param ExtiLine This parameter can be a combination of the following values:
853 * @arg @ref LL_EXTI_LINE_0
854 * @arg @ref LL_EXTI_LINE_1
855 * @arg @ref LL_EXTI_LINE_2
856 * @arg @ref LL_EXTI_LINE_3
857 * @arg @ref LL_EXTI_LINE_4
858 * @arg @ref LL_EXTI_LINE_5
859 * @arg @ref LL_EXTI_LINE_6
860 * @arg @ref LL_EXTI_LINE_7
861 * @arg @ref LL_EXTI_LINE_8
862 * @arg @ref LL_EXTI_LINE_9
863 * @arg @ref LL_EXTI_LINE_10
864 * @arg @ref LL_EXTI_LINE_11
865 * @arg @ref LL_EXTI_LINE_12
866 * @arg @ref LL_EXTI_LINE_13
867 * @arg @ref LL_EXTI_LINE_14
868 * @arg @ref LL_EXTI_LINE_15
869 * @arg @ref LL_EXTI_LINE_16
870 * @arg @ref LL_EXTI_LINE_18
871 * @arg @ref LL_EXTI_LINE_19
872 * @arg @ref LL_EXTI_LINE_20
873 * @arg @ref LL_EXTI_LINE_21
874 * @arg @ref LL_EXTI_LINE_22
875 * @arg @ref LL_EXTI_LINE_29
876 * @arg @ref LL_EXTI_LINE_30
877 * @arg @ref LL_EXTI_LINE_31
878 * @note Please check each device line mapping for EXTI Line availability
879 * @retval State of bit (1 or 0).
880 */
LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)881 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
882 {
883 return ((READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
884 }
885
886 /**
887 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
888 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
889 * @param ExtiLine This parameter can be a combination of the following values:
890 * @arg @ref LL_EXTI_LINE_35
891 * @arg @ref LL_EXTI_LINE_36
892 * @arg @ref LL_EXTI_LINE_37
893 * @arg @ref LL_EXTI_LINE_38
894 * @retval State of bit (1 or 0).
895 */
LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)896 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
897 {
898 return ((READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
899 }
900
901 /**
902 * @}
903 */
904
905 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
906 * @{
907 */
908
909 /**
910 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
911 * @note The configurable wakeup lines are edge-triggered. No glitch must be
912 * generated on these lines. If a falling edge on a configurable interrupt
913 * line occurs during a write operation in the EXTI_FTSR register, the
914 * pending bit is not set.
915 * Rising and falling edge triggers can be set for
916 * the same interrupt line. In this case, both generate a trigger
917 * condition.
918 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
919 * @param ExtiLine This parameter can be a combination of the following values:
920 * @arg @ref LL_EXTI_LINE_0
921 * @arg @ref LL_EXTI_LINE_1
922 * @arg @ref LL_EXTI_LINE_2
923 * @arg @ref LL_EXTI_LINE_3
924 * @arg @ref LL_EXTI_LINE_4
925 * @arg @ref LL_EXTI_LINE_5
926 * @arg @ref LL_EXTI_LINE_6
927 * @arg @ref LL_EXTI_LINE_7
928 * @arg @ref LL_EXTI_LINE_8
929 * @arg @ref LL_EXTI_LINE_9
930 * @arg @ref LL_EXTI_LINE_10
931 * @arg @ref LL_EXTI_LINE_11
932 * @arg @ref LL_EXTI_LINE_12
933 * @arg @ref LL_EXTI_LINE_13
934 * @arg @ref LL_EXTI_LINE_14
935 * @arg @ref LL_EXTI_LINE_15
936 * @arg @ref LL_EXTI_LINE_16
937 * @arg @ref LL_EXTI_LINE_18
938 * @arg @ref LL_EXTI_LINE_19
939 * @arg @ref LL_EXTI_LINE_20
940 * @arg @ref LL_EXTI_LINE_21
941 * @arg @ref LL_EXTI_LINE_22
942 * @arg @ref LL_EXTI_LINE_29
943 * @arg @ref LL_EXTI_LINE_30
944 * @arg @ref LL_EXTI_LINE_31
945 * @note Please check each device line mapping for EXTI Line availability
946 * @retval None
947 */
LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)948 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
949 {
950 SET_BIT(EXTI->FTSR1, ExtiLine);
951 }
952
953 /**
954 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
955 * @note The configurable wakeup lines are edge-triggered. No glitch must be
956 * generated on these lines. If a Falling edge on a configurable interrupt
957 * line occurs during a write operation in the EXTI_FTSR register, the
958 * pending bit is not set.
959 * Rising and falling edge triggers can be set for
960 * the same interrupt line. In this case, both generate a trigger
961 * condition.
962 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
963 * @param ExtiLine This parameter can be a combination of the following values:
964 * @arg @ref LL_EXTI_LINE_35
965 * @arg @ref LL_EXTI_LINE_36
966 * @arg @ref LL_EXTI_LINE_37
967 * @arg @ref LL_EXTI_LINE_38
968 * @retval None
969 */
LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)970 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
971 {
972 SET_BIT(EXTI->FTSR2, ExtiLine);
973 }
974
975 /**
976 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
977 * @note The configurable wakeup lines are edge-triggered. No glitch must be
978 * generated on these lines. If a Falling edge on a configurable interrupt
979 * line occurs during a write operation in the EXTI_FTSR register, the
980 * pending bit is not set.
981 * Rising and falling edge triggers can be set for the same interrupt line.
982 * In this case, both generate a trigger condition.
983 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
984 * @param ExtiLine This parameter can be a combination of the following values:
985 * @arg @ref LL_EXTI_LINE_0
986 * @arg @ref LL_EXTI_LINE_1
987 * @arg @ref LL_EXTI_LINE_2
988 * @arg @ref LL_EXTI_LINE_3
989 * @arg @ref LL_EXTI_LINE_4
990 * @arg @ref LL_EXTI_LINE_5
991 * @arg @ref LL_EXTI_LINE_6
992 * @arg @ref LL_EXTI_LINE_7
993 * @arg @ref LL_EXTI_LINE_8
994 * @arg @ref LL_EXTI_LINE_9
995 * @arg @ref LL_EXTI_LINE_10
996 * @arg @ref LL_EXTI_LINE_11
997 * @arg @ref LL_EXTI_LINE_12
998 * @arg @ref LL_EXTI_LINE_13
999 * @arg @ref LL_EXTI_LINE_14
1000 * @arg @ref LL_EXTI_LINE_15
1001 * @arg @ref LL_EXTI_LINE_16
1002 * @arg @ref LL_EXTI_LINE_18
1003 * @arg @ref LL_EXTI_LINE_19
1004 * @arg @ref LL_EXTI_LINE_20
1005 * @arg @ref LL_EXTI_LINE_21
1006 * @arg @ref LL_EXTI_LINE_22
1007 * @arg @ref LL_EXTI_LINE_29
1008 * @arg @ref LL_EXTI_LINE_30
1009 * @arg @ref LL_EXTI_LINE_31
1010 * @note Please check each device line mapping for EXTI Line availability
1011 * @retval None
1012 */
LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)1013 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
1014 {
1015 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
1016 }
1017
1018 /**
1019 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
1020 * @note The configurable wakeup lines are edge-triggered. No glitch must be
1021 * generated on these lines. If a Falling edge on a configurable interrupt
1022 * line occurs during a write operation in the EXTI_FTSR register, the
1023 * pending bit is not set.
1024 * Rising and falling edge triggers can be set for the same interrupt line.
1025 * In this case, both generate a trigger condition.
1026 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
1027 * @param ExtiLine This parameter can be a combination of the following values:
1028 * @arg @ref LL_EXTI_LINE_35
1029 * @arg @ref LL_EXTI_LINE_36
1030 * @arg @ref LL_EXTI_LINE_37
1031 * @arg @ref LL_EXTI_LINE_38
1032 * @retval None
1033 */
LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)1034 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
1035 {
1036 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
1037 }
1038
1039 /**
1040 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
1041 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
1042 * @param ExtiLine This parameter can be a combination of the following values:
1043 * @arg @ref LL_EXTI_LINE_0
1044 * @arg @ref LL_EXTI_LINE_1
1045 * @arg @ref LL_EXTI_LINE_2
1046 * @arg @ref LL_EXTI_LINE_3
1047 * @arg @ref LL_EXTI_LINE_4
1048 * @arg @ref LL_EXTI_LINE_5
1049 * @arg @ref LL_EXTI_LINE_6
1050 * @arg @ref LL_EXTI_LINE_7
1051 * @arg @ref LL_EXTI_LINE_8
1052 * @arg @ref LL_EXTI_LINE_9
1053 * @arg @ref LL_EXTI_LINE_10
1054 * @arg @ref LL_EXTI_LINE_11
1055 * @arg @ref LL_EXTI_LINE_12
1056 * @arg @ref LL_EXTI_LINE_13
1057 * @arg @ref LL_EXTI_LINE_14
1058 * @arg @ref LL_EXTI_LINE_15
1059 * @arg @ref LL_EXTI_LINE_16
1060 * @arg @ref LL_EXTI_LINE_18
1061 * @arg @ref LL_EXTI_LINE_19
1062 * @arg @ref LL_EXTI_LINE_20
1063 * @arg @ref LL_EXTI_LINE_21
1064 * @arg @ref LL_EXTI_LINE_22
1065 * @arg @ref LL_EXTI_LINE_29
1066 * @arg @ref LL_EXTI_LINE_30
1067 * @arg @ref LL_EXTI_LINE_31
1068 * @note Please check each device line mapping for EXTI Line availability
1069 * @retval State of bit (1 or 0).
1070 */
LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)1071 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
1072 {
1073 return ((READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1074 }
1075
1076 /**
1077 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
1078 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
1079 * @param ExtiLine This parameter can be a combination of the following values:
1080 * @arg @ref LL_EXTI_LINE_35
1081 * @arg @ref LL_EXTI_LINE_36
1082 * @arg @ref LL_EXTI_LINE_37
1083 * @arg @ref LL_EXTI_LINE_38
1084 * @retval State of bit (1 or 0).
1085 */
LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)1086 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
1087 {
1088 return ((READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1089 }
1090
1091 /**
1092 * @}
1093 */
1094
1095 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
1096 * @{
1097 */
1098
1099 /**
1100 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
1101 * @note If the interrupt is enabled on this line in the EXTI_IMR1, writing a 1 to
1102 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR1
1103 * resulting in an interrupt request generation.
1104 * This bit is cleared by clearing the corresponding bit in the EXTI_PR1
1105 * register (by writing a 1 into the bit)
1106 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
1107 * @param ExtiLine This parameter can be a combination of the following values:
1108 * @arg @ref LL_EXTI_LINE_0
1109 * @arg @ref LL_EXTI_LINE_1
1110 * @arg @ref LL_EXTI_LINE_2
1111 * @arg @ref LL_EXTI_LINE_3
1112 * @arg @ref LL_EXTI_LINE_4
1113 * @arg @ref LL_EXTI_LINE_5
1114 * @arg @ref LL_EXTI_LINE_6
1115 * @arg @ref LL_EXTI_LINE_7
1116 * @arg @ref LL_EXTI_LINE_8
1117 * @arg @ref LL_EXTI_LINE_9
1118 * @arg @ref LL_EXTI_LINE_10
1119 * @arg @ref LL_EXTI_LINE_11
1120 * @arg @ref LL_EXTI_LINE_12
1121 * @arg @ref LL_EXTI_LINE_13
1122 * @arg @ref LL_EXTI_LINE_14
1123 * @arg @ref LL_EXTI_LINE_15
1124 * @arg @ref LL_EXTI_LINE_16
1125 * @arg @ref LL_EXTI_LINE_18
1126 * @arg @ref LL_EXTI_LINE_19
1127 * @arg @ref LL_EXTI_LINE_20
1128 * @arg @ref LL_EXTI_LINE_21
1129 * @arg @ref LL_EXTI_LINE_22
1130 * @arg @ref LL_EXTI_LINE_29
1131 * @arg @ref LL_EXTI_LINE_30
1132 * @arg @ref LL_EXTI_LINE_31
1133 * @note Please check each device line mapping for EXTI Line availability
1134 * @retval None
1135 */
LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)1136 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
1137 {
1138 SET_BIT(EXTI->SWIER1, ExtiLine);
1139 }
1140
1141 /**
1142 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
1143 * @note If the interrupt is enabled on this line inthe EXTI_IMR2, writing a 1 to
1144 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR2
1145 * resulting in an interrupt request generation.
1146 * This bit is cleared by clearing the corresponding bit in the EXTI_PR2
1147 * register (by writing a 1 into the bit)
1148 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
1149 * @param ExtiLine This parameter can be a combination of the following values:
1150 * @arg @ref LL_EXTI_LINE_35
1151 * @arg @ref LL_EXTI_LINE_36
1152 * @arg @ref LL_EXTI_LINE_37
1153 * @arg @ref LL_EXTI_LINE_38
1154 * @retval None
1155 */
LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)1156 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
1157 {
1158 SET_BIT(EXTI->SWIER2, ExtiLine);
1159 }
1160
1161 /**
1162 * @}
1163 */
1164
1165 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
1166 * @{
1167 */
1168
1169 /**
1170 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
1171 * @note This bit is set when the selected edge event arrives on the interrupt
1172 * line. This bit is cleared by writing a 1 to the bit.
1173 * @rmtoll PR1 PIFx LL_EXTI_IsActiveFlag_0_31
1174 * @param ExtiLine This parameter can be a combination of the following values:
1175 * @arg @ref LL_EXTI_LINE_0
1176 * @arg @ref LL_EXTI_LINE_1
1177 * @arg @ref LL_EXTI_LINE_2
1178 * @arg @ref LL_EXTI_LINE_3
1179 * @arg @ref LL_EXTI_LINE_4
1180 * @arg @ref LL_EXTI_LINE_5
1181 * @arg @ref LL_EXTI_LINE_6
1182 * @arg @ref LL_EXTI_LINE_7
1183 * @arg @ref LL_EXTI_LINE_8
1184 * @arg @ref LL_EXTI_LINE_9
1185 * @arg @ref LL_EXTI_LINE_10
1186 * @arg @ref LL_EXTI_LINE_11
1187 * @arg @ref LL_EXTI_LINE_12
1188 * @arg @ref LL_EXTI_LINE_13
1189 * @arg @ref LL_EXTI_LINE_14
1190 * @arg @ref LL_EXTI_LINE_15
1191 * @arg @ref LL_EXTI_LINE_16
1192 * @arg @ref LL_EXTI_LINE_18
1193 * @arg @ref LL_EXTI_LINE_19
1194 * @arg @ref LL_EXTI_LINE_20
1195 * @arg @ref LL_EXTI_LINE_21
1196 * @arg @ref LL_EXTI_LINE_22
1197 * @arg @ref LL_EXTI_LINE_29
1198 * @arg @ref LL_EXTI_LINE_30
1199 * @arg @ref LL_EXTI_LINE_31
1200 * @note Please check each device line mapping for EXTI Line availability
1201 * @retval State of bit (1 or 0).
1202 */
LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)1203 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
1204 {
1205 return ((READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1206 }
1207
1208 /**
1209 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
1210 * @note This bit is set when the selected edge event arrives on the interrupt
1211 * line. This bit is cleared by writing a 1 to the bit.
1212 * @rmtoll PR2 PIFx LL_EXTI_IsActiveFlag_32_63
1213 * @param ExtiLine This parameter can be a combination of the following values:
1214 * @arg @ref LL_EXTI_LINE_35
1215 * @arg @ref LL_EXTI_LINE_36
1216 * @arg @ref LL_EXTI_LINE_37
1217 * @arg @ref LL_EXTI_LINE_38
1218 * @retval State of bit (1 or 0).
1219 */
LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)1220 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
1221 {
1222 return ((READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine)) ? 1UL : 0UL);
1223 }
1224
1225 /**
1226 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
1227 * @note This bit is set when the selected edge event arrives on the interrupt
1228 * line. This bit is cleared by writing a 1 to the bit.
1229 * @rmtoll PR1 PIFx LL_EXTI_ReadFlag_0_31
1230 * @param ExtiLine This parameter can be a combination of the following values:
1231 * @arg @ref LL_EXTI_LINE_0
1232 * @arg @ref LL_EXTI_LINE_1
1233 * @arg @ref LL_EXTI_LINE_2
1234 * @arg @ref LL_EXTI_LINE_3
1235 * @arg @ref LL_EXTI_LINE_4
1236 * @arg @ref LL_EXTI_LINE_5
1237 * @arg @ref LL_EXTI_LINE_6
1238 * @arg @ref LL_EXTI_LINE_7
1239 * @arg @ref LL_EXTI_LINE_8
1240 * @arg @ref LL_EXTI_LINE_9
1241 * @arg @ref LL_EXTI_LINE_10
1242 * @arg @ref LL_EXTI_LINE_11
1243 * @arg @ref LL_EXTI_LINE_12
1244 * @arg @ref LL_EXTI_LINE_13
1245 * @arg @ref LL_EXTI_LINE_14
1246 * @arg @ref LL_EXTI_LINE_15
1247 * @arg @ref LL_EXTI_LINE_16
1248 * @arg @ref LL_EXTI_LINE_18
1249 * @arg @ref LL_EXTI_LINE_19
1250 * @arg @ref LL_EXTI_LINE_20
1251 * @arg @ref LL_EXTI_LINE_21
1252 * @arg @ref LL_EXTI_LINE_22
1253 * @arg @ref LL_EXTI_LINE_29
1254 * @arg @ref LL_EXTI_LINE_30
1255 * @arg @ref LL_EXTI_LINE_31
1256 * @note Please check each device line mapping for EXTI Line availability
1257 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1258 */
LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)1259 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
1260 {
1261 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
1262 }
1263
1264 /**
1265 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
1266 * @note This bit is set when the selected edge event arrives on the interrupt
1267 * line. This bit is cleared by writing a 1 to the bit.
1268 * @rmtoll PR2 PIFx LL_EXTI_ReadFlag_32_63
1269 * @param ExtiLine This parameter can be a combination of the following values:
1270 * @arg @ref LL_EXTI_LINE_35
1271 * @arg @ref LL_EXTI_LINE_36
1272 * @arg @ref LL_EXTI_LINE_37
1273 * @arg @ref LL_EXTI_LINE_38
1274 * @retval @note This bit is set when the selected edge event arrives on the interrupt
1275 */
LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)1276 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
1277 {
1278 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
1279 }
1280
1281 /**
1282 * @brief Clear ExtLine Flags for Lines in range 0 to 31
1283 * @note This bit is set when the selected edge event arrives on the interrupt
1284 * line. This bit is cleared by writing a 1 to the bit.
1285 * @rmtoll PR1 PIFx LL_EXTI_ClearFlag_0_31
1286 * @param ExtiLine This parameter can be a combination of the following values:
1287 * @arg @ref LL_EXTI_LINE_0
1288 * @arg @ref LL_EXTI_LINE_1
1289 * @arg @ref LL_EXTI_LINE_2
1290 * @arg @ref LL_EXTI_LINE_3
1291 * @arg @ref LL_EXTI_LINE_4
1292 * @arg @ref LL_EXTI_LINE_5
1293 * @arg @ref LL_EXTI_LINE_6
1294 * @arg @ref LL_EXTI_LINE_7
1295 * @arg @ref LL_EXTI_LINE_8
1296 * @arg @ref LL_EXTI_LINE_9
1297 * @arg @ref LL_EXTI_LINE_10
1298 * @arg @ref LL_EXTI_LINE_11
1299 * @arg @ref LL_EXTI_LINE_12
1300 * @arg @ref LL_EXTI_LINE_13
1301 * @arg @ref LL_EXTI_LINE_14
1302 * @arg @ref LL_EXTI_LINE_15
1303 * @arg @ref LL_EXTI_LINE_16
1304 * @arg @ref LL_EXTI_LINE_18
1305 * @arg @ref LL_EXTI_LINE_19
1306 * @arg @ref LL_EXTI_LINE_20
1307 * @arg @ref LL_EXTI_LINE_21
1308 * @arg @ref LL_EXTI_LINE_22
1309 * @arg @ref LL_EXTI_LINE_29
1310 * @arg @ref LL_EXTI_LINE_30
1311 * @arg @ref LL_EXTI_LINE_31
1312 * @note Please check each device line mapping for EXTI Line availability
1313 * @retval None
1314 */
LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)1315 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
1316 {
1317 WRITE_REG(EXTI->PR1, ExtiLine);
1318 }
1319
1320 /**
1321 * @brief Clear ExtLine Flags for Lines in range 32 to 63
1322 * @note This bit is set when the selected edge event arrives on the interrupt
1323 * line. This bit is cleared by writing a 1 to the bit.
1324 * @rmtoll PR2 PIFx LL_EXTI_ClearFlag_32_63
1325 * @param ExtiLine This parameter can be a combination of the following values:
1326 * @arg @ref LL_EXTI_LINE_35
1327 * @arg @ref LL_EXTI_LINE_36
1328 * @arg @ref LL_EXTI_LINE_37
1329 * @arg @ref LL_EXTI_LINE_38
1330 * @retval None
1331 */
LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)1332 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
1333 {
1334 WRITE_REG(EXTI->PR2, ExtiLine);
1335 }
1336
1337
1338 /**
1339 * @}
1340 */
1341
1342 #if defined(USE_FULL_LL_DRIVER)
1343 /** @defgroup EXTI_LL_EF_Init Initialization and de-initialization functions
1344 * @{
1345 */
1346
1347 uint32_t LL_EXTI_Init(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1348 uint32_t LL_EXTI_DeInit(void);
1349 void LL_EXTI_StructInit(LL_EXTI_InitTypeDef *EXTI_InitStruct);
1350
1351
1352 /**
1353 * @}
1354 */
1355 #endif /* USE_FULL_LL_DRIVER */
1356
1357 /**
1358 * @}
1359 */
1360
1361 /**
1362 * @}
1363 */
1364
1365 #endif /* EXTI */
1366
1367 /**
1368 * @}
1369 */
1370
1371 #ifdef __cplusplus
1372 }
1373 #endif
1374
1375 #endif /* __STM32L4xx_LL_EXTI_H */
1376
1377 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1378
