1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_tim_ex.c
4 * @author MCD Application Team
5 * @brief TIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Timer Extended peripheral:
8 * + Time Hall Sensor Interface Initialization
9 * + Time Hall Sensor Interface Start
10 * + Time Complementary signal break and dead time configuration
11 * + Time Master and Slave synchronization configuration
12 * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
13 * + Time OCRef clear configuration
14 * + Timer remapping capabilities configuration
15 @verbatim
16 ==============================================================================
17 ##### TIMER Extended features #####
18 ==============================================================================
19 [..]
20 The Timer Extended features include:
21 (#) Complementary outputs with programmable dead-time for :
22 (++) Output Compare
23 (++) PWM generation (Edge and Center-aligned Mode)
24 (++) One-pulse mode output
25 (#) Synchronization circuit to control the timer with external signals and to
26 interconnect several timers together.
27 (#) Break input to put the timer output signals in reset state or in a known state.
28 (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
29 positioning purposes
30
31 ##### How to use this driver #####
32 ==============================================================================
33 [..]
34 (#) Initialize the TIM low level resources by implementing the following functions
35 depending on the selected feature:
36 (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
37
38 (#) Initialize the TIM low level resources :
39 (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
40 (##) TIM pins configuration
41 (+++) Enable the clock for the TIM GPIOs using the following function:
42 __HAL_RCC_GPIOx_CLK_ENABLE();
43 (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
44
45 (#) The external Clock can be configured, if needed (the default clock is the
46 internal clock from the APBx), using the following function:
47 HAL_TIM_ConfigClockSource, the clock configuration should be done before
48 any start function.
49
50 (#) Configure the TIM in the desired functioning mode using one of the
51 initialization function of this driver:
52 (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the
53 Timer Hall Sensor Interface and the commutation event with the corresponding
54 Interrupt and DMA request if needed (Note that One Timer is used to interface
55 with the Hall sensor Interface and another Timer should be used to use
56 the commutation event).
57
58 (#) Activate the TIM peripheral using one of the start functions:
59 (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
60 (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
61 (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
62 (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
63
64 @endverbatim
65 ******************************************************************************
66 * @attention
67 *
68 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
69 *
70 * Redistribution and use in source and binary forms, with or without modification,
71 * are permitted provided that the following conditions are met:
72 * 1. Redistributions of source code must retain the above copyright notice,
73 * this list of conditions and the following disclaimer.
74 * 2. Redistributions in binary form must reproduce the above copyright notice,
75 * this list of conditions and the following disclaimer in the documentation
76 * and/or other materials provided with the distribution.
77 * 3. Neither the name of STMicroelectronics nor the names of its contributors
78 * may be used to endorse or promote products derived from this software
79 * without specific prior written permission.
80 *
81 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
82 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
83 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
84 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
85 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
86 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
87 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
88 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
89 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
90 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
91 *
92 ******************************************************************************
93 */
94
95 /* Includes ------------------------------------------------------------------*/
96 #include "stm32l4xx_hal.h"
97
98 /** @addtogroup STM32L4xx_HAL_Driver
99 * @{
100 */
101
102 /** @defgroup TIMEx TIMEx
103 * @brief TIM Extended HAL module driver
104 * @{
105 */
106
107 #ifdef HAL_TIM_MODULE_ENABLED
108
109 /* Private typedef -----------------------------------------------------------*/
110 /* Private define ------------------------------------------------------------*/
111 /* Private macro -------------------------------------------------------------*/
112 /* Private variables ---------------------------------------------------------*/
113 /* Private function prototypes -----------------------------------------------*/
114 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
115
116 /* Exported functions --------------------------------------------------------*/
117 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
118 * @{
119 */
120
121 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
122 * @brief Timer Hall Sensor functions
123 *
124 @verbatim
125 ==============================================================================
126 ##### Timer Hall Sensor functions #####
127 ==============================================================================
128 [..]
129 This section provides functions allowing to:
130 (+) Initialize and configure TIM HAL Sensor.
131 (+) De-initialize TIM HAL Sensor.
132 (+) Start the Hall Sensor Interface.
133 (+) Stop the Hall Sensor Interface.
134 (+) Start the Hall Sensor Interface and enable interrupts.
135 (+) Stop the Hall Sensor Interface and disable interrupts.
136 (+) Start the Hall Sensor Interface and enable DMA transfers.
137 (+) Stop the Hall Sensor Interface and disable DMA transfers.
138
139 @endverbatim
140 * @{
141 */
142 /**
143 * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
144 * @param htim TIM Hall Sensor Interface handle
145 * @param sConfig TIM Hall Sensor configuration structure
146 * @retval HAL status
147 */
HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef * htim,TIM_HallSensor_InitTypeDef * sConfig)148 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
149 {
150 TIM_OC_InitTypeDef OC_Config;
151
152 /* Check the TIM handle allocation */
153 if (htim == NULL)
154 {
155 return HAL_ERROR;
156 }
157
158 /* Check the parameters */
159 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
160 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
161 assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
162 assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
163 assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
164 assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
165 assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
166
167 if (htim->State == HAL_TIM_STATE_RESET)
168 {
169 /* Allocate lock resource and initialize it */
170 htim->Lock = HAL_UNLOCKED;
171
172 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
173 /* Reset interrupt callbacks to legacy week callbacks */
174 TIM_ResetCallback(htim);
175
176 if (htim->HallSensor_MspInitCallback == NULL)
177 {
178 htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
179 }
180 /* Init the low level hardware : GPIO, CLOCK, NVIC */
181 htim->HallSensor_MspInitCallback(htim);
182 #else
183 /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
184 HAL_TIMEx_HallSensor_MspInit(htim);
185 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
186 }
187
188 /* Set the TIM state */
189 htim->State = HAL_TIM_STATE_BUSY;
190
191 /* Configure the Time base in the Encoder Mode */
192 TIM_Base_SetConfig(htim->Instance, &htim->Init);
193
194 /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
195 TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
196
197 /* Reset the IC1PSC Bits */
198 htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
199 /* Set the IC1PSC value */
200 htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
201
202 /* Enable the Hall sensor interface (XOR function of the three inputs) */
203 htim->Instance->CR2 |= TIM_CR2_TI1S;
204
205 /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
206 htim->Instance->SMCR &= ~TIM_SMCR_TS;
207 htim->Instance->SMCR |= TIM_TS_TI1F_ED;
208
209 /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
210 htim->Instance->SMCR &= ~TIM_SMCR_SMS;
211 htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
212
213 /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
214 OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
215 OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
216 OC_Config.OCMode = TIM_OCMODE_PWM2;
217 OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
218 OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
219 OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
220 OC_Config.Pulse = sConfig->Commutation_Delay;
221
222 TIM_OC2_SetConfig(htim->Instance, &OC_Config);
223
224 /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
225 register to 101 */
226 htim->Instance->CR2 &= ~TIM_CR2_MMS;
227 htim->Instance->CR2 |= TIM_TRGO_OC2REF;
228
229 /* Initialize the TIM state*/
230 htim->State = HAL_TIM_STATE_READY;
231
232 return HAL_OK;
233 }
234
235 /**
236 * @brief DeInitializes the TIM Hall Sensor interface
237 * @param htim TIM Hall Sensor Interface handle
238 * @retval HAL status
239 */
HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef * htim)240 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
241 {
242 /* Check the parameters */
243 assert_param(IS_TIM_INSTANCE(htim->Instance));
244
245 htim->State = HAL_TIM_STATE_BUSY;
246
247 /* Disable the TIM Peripheral Clock */
248 __HAL_TIM_DISABLE(htim);
249
250 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
251 if (htim->HallSensor_MspDeInitCallback == NULL)
252 {
253 htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
254 }
255 /* DeInit the low level hardware */
256 htim->HallSensor_MspDeInitCallback(htim);
257 #else
258 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
259 HAL_TIMEx_HallSensor_MspDeInit(htim);
260 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
261
262 /* Change TIM state */
263 htim->State = HAL_TIM_STATE_RESET;
264
265 /* Release Lock */
266 __HAL_UNLOCK(htim);
267
268 return HAL_OK;
269 }
270
271 /**
272 * @brief Initializes the TIM Hall Sensor MSP.
273 * @param htim TIM Hall Sensor Interface handle
274 * @retval None
275 */
HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef * htim)276 __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
277 {
278 /* Prevent unused argument(s) compilation warning */
279 UNUSED(htim);
280
281 /* NOTE : This function should not be modified, when the callback is needed,
282 the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
283 */
284 }
285
286 /**
287 * @brief DeInitializes TIM Hall Sensor MSP.
288 * @param htim TIM Hall Sensor Interface handle
289 * @retval None
290 */
HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef * htim)291 __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
292 {
293 /* Prevent unused argument(s) compilation warning */
294 UNUSED(htim);
295
296 /* NOTE : This function should not be modified, when the callback is needed,
297 the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
298 */
299 }
300
301 /**
302 * @brief Starts the TIM Hall Sensor Interface.
303 * @param htim TIM Hall Sensor Interface handle
304 * @retval HAL status
305 */
HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef * htim)306 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
307 {
308 /* Check the parameters */
309 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
310
311 /* Enable the Input Capture channel 1
312 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
313 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
314
315 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
316 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
317 {
318 __HAL_TIM_ENABLE(htim);
319 }
320
321 /* Return function status */
322 return HAL_OK;
323 }
324
325 /**
326 * @brief Stops the TIM Hall sensor Interface.
327 * @param htim TIM Hall Sensor Interface handle
328 * @retval HAL status
329 */
HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef * htim)330 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
331 {
332 /* Check the parameters */
333 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
334
335 /* Disable the Input Capture channels 1, 2 and 3
336 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
337 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
338
339 /* Disable the Peripheral */
340 __HAL_TIM_DISABLE(htim);
341
342 /* Return function status */
343 return HAL_OK;
344 }
345
346 /**
347 * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
348 * @param htim TIM Hall Sensor Interface handle
349 * @retval HAL status
350 */
HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef * htim)351 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
352 {
353 /* Check the parameters */
354 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
355
356 /* Enable the capture compare Interrupts 1 event */
357 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
358
359 /* Enable the Input Capture channel 1
360 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
361 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
362
363 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
364 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
365 {
366 __HAL_TIM_ENABLE(htim);
367 }
368
369 /* Return function status */
370 return HAL_OK;
371 }
372
373 /**
374 * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
375 * @param htim TIM Hall Sensor Interface handle
376 * @retval HAL status
377 */
HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef * htim)378 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
379 {
380 /* Check the parameters */
381 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
382
383 /* Disable the Input Capture channel 1
384 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
385 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
386
387 /* Disable the capture compare Interrupts event */
388 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
389
390 /* Disable the Peripheral */
391 __HAL_TIM_DISABLE(htim);
392
393 /* Return function status */
394 return HAL_OK;
395 }
396
397 /**
398 * @brief Starts the TIM Hall Sensor Interface in DMA mode.
399 * @param htim TIM Hall Sensor Interface handle
400 * @param pData The destination Buffer address.
401 * @param Length The length of data to be transferred from TIM peripheral to memory.
402 * @retval HAL status
403 */
HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef * htim,uint32_t * pData,uint16_t Length)404 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
405 {
406 /* Check the parameters */
407 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
408
409 if ((htim->State == HAL_TIM_STATE_BUSY))
410 {
411 return HAL_BUSY;
412 }
413 else if ((htim->State == HAL_TIM_STATE_READY))
414 {
415 if (((uint32_t)pData == 0U) && (Length > 0U))
416 {
417 return HAL_ERROR;
418 }
419 else
420 {
421 htim->State = HAL_TIM_STATE_BUSY;
422 }
423 }
424 else
425 {
426 /* nothing to do */
427 }
428 /* Enable the Input Capture channel 1
429 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
430 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
431
432 /* Set the DMA Input Capture 1 Callback */
433 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
434 /* Set the DMA error callback */
435 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
436
437 /* Enable the DMA channel for Capture 1*/
438 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
439 {
440 return HAL_ERROR;
441 }
442 /* Enable the capture compare 1 Interrupt */
443 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
444
445 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
446 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
447 {
448 __HAL_TIM_ENABLE(htim);
449 }
450
451 /* Return function status */
452 return HAL_OK;
453 }
454
455 /**
456 * @brief Stops the TIM Hall Sensor Interface in DMA mode.
457 * @param htim TIM Hall Sensor Interface handle
458 * @retval HAL status
459 */
HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef * htim)460 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
461 {
462 /* Check the parameters */
463 assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
464
465 /* Disable the Input Capture channel 1
466 (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
467 TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
468
469
470 /* Disable the capture compare Interrupts 1 event */
471 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
472
473 /* Disable the Peripheral */
474 __HAL_TIM_DISABLE(htim);
475
476 /* Return function status */
477 return HAL_OK;
478 }
479
480 /**
481 * @}
482 */
483
484 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
485 * @brief Timer Complementary Output Compare functions
486 *
487 @verbatim
488 ==============================================================================
489 ##### Timer Complementary Output Compare functions #####
490 ==============================================================================
491 [..]
492 This section provides functions allowing to:
493 (+) Start the Complementary Output Compare/PWM.
494 (+) Stop the Complementary Output Compare/PWM.
495 (+) Start the Complementary Output Compare/PWM and enable interrupts.
496 (+) Stop the Complementary Output Compare/PWM and disable interrupts.
497 (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
498 (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
499
500 @endverbatim
501 * @{
502 */
503
504 /**
505 * @brief Starts the TIM Output Compare signal generation on the complementary
506 * output.
507 * @param htim TIM Output Compare handle
508 * @param Channel TIM Channel to be enabled
509 * This parameter can be one of the following values:
510 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
511 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
512 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
513 * @retval HAL status
514 */
HAL_TIMEx_OCN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)515 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
516 {
517 /* Check the parameters */
518 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
519
520 /* Enable the Capture compare channel N */
521 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
522
523 /* Enable the Main Output */
524 __HAL_TIM_MOE_ENABLE(htim);
525
526 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
527 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
528 {
529 __HAL_TIM_ENABLE(htim);
530 }
531
532 /* Return function status */
533 return HAL_OK;
534 }
535
536 /**
537 * @brief Stops the TIM Output Compare signal generation on the complementary
538 * output.
539 * @param htim TIM handle
540 * @param Channel TIM Channel to be disabled
541 * This parameter can be one of the following values:
542 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
543 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
544 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
545 * @retval HAL status
546 */
HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)547 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
548 {
549 /* Check the parameters */
550 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
551
552 /* Disable the Capture compare channel N */
553 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
554
555 /* Disable the Main Output */
556 __HAL_TIM_MOE_DISABLE(htim);
557
558 /* Disable the Peripheral */
559 __HAL_TIM_DISABLE(htim);
560
561 /* Return function status */
562 return HAL_OK;
563 }
564
565 /**
566 * @brief Starts the TIM Output Compare signal generation in interrupt mode
567 * on the complementary output.
568 * @param htim TIM OC handle
569 * @param Channel TIM Channel to be enabled
570 * This parameter can be one of the following values:
571 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
572 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
573 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
574 * @retval HAL status
575 */
HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)576 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
577 {
578 /* Check the parameters */
579 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
580
581 switch (Channel)
582 {
583 case TIM_CHANNEL_1:
584 {
585 /* Enable the TIM Output Compare interrupt */
586 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
587 break;
588 }
589
590 case TIM_CHANNEL_2:
591 {
592 /* Enable the TIM Output Compare interrupt */
593 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
594 break;
595 }
596
597 case TIM_CHANNEL_3:
598 {
599 /* Enable the TIM Output Compare interrupt */
600 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
601 break;
602 }
603
604
605 default:
606 break;
607 }
608
609 /* Enable the TIM Break interrupt */
610 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
611
612 /* Enable the Capture compare channel N */
613 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
614
615 /* Enable the Main Output */
616 __HAL_TIM_MOE_ENABLE(htim);
617
618 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
619 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
620 {
621 __HAL_TIM_ENABLE(htim);
622 }
623
624 /* Return function status */
625 return HAL_OK;
626 }
627
628 /**
629 * @brief Stops the TIM Output Compare signal generation in interrupt mode
630 * on the complementary output.
631 * @param htim TIM Output Compare handle
632 * @param Channel TIM Channel to be disabled
633 * This parameter can be one of the following values:
634 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
635 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
636 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
637 * @retval HAL status
638 */
HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)639 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
640 {
641 uint32_t tmpccer;
642 /* Check the parameters */
643 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
644
645 switch (Channel)
646 {
647 case TIM_CHANNEL_1:
648 {
649 /* Disable the TIM Output Compare interrupt */
650 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
651 break;
652 }
653
654 case TIM_CHANNEL_2:
655 {
656 /* Disable the TIM Output Compare interrupt */
657 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
658 break;
659 }
660
661 case TIM_CHANNEL_3:
662 {
663 /* Disable the TIM Output Compare interrupt */
664 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
665 break;
666 }
667
668 default:
669 break;
670 }
671
672 /* Disable the Capture compare channel N */
673 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
674
675 /* Disable the TIM Break interrupt (only if no more channel is active) */
676 tmpccer = htim->Instance->CCER;
677 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
678 {
679 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
680 }
681
682 /* Disable the Main Output */
683 __HAL_TIM_MOE_DISABLE(htim);
684
685 /* Disable the Peripheral */
686 __HAL_TIM_DISABLE(htim);
687
688 /* Return function status */
689 return HAL_OK;
690 }
691
692 /**
693 * @brief Starts the TIM Output Compare signal generation in DMA mode
694 * on the complementary output.
695 * @param htim TIM Output Compare handle
696 * @param Channel TIM Channel to be enabled
697 * This parameter can be one of the following values:
698 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
699 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
700 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
701 * @param pData The source Buffer address.
702 * @param Length The length of data to be transferred from memory to TIM peripheral
703 * @retval HAL status
704 */
HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)705 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
706 {
707 /* Check the parameters */
708 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
709
710 if ((htim->State == HAL_TIM_STATE_BUSY))
711 {
712 return HAL_BUSY;
713 }
714 else if ((htim->State == HAL_TIM_STATE_READY))
715 {
716 if (((uint32_t)pData == 0U) && (Length > 0U))
717 {
718 return HAL_ERROR;
719 }
720 else
721 {
722 htim->State = HAL_TIM_STATE_BUSY;
723 }
724 }
725 else
726 {
727 /* nothing to do */
728 }
729
730 switch (Channel)
731 {
732 case TIM_CHANNEL_1:
733 {
734 /* Set the DMA Period elapsed callback */
735 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
736
737 /* Set the DMA error callback */
738 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
739
740 /* Enable the DMA channel */
741 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
742 {
743 return HAL_ERROR;
744 }
745 /* Enable the TIM Output Compare DMA request */
746 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
747 break;
748 }
749
750 case TIM_CHANNEL_2:
751 {
752 /* Set the DMA Period elapsed callback */
753 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
754
755 /* Set the DMA error callback */
756 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
757
758 /* Enable the DMA channel */
759 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
760 {
761 return HAL_ERROR;
762 }
763 /* Enable the TIM Output Compare DMA request */
764 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
765 break;
766 }
767
768 case TIM_CHANNEL_3:
769 {
770 /* Set the DMA Period elapsed callback */
771 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
772
773 /* Set the DMA error callback */
774 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
775
776 /* Enable the DMA channel */
777 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
778 {
779 return HAL_ERROR;
780 }
781 /* Enable the TIM Output Compare DMA request */
782 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
783 break;
784 }
785
786 default:
787 break;
788 }
789
790 /* Enable the Capture compare channel N */
791 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
792
793 /* Enable the Main Output */
794 __HAL_TIM_MOE_ENABLE(htim);
795
796 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
797 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
798 {
799 __HAL_TIM_ENABLE(htim);
800 }
801
802 /* Return function status */
803 return HAL_OK;
804 }
805
806 /**
807 * @brief Stops the TIM Output Compare signal generation in DMA mode
808 * on the complementary output.
809 * @param htim TIM Output Compare handle
810 * @param Channel TIM Channel to be disabled
811 * This parameter can be one of the following values:
812 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
813 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
814 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
815 * @retval HAL status
816 */
HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)817 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
818 {
819 /* Check the parameters */
820 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
821
822 switch (Channel)
823 {
824 case TIM_CHANNEL_1:
825 {
826 /* Disable the TIM Output Compare DMA request */
827 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
828 break;
829 }
830
831 case TIM_CHANNEL_2:
832 {
833 /* Disable the TIM Output Compare DMA request */
834 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
835 break;
836 }
837
838 case TIM_CHANNEL_3:
839 {
840 /* Disable the TIM Output Compare DMA request */
841 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
842 break;
843 }
844
845 default:
846 break;
847 }
848
849 /* Disable the Capture compare channel N */
850 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
851
852 /* Disable the Main Output */
853 __HAL_TIM_MOE_DISABLE(htim);
854
855 /* Disable the Peripheral */
856 __HAL_TIM_DISABLE(htim);
857
858 /* Change the htim state */
859 htim->State = HAL_TIM_STATE_READY;
860
861 /* Return function status */
862 return HAL_OK;
863 }
864
865 /**
866 * @}
867 */
868
869 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
870 * @brief Timer Complementary PWM functions
871 *
872 @verbatim
873 ==============================================================================
874 ##### Timer Complementary PWM functions #####
875 ==============================================================================
876 [..]
877 This section provides functions allowing to:
878 (+) Start the Complementary PWM.
879 (+) Stop the Complementary PWM.
880 (+) Start the Complementary PWM and enable interrupts.
881 (+) Stop the Complementary PWM and disable interrupts.
882 (+) Start the Complementary PWM and enable DMA transfers.
883 (+) Stop the Complementary PWM and disable DMA transfers.
884 (+) Start the Complementary Input Capture measurement.
885 (+) Stop the Complementary Input Capture.
886 (+) Start the Complementary Input Capture and enable interrupts.
887 (+) Stop the Complementary Input Capture and disable interrupts.
888 (+) Start the Complementary Input Capture and enable DMA transfers.
889 (+) Stop the Complementary Input Capture and disable DMA transfers.
890 (+) Start the Complementary One Pulse generation.
891 (+) Stop the Complementary One Pulse.
892 (+) Start the Complementary One Pulse and enable interrupts.
893 (+) Stop the Complementary One Pulse and disable interrupts.
894
895 @endverbatim
896 * @{
897 */
898
899 /**
900 * @brief Starts the PWM signal generation on the complementary output.
901 * @param htim TIM handle
902 * @param Channel TIM Channel to be enabled
903 * This parameter can be one of the following values:
904 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
905 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
906 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
907 * @retval HAL status
908 */
HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef * htim,uint32_t Channel)909 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
910 {
911 /* Check the parameters */
912 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
913
914 /* Enable the complementary PWM output */
915 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
916
917 /* Enable the Main Output */
918 __HAL_TIM_MOE_ENABLE(htim);
919
920 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
921 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
922 {
923 __HAL_TIM_ENABLE(htim);
924 }
925
926 /* Return function status */
927 return HAL_OK;
928 }
929
930 /**
931 * @brief Stops the PWM signal generation on the complementary output.
932 * @param htim TIM handle
933 * @param Channel TIM Channel to be disabled
934 * This parameter can be one of the following values:
935 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
936 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
937 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
938 * @retval HAL status
939 */
HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef * htim,uint32_t Channel)940 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
941 {
942 /* Check the parameters */
943 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
944
945 /* Disable the complementary PWM output */
946 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
947
948 /* Disable the Main Output */
949 __HAL_TIM_MOE_DISABLE(htim);
950
951 /* Disable the Peripheral */
952 __HAL_TIM_DISABLE(htim);
953
954 /* Return function status */
955 return HAL_OK;
956 }
957
958 /**
959 * @brief Starts the PWM signal generation in interrupt mode on the
960 * complementary output.
961 * @param htim TIM handle
962 * @param Channel TIM Channel to be disabled
963 * This parameter can be one of the following values:
964 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
965 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
966 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
967 * @retval HAL status
968 */
HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef * htim,uint32_t Channel)969 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
970 {
971 /* Check the parameters */
972 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
973
974 switch (Channel)
975 {
976 case TIM_CHANNEL_1:
977 {
978 /* Enable the TIM Capture/Compare 1 interrupt */
979 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
980 break;
981 }
982
983 case TIM_CHANNEL_2:
984 {
985 /* Enable the TIM Capture/Compare 2 interrupt */
986 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
987 break;
988 }
989
990 case TIM_CHANNEL_3:
991 {
992 /* Enable the TIM Capture/Compare 3 interrupt */
993 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
994 break;
995 }
996
997 default:
998 break;
999 }
1000
1001 /* Enable the TIM Break interrupt */
1002 __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1003
1004 /* Enable the complementary PWM output */
1005 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1006
1007 /* Enable the Main Output */
1008 __HAL_TIM_MOE_ENABLE(htim);
1009
1010 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1011 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
1012 {
1013 __HAL_TIM_ENABLE(htim);
1014 }
1015
1016 /* Return function status */
1017 return HAL_OK;
1018 }
1019
1020 /**
1021 * @brief Stops the PWM signal generation in interrupt mode on the
1022 * complementary output.
1023 * @param htim TIM handle
1024 * @param Channel TIM Channel to be disabled
1025 * This parameter can be one of the following values:
1026 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1027 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1028 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1029 * @retval HAL status
1030 */
HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t Channel)1031 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1032 {
1033 uint32_t tmpccer;
1034
1035 /* Check the parameters */
1036 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1037
1038 switch (Channel)
1039 {
1040 case TIM_CHANNEL_1:
1041 {
1042 /* Disable the TIM Capture/Compare 1 interrupt */
1043 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1044 break;
1045 }
1046
1047 case TIM_CHANNEL_2:
1048 {
1049 /* Disable the TIM Capture/Compare 2 interrupt */
1050 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1051 break;
1052 }
1053
1054 case TIM_CHANNEL_3:
1055 {
1056 /* Disable the TIM Capture/Compare 3 interrupt */
1057 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1058 break;
1059 }
1060
1061 default:
1062 break;
1063 }
1064
1065 /* Disable the complementary PWM output */
1066 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1067
1068 /* Disable the TIM Break interrupt (only if no more channel is active) */
1069 tmpccer = htim->Instance->CCER;
1070 if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1071 {
1072 __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
1073 }
1074
1075 /* Disable the Main Output */
1076 __HAL_TIM_MOE_DISABLE(htim);
1077
1078 /* Disable the Peripheral */
1079 __HAL_TIM_DISABLE(htim);
1080
1081 /* Return function status */
1082 return HAL_OK;
1083 }
1084
1085 /**
1086 * @brief Starts the TIM PWM signal generation in DMA mode on the
1087 * complementary output
1088 * @param htim TIM handle
1089 * @param Channel TIM Channel to be enabled
1090 * This parameter can be one of the following values:
1091 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1092 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1093 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1094 * @param pData The source Buffer address.
1095 * @param Length The length of data to be transferred from memory to TIM peripheral
1096 * @retval HAL status
1097 */
HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef * htim,uint32_t Channel,uint32_t * pData,uint16_t Length)1098 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
1099 {
1100 /* Check the parameters */
1101 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1102
1103 if ((htim->State == HAL_TIM_STATE_BUSY))
1104 {
1105 return HAL_BUSY;
1106 }
1107 else if ((htim->State == HAL_TIM_STATE_READY))
1108 {
1109 if (((uint32_t)pData == 0U) && (Length > 0U))
1110 {
1111 return HAL_ERROR;
1112 }
1113 else
1114 {
1115 htim->State = HAL_TIM_STATE_BUSY;
1116 }
1117 }
1118 else
1119 {
1120 /* nothing to do */
1121 }
1122 switch (Channel)
1123 {
1124 case TIM_CHANNEL_1:
1125 {
1126 /* Set the DMA Period elapsed callback */
1127 htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
1128
1129 /* Set the DMA error callback */
1130 htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
1131
1132 /* Enable the DMA channel */
1133 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
1134 {
1135 return HAL_ERROR;
1136 }
1137 /* Enable the TIM Capture/Compare 1 DMA request */
1138 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1139 break;
1140 }
1141
1142 case TIM_CHANNEL_2:
1143 {
1144 /* Set the DMA Period elapsed callback */
1145 htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
1146
1147 /* Set the DMA error callback */
1148 htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
1149
1150 /* Enable the DMA channel */
1151 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
1152 {
1153 return HAL_ERROR;
1154 }
1155 /* Enable the TIM Capture/Compare 2 DMA request */
1156 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1157 break;
1158 }
1159
1160 case TIM_CHANNEL_3:
1161 {
1162 /* Set the DMA Period elapsed callback */
1163 htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
1164
1165 /* Set the DMA error callback */
1166 htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
1167
1168 /* Enable the DMA channel */
1169 if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
1170 {
1171 return HAL_ERROR;
1172 }
1173 /* Enable the TIM Capture/Compare 3 DMA request */
1174 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1175 break;
1176 }
1177
1178 default:
1179 break;
1180 }
1181
1182 /* Enable the complementary PWM output */
1183 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1184
1185 /* Enable the Main Output */
1186 __HAL_TIM_MOE_ENABLE(htim);
1187
1188 /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1189 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(htim))
1190 {
1191 __HAL_TIM_ENABLE(htim);
1192 }
1193
1194 /* Return function status */
1195 return HAL_OK;
1196 }
1197
1198 /**
1199 * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1200 * output
1201 * @param htim TIM handle
1202 * @param Channel TIM Channel to be disabled
1203 * This parameter can be one of the following values:
1204 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1205 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1206 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1207 * @retval HAL status
1208 */
HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef * htim,uint32_t Channel)1209 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
1210 {
1211 /* Check the parameters */
1212 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1213
1214 switch (Channel)
1215 {
1216 case TIM_CHANNEL_1:
1217 {
1218 /* Disable the TIM Capture/Compare 1 DMA request */
1219 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1220 break;
1221 }
1222
1223 case TIM_CHANNEL_2:
1224 {
1225 /* Disable the TIM Capture/Compare 2 DMA request */
1226 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1227 break;
1228 }
1229
1230 case TIM_CHANNEL_3:
1231 {
1232 /* Disable the TIM Capture/Compare 3 DMA request */
1233 __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1234 break;
1235 }
1236
1237 default:
1238 break;
1239 }
1240
1241 /* Disable the complementary PWM output */
1242 TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1243
1244 /* Disable the Main Output */
1245 __HAL_TIM_MOE_DISABLE(htim);
1246
1247 /* Disable the Peripheral */
1248 __HAL_TIM_DISABLE(htim);
1249
1250 /* Change the htim state */
1251 htim->State = HAL_TIM_STATE_READY;
1252
1253 /* Return function status */
1254 return HAL_OK;
1255 }
1256
1257 /**
1258 * @}
1259 */
1260
1261 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1262 * @brief Timer Complementary One Pulse functions
1263 *
1264 @verbatim
1265 ==============================================================================
1266 ##### Timer Complementary One Pulse functions #####
1267 ==============================================================================
1268 [..]
1269 This section provides functions allowing to:
1270 (+) Start the Complementary One Pulse generation.
1271 (+) Stop the Complementary One Pulse.
1272 (+) Start the Complementary One Pulse and enable interrupts.
1273 (+) Stop the Complementary One Pulse and disable interrupts.
1274
1275 @endverbatim
1276 * @{
1277 */
1278
1279 /**
1280 * @brief Starts the TIM One Pulse signal generation on the complementary
1281 * output.
1282 * @param htim TIM One Pulse handle
1283 * @param OutputChannel TIM Channel to be enabled
1284 * This parameter can be one of the following values:
1285 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1286 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1287 * @retval HAL status
1288 */
HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1289 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1290 {
1291 /* Check the parameters */
1292 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1293
1294 /* Enable the complementary One Pulse output */
1295 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1296
1297 /* Enable the Main Output */
1298 __HAL_TIM_MOE_ENABLE(htim);
1299
1300 /* Return function status */
1301 return HAL_OK;
1302 }
1303
1304 /**
1305 * @brief Stops the TIM One Pulse signal generation on the complementary
1306 * output.
1307 * @param htim TIM One Pulse handle
1308 * @param OutputChannel TIM Channel to be disabled
1309 * This parameter can be one of the following values:
1310 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1311 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1312 * @retval HAL status
1313 */
HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1314 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1315 {
1316
1317 /* Check the parameters */
1318 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1319
1320 /* Disable the complementary One Pulse output */
1321 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1322
1323 /* Disable the Main Output */
1324 __HAL_TIM_MOE_DISABLE(htim);
1325
1326 /* Disable the Peripheral */
1327 __HAL_TIM_DISABLE(htim);
1328
1329 /* Return function status */
1330 return HAL_OK;
1331 }
1332
1333 /**
1334 * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1335 * complementary channel.
1336 * @param htim TIM One Pulse handle
1337 * @param OutputChannel TIM Channel to be enabled
1338 * This parameter can be one of the following values:
1339 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1340 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1341 * @retval HAL status
1342 */
HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1343 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1344 {
1345 /* Check the parameters */
1346 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1347
1348 /* Enable the TIM Capture/Compare 1 interrupt */
1349 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1350
1351 /* Enable the TIM Capture/Compare 2 interrupt */
1352 __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1353
1354 /* Enable the complementary One Pulse output */
1355 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1356
1357 /* Enable the Main Output */
1358 __HAL_TIM_MOE_ENABLE(htim);
1359
1360 /* Return function status */
1361 return HAL_OK;
1362 }
1363
1364 /**
1365 * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1366 * complementary channel.
1367 * @param htim TIM One Pulse handle
1368 * @param OutputChannel TIM Channel to be disabled
1369 * This parameter can be one of the following values:
1370 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1371 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1372 * @retval HAL status
1373 */
HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef * htim,uint32_t OutputChannel)1374 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1375 {
1376 /* Check the parameters */
1377 assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1378
1379 /* Disable the TIM Capture/Compare 1 interrupt */
1380 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1381
1382 /* Disable the TIM Capture/Compare 2 interrupt */
1383 __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1384
1385 /* Disable the complementary One Pulse output */
1386 TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1387
1388 /* Disable the Main Output */
1389 __HAL_TIM_MOE_DISABLE(htim);
1390
1391 /* Disable the Peripheral */
1392 __HAL_TIM_DISABLE(htim);
1393
1394 /* Return function status */
1395 return HAL_OK;
1396 }
1397
1398 /**
1399 * @}
1400 */
1401
1402 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1403 * @brief Peripheral Control functions
1404 *
1405 @verbatim
1406 ==============================================================================
1407 ##### Peripheral Control functions #####
1408 ==============================================================================
1409 [..]
1410 This section provides functions allowing to:
1411 (+) Configure the commutation event in case of use of the Hall sensor interface.
1412 (+) Configure Output channels for OC and PWM mode.
1413
1414 (+) Configure Complementary channels, break features and dead time.
1415 (+) Configure Master synchronization.
1416 (+) Configure timer remapping capabilities.
1417 (+) Enable or disable channel grouping.
1418
1419 @endverbatim
1420 * @{
1421 */
1422
1423 /**
1424 * @brief Configure the TIM commutation event sequence.
1425 * @note This function is mandatory to use the commutation event in order to
1426 * update the configuration at each commutation detection on the TRGI input of the Timer,
1427 * the typical use of this feature is with the use of another Timer(interface Timer)
1428 * configured in Hall sensor interface, this interface Timer will generate the
1429 * commutation at its TRGO output (connected to Timer used in this function) each time
1430 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1431 * @param htim TIM handle
1432 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1433 * This parameter can be one of the following values:
1434 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1435 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1436 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1437 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1438 * @arg TIM_TS_NONE: No trigger is needed
1439 * @param CommutationSource the Commutation Event source
1440 * This parameter can be one of the following values:
1441 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1442 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1443 * @retval HAL status
1444 */
HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1445 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
1446 {
1447 /* Check the parameters */
1448 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1449 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1450
1451 __HAL_LOCK(htim);
1452
1453 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1454 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1455 {
1456 /* Select the Input trigger */
1457 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1458 htim->Instance->SMCR |= InputTrigger;
1459 }
1460
1461 /* Select the Capture Compare preload feature */
1462 htim->Instance->CR2 |= TIM_CR2_CCPC;
1463 /* Select the Commutation event source */
1464 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1465 htim->Instance->CR2 |= CommutationSource;
1466
1467 __HAL_UNLOCK(htim);
1468
1469 return HAL_OK;
1470 }
1471
1472 /**
1473 * @brief Configure the TIM commutation event sequence with interrupt.
1474 * @note This function is mandatory to use the commutation event in order to
1475 * update the configuration at each commutation detection on the TRGI input of the Timer,
1476 * the typical use of this feature is with the use of another Timer(interface Timer)
1477 * configured in Hall sensor interface, this interface Timer will generate the
1478 * commutation at its TRGO output (connected to Timer used in this function) each time
1479 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1480 * @param htim TIM handle
1481 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1482 * This parameter can be one of the following values:
1483 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1484 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1485 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1486 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1487 * @arg TIM_TS_NONE: No trigger is needed
1488 * @param CommutationSource the Commutation Event source
1489 * This parameter can be one of the following values:
1490 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1491 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1492 * @retval HAL status
1493 */
HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1494 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
1495 {
1496 /* Check the parameters */
1497 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1498 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1499
1500 __HAL_LOCK(htim);
1501
1502 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1503 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1504 {
1505 /* Select the Input trigger */
1506 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1507 htim->Instance->SMCR |= InputTrigger;
1508 }
1509
1510 /* Select the Capture Compare preload feature */
1511 htim->Instance->CR2 |= TIM_CR2_CCPC;
1512 /* Select the Commutation event source */
1513 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1514 htim->Instance->CR2 |= CommutationSource;
1515
1516 /* Enable the Commutation Interrupt Request */
1517 __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
1518
1519 __HAL_UNLOCK(htim);
1520
1521 return HAL_OK;
1522 }
1523
1524 /**
1525 * @brief Configure the TIM commutation event sequence with DMA.
1526 * @note This function is mandatory to use the commutation event in order to
1527 * update the configuration at each commutation detection on the TRGI input of the Timer,
1528 * the typical use of this feature is with the use of another Timer(interface Timer)
1529 * configured in Hall sensor interface, this interface Timer will generate the
1530 * commutation at its TRGO output (connected to Timer used in this function) each time
1531 * the TI1 of the Interface Timer detect a commutation at its input TI1.
1532 * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1533 * @param htim TIM handle
1534 * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1535 * This parameter can be one of the following values:
1536 * @arg TIM_TS_ITR0: Internal trigger 0 selected
1537 * @arg TIM_TS_ITR1: Internal trigger 1 selected
1538 * @arg TIM_TS_ITR2: Internal trigger 2 selected
1539 * @arg TIM_TS_ITR3: Internal trigger 3 selected
1540 * @arg TIM_TS_NONE: No trigger is needed
1541 * @param CommutationSource the Commutation Event source
1542 * This parameter can be one of the following values:
1543 * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1544 * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1545 * @retval HAL status
1546 */
HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef * htim,uint32_t InputTrigger,uint32_t CommutationSource)1547 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
1548 {
1549 /* Check the parameters */
1550 assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1551 assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1552
1553 __HAL_LOCK(htim);
1554
1555 if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1556 (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1557 {
1558 /* Select the Input trigger */
1559 htim->Instance->SMCR &= ~TIM_SMCR_TS;
1560 htim->Instance->SMCR |= InputTrigger;
1561 }
1562
1563 /* Select the Capture Compare preload feature */
1564 htim->Instance->CR2 |= TIM_CR2_CCPC;
1565 /* Select the Commutation event source */
1566 htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1567 htim->Instance->CR2 |= CommutationSource;
1568
1569 /* Enable the Commutation DMA Request */
1570 /* Set the DMA Commutation Callback */
1571 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
1572 /* Set the DMA error callback */
1573 htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
1574
1575 /* Enable the Commutation DMA Request */
1576 __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
1577
1578 __HAL_UNLOCK(htim);
1579
1580 return HAL_OK;
1581 }
1582
1583 /**
1584 * @brief Configures the TIM in master mode.
1585 * @param htim TIM handle.
1586 * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1587 * contains the selected trigger output (TRGO) and the Master/Slave
1588 * mode.
1589 * @retval HAL status
1590 */
HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef * htim,TIM_MasterConfigTypeDef * sMasterConfig)1591 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
1592 TIM_MasterConfigTypeDef *sMasterConfig)
1593 {
1594 uint32_t tmpcr2;
1595 uint32_t tmpsmcr;
1596
1597 /* Check the parameters */
1598 assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
1599 assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
1600 assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1601
1602 /* Check input state */
1603 __HAL_LOCK(htim);
1604
1605 /* Change the handler state */
1606 htim->State = HAL_TIM_STATE_BUSY;
1607
1608 /* Get the TIMx CR2 register value */
1609 tmpcr2 = htim->Instance->CR2;
1610
1611 /* Get the TIMx SMCR register value */
1612 tmpsmcr = htim->Instance->SMCR;
1613
1614 /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
1615 if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
1616 {
1617 /* Check the parameters */
1618 assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1619
1620 /* Clear the MMS2 bits */
1621 tmpcr2 &= ~TIM_CR2_MMS2;
1622 /* Select the TRGO2 source*/
1623 tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
1624 }
1625
1626 /* Reset the MMS Bits */
1627 tmpcr2 &= ~TIM_CR2_MMS;
1628 /* Select the TRGO source */
1629 tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1630
1631 /* Reset the MSM Bit */
1632 tmpsmcr &= ~TIM_SMCR_MSM;
1633 /* Set master mode */
1634 tmpsmcr |= sMasterConfig->MasterSlaveMode;
1635
1636 /* Update TIMx CR2 */
1637 htim->Instance->CR2 = tmpcr2;
1638
1639 /* Update TIMx SMCR */
1640 htim->Instance->SMCR = tmpsmcr;
1641
1642 /* Change the htim state */
1643 htim->State = HAL_TIM_STATE_READY;
1644
1645 __HAL_UNLOCK(htim);
1646
1647 return HAL_OK;
1648 }
1649
1650 /**
1651 * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
1652 * and the AOE(automatic output enable).
1653 * @param htim TIM handle
1654 * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
1655 * contains the BDTR Register configuration information for the TIM peripheral.
1656 * @retval HAL status
1657 */
HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef * htim,TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig)1658 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
1659 TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
1660 {
1661 /* Keep this variable initialized to 0 as it is used to configure BDTR register */
1662 uint32_t tmpbdtr = 0U;
1663
1664 /* Check the parameters */
1665 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1666 assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
1667 assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
1668 assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
1669 assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
1670 assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
1671 assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
1672 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
1673 assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
1674
1675 /* Check input state */
1676 __HAL_LOCK(htim);
1677
1678 /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
1679 the OSSI State, the dead time value and the Automatic Output Enable Bit */
1680
1681 /* Set the BDTR bits */
1682 MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
1683 MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
1684 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
1685 MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
1686 MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
1687 MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
1688 MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1689 MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
1690
1691 if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
1692 {
1693 /* Check the parameters */
1694 assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
1695 assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
1696 assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
1697
1698 /* Set the BREAK2 input related BDTR bits */
1699 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
1700 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
1701 MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
1702 }
1703
1704 /* Set TIMx_BDTR */
1705 htim->Instance->BDTR = tmpbdtr;
1706
1707 __HAL_UNLOCK(htim);
1708
1709 return HAL_OK;
1710 }
1711
1712 /**
1713 * @brief Configures the break input source.
1714 * @param htim TIM handle.
1715 * @param BreakInput Break input to configure
1716 * This parameter can be one of the following values:
1717 * @arg TIM_BREAKINPUT_BRK: Timer break input
1718 * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
1719 * @param sBreakInputConfig Break input source configuration
1720 * @retval HAL status
1721 */
HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef * htim,uint32_t BreakInput,TIMEx_BreakInputConfigTypeDef * sBreakInputConfig)1722 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
1723 uint32_t BreakInput,
1724 TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
1725
1726 {
1727 uint32_t tmporx;
1728 uint32_t bkin_enable_mask = 0U;
1729 uint32_t bkin_polarity_mask = 0U;
1730 uint32_t bkin_enable_bitpos = 0U;
1731 uint32_t bkin_polarity_bitpos = 0U;
1732
1733 /* Check the parameters */
1734 assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
1735 assert_param(IS_TIM_BREAKINPUT(BreakInput));
1736 assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
1737 assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
1738 #if defined(DFSDM1_Channel0)
1739 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1740 {
1741 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1742 }
1743 #else
1744 assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
1745 #endif /* DFSDM1_Channel0 */
1746
1747 /* Check input state */
1748 __HAL_LOCK(htim);
1749
1750 switch (sBreakInputConfig->Source)
1751 {
1752 case TIM_BREAKINPUTSOURCE_BKIN:
1753 {
1754 bkin_enable_mask = TIM1_OR2_BKINE;
1755 bkin_enable_bitpos = TIM1_OR2_BKINE_Pos;
1756 bkin_polarity_mask = TIM1_OR2_BKINP;
1757 bkin_polarity_bitpos = TIM1_OR2_BKINP_Pos;
1758 break;
1759 }
1760 case TIM_BREAKINPUTSOURCE_COMP1:
1761 {
1762 bkin_enable_mask = TIM1_OR2_BKCMP1E;
1763 bkin_enable_bitpos = TIM1_OR2_BKCMP1E_Pos;
1764 bkin_polarity_mask = TIM1_OR2_BKCMP1P;
1765 bkin_polarity_bitpos = TIM1_OR2_BKCMP1P_Pos;
1766 break;
1767 }
1768 case TIM_BREAKINPUTSOURCE_COMP2:
1769 {
1770 bkin_enable_mask = TIM1_OR2_BKCMP2E;
1771 bkin_enable_bitpos = TIM1_OR2_BKCMP2E_Pos;
1772 bkin_polarity_mask = TIM1_OR2_BKCMP2P;
1773 bkin_polarity_bitpos = TIM1_OR2_BKCMP2P_Pos;
1774 break;
1775 }
1776 #if defined(DFSDM1_Channel0)
1777 case TIM_BREAKINPUTSOURCE_DFSDM1:
1778 {
1779 bkin_enable_mask = TIM1_OR2_BKDF1BK0E;
1780 bkin_enable_bitpos = 8U;
1781 break;
1782 }
1783 #endif /* DFSDM1_Channel0 */
1784
1785 default:
1786 break;
1787 }
1788
1789 switch (BreakInput)
1790 {
1791 case TIM_BREAKINPUT_BRK:
1792 {
1793 /* Get the TIMx_OR2 register value */
1794 tmporx = htim->Instance->OR2;
1795
1796 /* Enable the break input */
1797 tmporx &= ~bkin_enable_mask;
1798 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1799
1800 /* Set the break input polarity */
1801 #if defined(DFSDM1_Channel0)
1802 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1803 #endif /* DFSDM1_Channel0 */
1804 {
1805 tmporx &= ~bkin_polarity_mask;
1806 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1807 }
1808
1809 /* Set TIMx_OR2 */
1810 htim->Instance->OR2 = tmporx;
1811 break;
1812 }
1813 case TIM_BREAKINPUT_BRK2:
1814 {
1815 /* Get the TIMx_OR3 register value */
1816 tmporx = htim->Instance->OR3;
1817
1818 /* Enable the break input */
1819 tmporx &= ~bkin_enable_mask;
1820 tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1821
1822 /* Set the break input polarity */
1823 #if defined(DFSDM1_Channel0)
1824 if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
1825 #endif /* DFSDM1_Channel0 */
1826 {
1827 tmporx &= ~bkin_polarity_mask;
1828 tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1829 }
1830
1831 /* Set TIMx_OR3 */
1832 htim->Instance->OR3 = tmporx;
1833 break;
1834 }
1835 default:
1836 break;
1837 }
1838
1839 __HAL_UNLOCK(htim);
1840
1841 return HAL_OK;
1842 }
1843
1844 /**
1845 * @brief Configures the TIMx Remapping input capabilities.
1846 * @param htim TIM handle.
1847 * @param Remap specifies the TIM remapping source.
1848 *
1849 @if STM32L422xx
1850 * For TIM1, the parameter is a combination of 2 fields (field1 | field2):
1851 *
1852 * field1 can have the following values:
1853 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
1854 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
1855 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
1856 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
1857 *
1858 * field2 can have the following values:
1859 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
1860 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
1861 *
1862 @endif
1863 @if STM32L486xx
1864 * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4):
1865 *
1866 * field1 can have the following values:
1867 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
1868 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
1869 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
1870 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
1871 *
1872 * field2 can have the following values:
1873 * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog)
1874 * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
1875 * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
1876 * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
1877 *
1878 * field3 can have the following values:
1879 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
1880 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
1881 *
1882 * field4 can have the following values:
1883 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
1884 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
1885 * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant
1886 @endif
1887 @if STM32L443xx
1888 * For TIM1, the parameter is a combination of 3 fields (field1 | field2 | field3):
1889 *
1890 * field1 can have the following values:
1891 * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog)
1892 * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
1893 * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
1894 * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
1895 *
1896 * field2 can have the following values:
1897 * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
1898 * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
1899 *
1900 * field3 can have the following values:
1901 * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
1902 * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
1903 *
1904 * @note When field3 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 values is not significant
1905 *
1906 @endif
1907 @if STM32L486xx
1908 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
1909 *
1910 * field1 can have the following values:
1911 * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO
1912 * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF
1913 *
1914 * field2 can have the following values:
1915 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
1916 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
1917 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
1918 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
1919 *
1920 * field3 can have the following values:
1921 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
1922 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
1923 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
1924 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
1925 @endif
1926 @if STM32L422xx
1927 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
1928 *
1929 * field1 can have the following values:
1930 * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1
1931 * @arg TIM_TIM2_ITR1_USB_SOF: TIM2_ITR1 is connected to USB SOF
1932 *
1933 * field2 can have the following values:
1934 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
1935 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
1936 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
1937 *
1938 * field3 can have the following values:
1939 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
1940 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
1941 *
1942 @endif
1943 @if STM32L443xx
1944 * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3):
1945 *
1946 * field1 can have the following values:
1947 * @arg TIM_TIM2_ITR1_NONE: No internal trigger on TIM2_ITR1
1948 * @arg TIM_TIM2_ITR1_USB_SOF: TIM2_ITR1 is connected to USB SOF
1949 *
1950 * field2 can have the following values:
1951 * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
1952 * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
1953 * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
1954 * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
1955 *
1956 * field3 can have the following values:
1957 * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
1958 * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
1959 * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
1960 * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
1961 *
1962 @endif
1963 @if STM32L486xx
1964 * For TIM3, the parameter is a combination 2 fields(field1 | field2):
1965 *
1966 * field1 can have the following values:
1967 * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
1968 * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
1969 * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
1970 * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
1971 *
1972 * field2 can have the following values:
1973 * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
1974 * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
1975 *
1976 @endif
1977 @if STM32L486xx
1978 * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3):
1979 *
1980 * field1 can have the following values:
1981 * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog)
1982 * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
1983 * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
1984 * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
1985 *
1986 * field2 can have the following values:
1987 * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog)
1988 * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
1989 * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
1990 * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
1991 *
1992 * field3 can have the following values:
1993 * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
1994 * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
1995 *
1996 * field4 can have the following values:
1997 * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
1998 * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
1999 * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant
2000 *
2001 @endif
2002 @if STM32L422xx
2003 * For TIM15, the parameter is a combination of 2 fields (field1 | field2):
2004 *
2005 * field1 can have the following values:
2006 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
2007 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
2008 *
2009 * field2 can have the following values:
2010 * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
2011 * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2012 *
2013 @endif
2014 @if STM32L443xx
2015 * For TIM15, the parameter is a combination of 2 fields (field1 | field2):
2016 *
2017 * field1 can have the following values:
2018 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
2019 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
2020 *
2021 * field2 can have the following values:
2022 * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
2023 * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2024 * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2025 * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2026 *
2027 @endif
2028 @if STM32L486xx
2029 * For TIM15, the parameter is a combination of 2 fields (field1 | field2):
2030 *
2031 * field1 can have the following values:
2032 * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
2033 * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
2034 *
2035 * field2 can have the following values:
2036 * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection
2037 * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2038 * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2039 * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
2040 *
2041 @endif
2042 @if STM32L486xx
2043 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
2044 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
2045 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
2046 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
2047 *
2048 @endif
2049 @if STM32L422xx
2050 * For TIM16, the parameter can have the following values:
2051 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
2052 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
2053 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
2054 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
2055 * @arg TIM_TIM16_TI1_MSI: TIM16 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock)
2056 * @arg TIM_TIM16_TI1_HSE_32: TIM16 TI1 is connected to HSE div 32 (note that HSE div 32 must be selected as RTC clock source)
2057 * @arg TIM_TIM16_TI1_MCO: TIM16 TI1 is connected to MCO
2058 *
2059 @endif
2060 @if STM32L443xx
2061 * For TIM16, the parameter can have the following values:
2062 * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
2063 * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
2064 * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
2065 * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
2066 * @arg TIM_TIM16_TI1_MSI: TIM16 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock)
2067 * @arg TIM_TIM16_TI1_HSE_32: TIM16 TI1 is connected to HSE div 32 (note that HSE div 32 must be selected as RTC clock source)
2068 * @arg TIM_TIM16_TI1_MCO: TIM16 TI1 is connected to MCO
2069 *
2070 @endif
2071 @if STM32L486xx
2072 * For TIM17, the parameter can have the following values:
2073 * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
2074 * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI (contraints: MSI clock < 1/4 TIM APB clock)
2075 * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32
2076 * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO
2077 @endif
2078 *
2079 * @retval HAL status
2080 */
HAL_TIMEx_RemapConfig(TIM_HandleTypeDef * htim,uint32_t Remap)2081 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
2082 {
2083 uint32_t tmpor1 = 0U;
2084 uint32_t tmpor2 = 0U;
2085
2086 __HAL_LOCK(htim);
2087
2088 /* Check parameters */
2089 assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
2090 assert_param(IS_TIM_REMAP(Remap));
2091
2092 /* Set ETR_SEL bit field (if required) */
2093 if (IS_TIM_ETRSEL_INSTANCE(htim->Instance))
2094 {
2095 tmpor2 = htim->Instance->OR2;
2096 tmpor2 &= ~TIM1_OR2_ETRSEL_Msk;
2097 tmpor2 |= (Remap & TIM1_OR2_ETRSEL_Msk);
2098
2099 /* Set TIMx_OR2 */
2100 htim->Instance->OR2 = tmpor2;
2101 }
2102
2103 /* Set other remapping capabilities */
2104 tmpor1 = Remap;
2105 tmpor1 &= ~TIM1_OR2_ETRSEL_Msk;
2106
2107 /* Set TIMx_OR1 */
2108 htim->Instance->OR1 = tmpor1;
2109
2110 __HAL_UNLOCK(htim);
2111
2112 return HAL_OK;
2113 }
2114
2115 /**
2116 * @brief Group channel 5 and channel 1, 2 or 3
2117 * @param htim TIM handle.
2118 * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2119 * This parameter can be any combination of the following values:
2120 * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
2121 * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
2122 * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
2123 * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
2124 * @retval HAL status
2125 */
HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef * htim,uint32_t Channels)2126 HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
2127 {
2128 /* Check parameters */
2129 assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
2130 assert_param(IS_TIM_GROUPCH5(Channels));
2131
2132 /* Process Locked */
2133 __HAL_LOCK(htim);
2134
2135 htim->State = HAL_TIM_STATE_BUSY;
2136
2137 /* Clear GC5Cx bit fields */
2138 htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
2139
2140 /* Set GC5Cx bit fields */
2141 htim->Instance->CCR5 |= Channels;
2142
2143 /* Change the htim state */
2144 htim->State = HAL_TIM_STATE_READY;
2145
2146 __HAL_UNLOCK(htim);
2147
2148 return HAL_OK;
2149 }
2150
2151 /**
2152 * @}
2153 */
2154
2155 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2156 * @brief Extended Callbacks functions
2157 *
2158 @verbatim
2159 ==============================================================================
2160 ##### Extended Callbacks functions #####
2161 ==============================================================================
2162 [..]
2163 This section provides Extended TIM callback functions:
2164 (+) Timer Commutation callback
2165 (+) Timer Break callback
2166
2167 @endverbatim
2168 * @{
2169 */
2170
2171 /**
2172 * @brief Hall commutation changed callback in non-blocking mode
2173 * @param htim TIM handle
2174 * @retval None
2175 */
HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef * htim)2176 __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim)
2177 {
2178 /* Prevent unused argument(s) compilation warning */
2179 UNUSED(htim);
2180
2181 /* NOTE : This function should not be modified, when the callback is needed,
2182 the HAL_TIMEx_CommutationCallback could be implemented in the user file
2183 */
2184 }
2185
2186 /**
2187 * @brief Hall Break detection callback in non-blocking mode
2188 * @param htim TIM handle
2189 * @retval None
2190 */
HAL_TIMEx_BreakCallback(TIM_HandleTypeDef * htim)2191 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2192 {
2193 /* Prevent unused argument(s) compilation warning */
2194 UNUSED(htim);
2195
2196 /* NOTE : This function should not be modified, when the callback is needed,
2197 the HAL_TIMEx_BreakCallback could be implemented in the user file
2198 */
2199 }
2200
2201 /**
2202 * @brief Hall Break2 detection callback in non blocking mode
2203 * @param htim: TIM handle
2204 * @retval None
2205 */
HAL_TIMEx_Break2Callback(TIM_HandleTypeDef * htim)2206 __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
2207 {
2208 /* Prevent unused argument(s) compilation warning */
2209 UNUSED(htim);
2210
2211 /* NOTE : This function Should not be modified, when the callback is needed,
2212 the HAL_TIMEx_Break2Callback could be implemented in the user file
2213 */
2214 }
2215 /**
2216 * @}
2217 */
2218
2219 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2220 * @brief Extended Peripheral State functions
2221 *
2222 @verbatim
2223 ==============================================================================
2224 ##### Extended Peripheral State functions #####
2225 ==============================================================================
2226 [..]
2227 This subsection permits to get in run-time the status of the peripheral
2228 and the data flow.
2229
2230 @endverbatim
2231 * @{
2232 */
2233
2234 /**
2235 * @brief Return the TIM Hall Sensor interface handle state.
2236 * @param htim TIM Hall Sensor handle
2237 * @retval HAL state
2238 */
HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef * htim)2239 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
2240 {
2241 return htim->State;
2242 }
2243
2244 /**
2245 * @}
2246 */
2247
2248 /**
2249 * @}
2250 */
2251
2252 /* Private functions ---------------------------------------------------------*/
2253 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
2254 * @{
2255 */
2256
2257 /**
2258 * @brief TIM DMA Commutation callback.
2259 * @param hdma pointer to DMA handle.
2260 * @retval None
2261 */
TIMEx_DMACommutationCplt(DMA_HandleTypeDef * hdma)2262 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2263 {
2264 TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2265
2266 /* Change the htim state */
2267 htim->State = HAL_TIM_STATE_READY;
2268
2269 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2270 htim->CommutationCallback(htim);
2271 #else
2272 HAL_TIMEx_CommutationCallback(htim);
2273 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2274 }
2275
2276 /**
2277 * @brief Enables or disables the TIM Capture Compare Channel xN.
2278 * @param TIMx to select the TIM peripheral
2279 * @param Channel specifies the TIM Channel
2280 * This parameter can be one of the following values:
2281 * @arg TIM_CHANNEL_1: TIM Channel 1
2282 * @arg TIM_CHANNEL_2: TIM Channel 2
2283 * @arg TIM_CHANNEL_3: TIM Channel 3
2284 * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2285 * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2286 * @retval None
2287 */
TIM_CCxNChannelCmd(TIM_TypeDef * TIMx,uint32_t Channel,uint32_t ChannelNState)2288 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2289 {
2290 uint32_t tmp;
2291
2292 tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2293
2294 /* Reset the CCxNE Bit */
2295 TIMx->CCER &= ~tmp;
2296
2297 /* Set or reset the CCxNE Bit */
2298 TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2299 }
2300 /**
2301 * @}
2302 */
2303
2304 #endif /* HAL_TIM_MODULE_ENABLED */
2305 /**
2306 * @}
2307 */
2308
2309 /**
2310 * @}
2311 */
2312
2313 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2314
