1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_sd.h 4 * @author MCD Application Team 5 * @brief Header file of SD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef STM32L4xx_HAL_SD_H 38 #define STM32L4xx_HAL_SD_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #if defined(SDMMC1) 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32l4xx_ll_sdmmc.h" 48 49 /** @addtogroup STM32L4xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup SD 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup SD_Exported_Types SD Exported Types 59 * @{ 60 */ 61 62 /** @defgroup SD_Exported_Types_Group1 SD State enumeration structure 63 * @{ 64 */ 65 typedef enum 66 { 67 HAL_SD_STATE_RESET = ((uint32_t)0x00000000U), /*!< SD not yet initialized or disabled */ 68 HAL_SD_STATE_READY = ((uint32_t)0x00000001U), /*!< SD initialized and ready for use */ 69 HAL_SD_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< SD Timeout state */ 70 HAL_SD_STATE_BUSY = ((uint32_t)0x00000003U), /*!< SD process ongoing */ 71 HAL_SD_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< SD Programming State */ 72 HAL_SD_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< SD Receiving State */ 73 HAL_SD_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< SD Transfert State */ 74 HAL_SD_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< SD is in error state */ 75 }HAL_SD_StateTypeDef; 76 /** 77 * @} 78 */ 79 80 /** @defgroup SD_Exported_Types_Group2 SD Card State enumeration structure 81 * @{ 82 */ 83 typedef enum 84 { 85 HAL_SD_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */ 86 HAL_SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */ 87 HAL_SD_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */ 88 HAL_SD_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */ 89 HAL_SD_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */ 90 HAL_SD_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */ 91 HAL_SD_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */ 92 HAL_SD_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */ 93 HAL_SD_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card response Error */ 94 }HAL_SD_CardStateTypedef; 95 /** 96 * @} 97 */ 98 99 /** @defgroup SD_Exported_Types_Group3 SD Handle Structure definition 100 * @{ 101 */ 102 #define SD_InitTypeDef SDMMC_InitTypeDef 103 #define SD_TypeDef SDMMC_TypeDef 104 105 /** 106 * @brief SD Card Information Structure definition 107 */ 108 typedef struct 109 { 110 uint32_t CardType; /*!< Specifies the card Type */ 111 112 uint32_t CardVersion; /*!< Specifies the card version */ 113 114 uint32_t Class; /*!< Specifies the class of the card class */ 115 116 uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ 117 118 uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ 119 120 uint32_t BlockSize; /*!< Specifies one block size in bytes */ 121 122 uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ 123 124 uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ 125 126 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 127 128 uint32_t CardSpeed; /*!< Specifies the card Speed */ 129 130 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 131 }HAL_SD_CardInfoTypeDef; 132 133 /** 134 * @brief SD handle Structure definition 135 */ 136 typedef struct __SD_HandleTypeDef 137 { 138 SD_TypeDef *Instance; /*!< SD registers base address */ 139 140 SD_InitTypeDef Init; /*!< SD required parameters */ 141 142 HAL_LockTypeDef Lock; /*!< SD locking object */ 143 144 uint8_t *pTxBuffPtr; /*!< Pointer to SD Tx transfer Buffer */ 145 146 uint32_t TxXferSize; /*!< SD Tx Transfer size */ 147 148 uint8_t *pRxBuffPtr; /*!< Pointer to SD Rx transfer Buffer */ 149 150 uint32_t RxXferSize; /*!< SD Rx Transfer size */ 151 152 __IO uint32_t Context; /*!< SD transfer context */ 153 154 __IO HAL_SD_StateTypeDef State; /*!< SD card State */ 155 156 __IO uint32_t ErrorCode; /*!< SD Card Error codes */ 157 158 #if !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 159 160 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ 161 162 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ 163 164 #endif /* !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 165 HAL_SD_CardInfoTypeDef SdCard; /*!< SD Card information */ 166 167 uint32_t CSD[4]; /*!< SD card specific data table */ 168 169 uint32_t CID[4]; /*!< SD card identification number table */ 170 171 #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 172 void (* TxCpltCallback) (struct __SD_HandleTypeDef *hsd); 173 void (* RxCpltCallback) (struct __SD_HandleTypeDef *hsd); 174 void (* ErrorCallback) (struct __SD_HandleTypeDef *hsd); 175 void (* AbortCpltCallback) (struct __SD_HandleTypeDef *hsd); 176 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 177 void (* Read_DMADblBuf0CpltCallback) (struct __SD_HandleTypeDef *hsd); 178 void (* Read_DMADblBuf1CpltCallback) (struct __SD_HandleTypeDef *hsd); 179 void (* Write_DMADblBuf0CpltCallback) (struct __SD_HandleTypeDef *hsd); 180 void (* Write_DMADblBuf1CpltCallback) (struct __SD_HandleTypeDef *hsd); 181 182 void (* DriveTransceiver_1_8V_Callback) (FlagStatus status); 183 #endif 184 185 void (* MspInitCallback) (struct __SD_HandleTypeDef *hsd); 186 void (* MspDeInitCallback) (struct __SD_HandleTypeDef *hsd); 187 #endif 188 }SD_HandleTypeDef; 189 190 /** 191 * @} 192 */ 193 194 /** @defgroup SD_Exported_Types_Group4 Card Specific Data: CSD Register 195 * @{ 196 */ 197 typedef struct 198 { 199 __IO uint8_t CSDStruct; /*!< CSD structure */ 200 __IO uint8_t SysSpecVersion; /*!< System specification version */ 201 __IO uint8_t Reserved1; /*!< Reserved */ 202 __IO uint8_t TAAC; /*!< Data read access time 1 */ 203 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ 204 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ 205 __IO uint16_t CardComdClasses; /*!< Card command classes */ 206 __IO uint8_t RdBlockLen; /*!< Max. read data block length */ 207 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ 208 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ 209 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ 210 __IO uint8_t DSRImpl; /*!< DSR implemented */ 211 __IO uint8_t Reserved2; /*!< Reserved */ 212 __IO uint32_t DeviceSize; /*!< Device Size */ 213 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ 214 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ 215 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ 216 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ 217 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ 218 __IO uint8_t EraseGrSize; /*!< Erase group size */ 219 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ 220 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ 221 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ 222 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ 223 __IO uint8_t WrSpeedFact; /*!< Write speed factor */ 224 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ 225 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ 226 __IO uint8_t Reserved3; /*!< Reserved */ 227 __IO uint8_t ContentProtectAppli; /*!< Content protection application */ 228 __IO uint8_t FileFormatGroup; /*!< File format group */ 229 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ 230 __IO uint8_t PermWrProtect; /*!< Permanent write protection */ 231 __IO uint8_t TempWrProtect; /*!< Temporary write protection */ 232 __IO uint8_t FileFormat; /*!< File format */ 233 __IO uint8_t ECC; /*!< ECC code */ 234 __IO uint8_t CSD_CRC; /*!< CSD CRC */ 235 __IO uint8_t Reserved4; /*!< Always 1 */ 236 237 }HAL_SD_CardCSDTypedef; 238 /** 239 * @} 240 */ 241 242 /** @defgroup SD_Exported_Types_Group5 Card Identification Data: CID Register 243 * @{ 244 */ 245 typedef struct 246 { 247 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ 248 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ 249 __IO uint32_t ProdName1; /*!< Product Name part1 */ 250 __IO uint8_t ProdName2; /*!< Product Name part2 */ 251 __IO uint8_t ProdRev; /*!< Product Revision */ 252 __IO uint32_t ProdSN; /*!< Product Serial Number */ 253 __IO uint8_t Reserved1; /*!< Reserved1 */ 254 __IO uint16_t ManufactDate; /*!< Manufacturing Date */ 255 __IO uint8_t CID_CRC; /*!< CID CRC */ 256 __IO uint8_t Reserved2; /*!< Always 1 */ 257 258 }HAL_SD_CardCIDTypedef; 259 /** 260 * @} 261 */ 262 263 /** @defgroup SD_Exported_Types_Group6 SD Card Status returned by ACMD13 264 * @{ 265 */ 266 typedef struct 267 { 268 __IO uint8_t DataBusWidth; /*!< Shows the currently defined data bus width */ 269 __IO uint8_t SecuredMode; /*!< Card is in secured mode of operation */ 270 __IO uint16_t CardType; /*!< Carries information about card type */ 271 __IO uint32_t ProtectedAreaSize; /*!< Carries information about the capacity of protected area */ 272 __IO uint8_t SpeedClass; /*!< Carries information about the speed class of the card */ 273 __IO uint8_t PerformanceMove; /*!< Carries information about the card's performance move */ 274 __IO uint8_t AllocationUnitSize; /*!< Carries information about the card's allocation unit size */ 275 __IO uint16_t EraseSize; /*!< Determines the number of AUs to be erased in one operation */ 276 __IO uint8_t EraseTimeout; /*!< Determines the timeout for any number of AU erase */ 277 __IO uint8_t EraseOffset; /*!< Carries information about the erase offset */ 278 279 }HAL_SD_CardStatusTypedef; 280 /** 281 * @} 282 */ 283 284 #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 285 /** @defgroup SD_Exported_Types_Group7 SD Callback ID enumeration definition 286 * @{ 287 */ 288 typedef enum 289 { 290 HAL_SD_TX_CPLT_CB_ID = 0x00U, /*!< SD Tx Complete Callback ID */ 291 HAL_SD_RX_CPLT_CB_ID = 0x01U, /*!< SD Rx Complete Callback ID */ 292 HAL_SD_ERROR_CB_ID = 0x02U, /*!< SD Error Callback ID */ 293 HAL_SD_ABORT_CB_ID = 0x03U, /*!< SD Abort Callback ID */ 294 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 295 HAL_SD_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< SD Rx DMA Double Buffer 0 Complete Callback ID */ 296 HAL_SD_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< SD Rx DMA Double Buffer 1 Complete Callback ID */ 297 HAL_SD_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< SD Tx DMA Double Buffer 0 Complete Callback ID */ 298 HAL_SD_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< SD Tx DMA Double Buffer 1 Complete Callback ID */ 299 #endif 300 301 HAL_SD_MSP_INIT_CB_ID = 0x10U, /*!< SD MspInit Callback ID */ 302 HAL_SD_MSP_DEINIT_CB_ID = 0x11U /*!< SD MspDeInit Callback ID */ 303 }HAL_SD_CallbackIDTypeDef; 304 /** 305 * @} 306 */ 307 308 /** @defgroup SD_Exported_Types_Group8 SD Callback pointer definition 309 * @{ 310 */ 311 typedef void (*pSD_CallbackTypeDef) (SD_HandleTypeDef *hsd); 312 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 313 typedef void (*pSD_TransceiverCallbackTypeDef)(FlagStatus status); 314 #endif 315 /** 316 * @} 317 */ 318 #endif 319 /** 320 * @} 321 */ 322 323 /* Exported constants --------------------------------------------------------*/ 324 /** @defgroup SD_Exported_Constants Exported Constants 325 * @{ 326 */ 327 328 #define BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ 329 330 /** @defgroup SD_Exported_Constansts_Group1 SD Error status enumeration Structure definition 331 * @{ 332 */ 333 #define HAL_SD_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ 334 #define HAL_SD_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ 335 #define HAL_SD_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ 336 #define HAL_SD_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ 337 #define HAL_SD_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ 338 #define HAL_SD_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ 339 #define HAL_SD_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ 340 #define HAL_SD_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ 341 #define HAL_SD_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the 342 number of transferred bytes does not match the block length */ 343 #define HAL_SD_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ 344 #define HAL_SD_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ 345 #define HAL_SD_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ 346 #define HAL_SD_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock 347 command or if there was an attempt to access a locked card */ 348 #define HAL_SD_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ 349 #define HAL_SD_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ 350 #define HAL_SD_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ 351 #define HAL_SD_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ 352 #define HAL_SD_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ 353 #define HAL_SD_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ 354 #define HAL_SD_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ 355 #define HAL_SD_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ 356 #define HAL_SD_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ 357 #define HAL_SD_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ 358 #define HAL_SD_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out 359 of erase sequence command was received */ 360 #define HAL_SD_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ 361 #define HAL_SD_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ 362 #define HAL_SD_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ 363 #define HAL_SD_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ 364 #define HAL_SD_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ 365 #define HAL_SD_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ 366 #define HAL_SD_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ 367 #define HAL_SD_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ 368 #define HAL_SD_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ 369 370 #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 371 #define HAL_SD_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ 372 #endif 373 374 /** 375 * @} 376 */ 377 378 /** @defgroup SD_Exported_Constansts_Group2 SD context enumeration 379 * @{ 380 */ 381 #define SD_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ 382 #define SD_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ 383 #define SD_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ 384 #define SD_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ 385 #define SD_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ 386 #define SD_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ 387 #define SD_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ 388 389 /** 390 * @} 391 */ 392 393 /** @defgroup SD_Exported_Constansts_Group3 SD Supported Memory Cards 394 * @{ 395 */ 396 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 397 #define CARD_NORMAL_SPEED ((uint32_t)0x00000000U) /*!< Normal Speed Card <12.5Mo/s , Spec Version 1.01 */ 398 #define CARD_HIGH_SPEED ((uint32_t)0x00000100U) /*!< High Speed Card <25Mo/s , Spec version 2.00 */ 399 #define CARD_ULTRA_HIGH_SPEED ((uint32_t)0x00000200U) /*!< UHS-I SD Card <50Mo/s for SDR50, DDR5 Cards 400 and <104Mo/s for SDR104, Spec version 3.01 */ 401 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 402 403 #define CARD_SDSC ((uint32_t)0x00000000U) 404 #define CARD_SDHC_SDXC ((uint32_t)0x00000001U) 405 #define CARD_SECURED ((uint32_t)0x00000003U) 406 407 /** 408 * @} 409 */ 410 411 /** @defgroup SD_Exported_Constansts_Group4 SD Supported Version 412 * @{ 413 */ 414 #define CARD_V1_X ((uint32_t)0x00000000U) 415 #define CARD_V2_X ((uint32_t)0x00000001U) 416 /** 417 * @} 418 */ 419 420 /** 421 * @} 422 */ 423 424 /* Exported macro ------------------------------------------------------------*/ 425 /** @defgroup SD_Exported_macros SD Exported Macros 426 * @brief macros to handle interrupts and specific clock configurations 427 * @{ 428 */ 429 /** @brief Reset SD handle state. 430 * @param __HANDLE__ : SD handle. 431 * @retval None 432 */ 433 #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 434 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) do { \ 435 (__HANDLE__)->State = HAL_SD_STATE_RESET; \ 436 (__HANDLE__)->MspInitCallback = NULL; \ 437 (__HANDLE__)->MspDeInitCallback = NULL; \ 438 } while(0) 439 #else 440 #define __HAL_SD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SD_STATE_RESET) 441 #endif 442 443 #if !defined(STM32L4R5xx) && !defined(STM32L4R7xx) && !defined(STM32L4R9xx) && !defined(STM32L4S5xx) && !defined(STM32L4S7xx) && !defined(STM32L4S9xx) 444 /** 445 * @brief Enable the SD device. 446 * @retval None 447 */ 448 #define __HAL_SD_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) 449 450 /** 451 * @brief Disable the SD device. 452 * @retval None 453 */ 454 #define __HAL_SD_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) 455 456 /** 457 * @brief Enable the SDMMC DMA transfer. 458 * @retval None 459 */ 460 #define __HAL_SD_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) 461 462 /** 463 * @brief Disable the SDMMC DMA transfer. 464 * @retval None 465 */ 466 #define __HAL_SD_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) 467 #endif /* !STM32L4R5xx && !STM32L4R7xx && !STM32L4R9xx && !STM32L4S5xx && !STM32L4S7xx && !STM32L4S9xx */ 468 469 /** 470 * @brief Enable the SD device interrupt. 471 * @param __HANDLE__: SD Handle 472 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. 473 * This parameter can be one or a combination of the following values: 474 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 475 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 476 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 477 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 478 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 479 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 480 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 481 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 482 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 483 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 484 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 485 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 486 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 487 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 488 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 489 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 490 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 491 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 492 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 493 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 494 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 495 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 496 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 497 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 498 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 499 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt 500 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 501 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 502 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 503 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 504 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 505 * @retval None 506 */ 507 #define __HAL_SD_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 508 509 /** 510 * @brief Disable the SD device interrupt. 511 * @param __HANDLE__: SD Handle 512 * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. 513 * This parameter can be one or a combination of the following values: 514 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 515 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 516 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 517 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 518 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 519 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 520 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 521 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 522 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 523 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 524 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 525 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 526 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 527 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 528 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 529 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 530 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 531 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 532 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 533 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 534 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 535 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 536 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 537 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 538 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 539 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt 540 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 541 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 542 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 543 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 544 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 545 * @retval None 546 */ 547 #define __HAL_SD_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 548 549 /** 550 * @brief Check whether the specified SD flag is set or not. 551 * @param __HANDLE__: SD Handle 552 * @param __FLAG__: specifies the flag to check. 553 * This parameter can be one of the following values: 554 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 555 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 556 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 557 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 558 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 559 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 560 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 561 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 562 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 563 * @arg SDMMC_FLAG_CMDACT: Command transfer in progress 564 * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty 565 * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full 566 * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full 567 * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full 568 * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty 569 * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty 570 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 571 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 572 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 573 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 574 * @arg SDMMC_FLAG_CPSMACT: Command path state machine active 575 * @arg SDMMC_FLAG_DPSMACT: Data path state machine active 576 * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 577 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 578 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 579 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 580 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 581 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 582 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 583 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 584 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) 585 * @arg SDMMC_FLAG_TXACT: Data transmit in progress 586 * @arg SDMMC_FLAG_RXACT: Data receive in progress 587 * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO 588 * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO 589 * @retval The new state of SD FLAG (SET or RESET). 590 */ 591 #define __HAL_SD_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) 592 593 /** 594 * @brief Clear the SD's pending flags. 595 * @param __HANDLE__: SD Handle 596 * @param __FLAG__: specifies the flag to clear. 597 * This parameter can be one or a combination of the following values: 598 * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) 599 * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) 600 * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout 601 * @arg SDMMC_FLAG_DTIMEOUT: Data timeout 602 * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error 603 * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error 604 * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) 605 * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) 606 * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) 607 * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received 608 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) 609 * @arg SDMMC_FLAG_DHOLD: Data transfer Hold 610 * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 611 * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected 612 * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received 613 * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout 614 * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion 615 * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure 616 * @arg SDMMC_FLAG_IDMATE: IDMA transfer error 617 * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete 618 * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) 619 * @retval None 620 */ 621 #define __HAL_SD_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) 622 623 /** 624 * @brief Check whether the specified SD interrupt has occurred or not. 625 * @param __HANDLE__: SD Handle 626 * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. 627 * This parameter can be one of the following values: 628 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 629 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 630 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 631 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 632 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 633 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 634 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 635 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 636 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 637 * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt 638 * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt 639 * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt 640 * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt 641 * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt 642 * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt 643 * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt 644 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 645 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 646 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 647 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 648 * @arg SDMMC_IT_DPSMACT: Data path state machine active interrupt 649 * @arg SDMMC_IT_CPSMACT: Command path state machine active interrupt 650 * @arg SDMMC_IT_BUSYD0: Inverted value of SDMMC_D0 line (Busy) 651 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 652 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 653 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 654 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 655 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 656 * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt 657 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 658 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt 659 * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt 660 * @arg SDMMC_IT_RXACT: Data receive in progress interrupt 661 * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt 662 * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt 663 * @retval The new state of SD IT (SET or RESET). 664 */ 665 #define __HAL_SD_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 666 667 /** 668 * @brief Clear the SD's interrupt pending bits. 669 * @param __HANDLE__: SD Handle 670 * @param __INTERRUPT__: specifies the interrupt pending bit to clear. 671 * This parameter can be one or a combination of the following values: 672 * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt 673 * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt 674 * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt 675 * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt 676 * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt 677 * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt 678 * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt 679 * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt 680 * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt 681 * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt 682 * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt 683 * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt 684 * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt 685 * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt 686 * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt 687 * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt 688 * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt 689 * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt 690 * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt 691 * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt 692 * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt 693 * @retval None 694 */ 695 #define __HAL_SD_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) 696 697 /** 698 * @} 699 */ 700 701 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 702 /* Include SD HAL Extension module */ 703 #include "stm32l4xx_hal_sd_ex.h" 704 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 705 /* Exported functions --------------------------------------------------------*/ 706 /** @defgroup SD_Exported_Functions SD Exported Functions 707 * @{ 708 */ 709 710 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions 711 * @{ 712 */ 713 HAL_StatusTypeDef HAL_SD_Init (SD_HandleTypeDef *hsd); 714 HAL_StatusTypeDef HAL_SD_InitCard (SD_HandleTypeDef *hsd); 715 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); 716 void HAL_SD_MspInit (SD_HandleTypeDef *hsd); 717 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); 718 /** 719 * @} 720 */ 721 722 /** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions 723 * @{ 724 */ 725 /* Blocking mode: Polling */ 726 HAL_StatusTypeDef HAL_SD_ReadBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 727 HAL_StatusTypeDef HAL_SD_WriteBlocks (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); 728 HAL_StatusTypeDef HAL_SD_Erase (SD_HandleTypeDef *hsd, uint32_t BlockStartAdd, uint32_t BlockEndAdd); 729 /* Non-Blocking mode: IT */ 730 HAL_StatusTypeDef HAL_SD_ReadBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 731 HAL_StatusTypeDef HAL_SD_WriteBlocks_IT (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 732 /* Non-Blocking mode: DMA */ 733 HAL_StatusTypeDef HAL_SD_ReadBlocks_DMA (SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 734 HAL_StatusTypeDef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); 735 736 void HAL_SD_IRQHandler (SD_HandleTypeDef *hsd); 737 738 /* Callback in non blocking modes (DMA) */ 739 void HAL_SD_TxCpltCallback (SD_HandleTypeDef *hsd); 740 void HAL_SD_RxCpltCallback (SD_HandleTypeDef *hsd); 741 void HAL_SD_ErrorCallback (SD_HandleTypeDef *hsd); 742 void HAL_SD_AbortCallback (SD_HandleTypeDef *hsd); 743 744 #if (USE_HAL_SD_REGISTER_CALLBACKS == 1) 745 /* SD callback registering/unregistering */ 746 HAL_StatusTypeDef HAL_SD_RegisterCallback (SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID, pSD_CallbackTypeDef pCallback); 747 HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef CallbackID); 748 749 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 750 HAL_StatusTypeDef HAL_SD_RegisterTransceiverCallback (SD_HandleTypeDef *hsd, pSD_TransceiverCallbackTypeDef pCallback); 751 HAL_StatusTypeDef HAL_SD_UnRegisterTransceiverCallback(SD_HandleTypeDef *hsd); 752 #endif 753 #endif 754 755 /** 756 * @} 757 */ 758 759 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions 760 * @{ 761 */ 762 HAL_StatusTypeDef HAL_SD_ConfigWideBusOperation(SD_HandleTypeDef *hsd, uint32_t WideMode); 763 /** 764 * @} 765 */ 766 767 /** @defgroup SD_Exported_Functions_Group4 SD card related functions 768 * @{ 769 */ 770 HAL_StatusTypeDef HAL_SD_SendSDStatus (SD_HandleTypeDef *hsd, uint32_t *pSDstatus); 771 HAL_SD_CardStateTypedef HAL_SD_GetCardState (SD_HandleTypeDef *hsd); 772 HAL_StatusTypeDef HAL_SD_GetCardCID (SD_HandleTypeDef *hsd, HAL_SD_CardCIDTypedef *pCID); 773 HAL_StatusTypeDef HAL_SD_GetCardCSD (SD_HandleTypeDef *hsd, HAL_SD_CardCSDTypedef *pCSD); 774 HAL_StatusTypeDef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pStatus); 775 HAL_StatusTypeDef HAL_SD_GetCardInfo (SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypeDef *pCardInfo); 776 /** 777 * @} 778 */ 779 780 /** @defgroup SD_Exported_Functions_Group5 Peripheral State and Errors functions 781 * @{ 782 */ 783 HAL_SD_StateTypeDef HAL_SD_GetState(SD_HandleTypeDef *hsd); 784 uint32_t HAL_SD_GetError(SD_HandleTypeDef *hsd); 785 /** 786 * @} 787 */ 788 789 /** @defgroup SD_Exported_Functions_Group6 Perioheral Abort management 790 * @{ 791 */ 792 HAL_StatusTypeDef HAL_SD_Abort (SD_HandleTypeDef *hsd); 793 HAL_StatusTypeDef HAL_SD_Abort_IT(SD_HandleTypeDef *hsd); 794 /** 795 * @} 796 */ 797 798 /* Private types -------------------------------------------------------------*/ 799 /** @defgroup SD_Private_Types SD Private Types 800 * @{ 801 */ 802 803 /** 804 * @} 805 */ 806 807 /* Private defines -----------------------------------------------------------*/ 808 /** @defgroup SD_Private_Defines SD Private Defines 809 * @{ 810 */ 811 812 /** 813 * @} 814 */ 815 816 /* Private variables ---------------------------------------------------------*/ 817 /** @defgroup SD_Private_Variables SD Private Variables 818 * @{ 819 */ 820 821 /** 822 * @} 823 */ 824 825 /* Private constants ---------------------------------------------------------*/ 826 /** @defgroup SD_Private_Constants SD Private Constants 827 * @{ 828 */ 829 830 /** 831 * @} 832 */ 833 834 /* Private macros ------------------------------------------------------------*/ 835 /** @defgroup SD_Private_Macros SD Private Macros 836 * @{ 837 */ 838 839 /** 840 * @} 841 */ 842 843 /* Private functions prototypes ----------------------------------------------*/ 844 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes 845 * @{ 846 */ 847 848 /** 849 * @} 850 */ 851 852 /* Private functions ---------------------------------------------------------*/ 853 /** @defgroup SD_Private_Functions SD Private Functions 854 * @{ 855 */ 856 857 /** 858 * @} 859 */ 860 861 862 /** 863 * @} 864 */ 865 866 /** 867 * @} 868 */ 869 870 /** 871 * @} 872 */ 873 874 #endif /* SDMMC1 */ 875 876 #ifdef __cplusplus 877 } 878 #endif 879 880 881 #endif /* STM32L4xx_HAL_SD_H */ 882 883 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 884
