1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_pcd.h 4 * @author MCD Application Team 5 * @brief Header file of PCD HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L4xx_HAL_PCD_H 38 #define __STM32L4xx_HAL_PCD_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 /* Includes ------------------------------------------------------------------*/ 45 #include "stm32l4xx_ll_usb.h" 46 47 #if defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS) 48 49 /** @addtogroup STM32L4xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup PCD 54 * @{ 55 */ 56 57 /* Exported types ------------------------------------------------------------*/ 58 /** @defgroup PCD_Exported_Types PCD Exported Types 59 * @{ 60 */ 61 62 /** 63 * @brief PCD State structure definition 64 */ 65 typedef enum 66 { 67 HAL_PCD_STATE_RESET = 0x00, 68 HAL_PCD_STATE_READY = 0x01, 69 HAL_PCD_STATE_ERROR = 0x02, 70 HAL_PCD_STATE_BUSY = 0x03, 71 HAL_PCD_STATE_TIMEOUT = 0x04 72 } PCD_StateTypeDef; 73 74 /* Device LPM suspend state */ 75 typedef enum 76 { 77 LPM_L0 = 0x00, /* on */ 78 LPM_L1 = 0x01, /* LPM L1 sleep */ 79 LPM_L2 = 0x02, /* suspend */ 80 LPM_L3 = 0x03, /* off */ 81 } PCD_LPM_StateTypeDef; 82 83 typedef enum 84 { 85 PCD_LPM_L0_ACTIVE = 0x00, /* on */ 86 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ 87 } PCD_LPM_MsgTypeDef; 88 89 typedef enum 90 { 91 PCD_BCD_ERROR = 0xFF, 92 PCD_BCD_CONTACT_DETECTION = 0xFE, 93 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, 94 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, 95 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, 96 PCD_BCD_DISCOVERY_COMPLETED = 0x00, 97 98 } PCD_BCD_MsgTypeDef; 99 100 #if defined (USB) 101 /** 102 * @brief PCD double buffered endpoint direction 103 */ 104 typedef enum 105 { 106 PCD_EP_DBUF_OUT, 107 PCD_EP_DBUF_IN, 108 PCD_EP_DBUF_ERR, 109 } PCD_EP_DBUF_DIR; 110 111 /** 112 * @brief PCD endpoint buffer number 113 */ 114 typedef enum 115 { 116 PCD_EP_NOBUF, 117 PCD_EP_BUF0, 118 PCD_EP_BUF1 119 } PCD_EP_BUF_NUM; 120 #endif /* USB */ 121 122 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 123 typedef USB_OTG_GlobalTypeDef PCD_TypeDef; 124 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; 125 typedef USB_OTG_EPTypeDef PCD_EPTypeDef; 126 #endif /* USB_OTG_FS || USB_OTG_HS */ 127 128 #if defined (USB) 129 typedef USB_TypeDef PCD_TypeDef; 130 typedef USB_CfgTypeDef PCD_InitTypeDef; 131 typedef USB_EPTypeDef PCD_EPTypeDef; 132 #endif /* USB */ 133 134 /** 135 * @brief PCD Handle Structure definition 136 */ 137 typedef struct __PCD_HandleTypeDef 138 { 139 PCD_TypeDef *Instance; /*!< Register base address */ 140 PCD_InitTypeDef Init; /*!< PCD required parameters */ 141 __IO uint8_t USB_Address; /*!< USB Address */ 142 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */ 143 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */ 144 HAL_LockTypeDef Lock; /*!< PCD peripheral status */ 145 __IO PCD_StateTypeDef State; /*!< PCD communication state */ 146 __IO uint32_t ErrorCode; /*!< PCD Error code */ 147 uint32_t Setup[12]; /*!< Setup packet buffer */ 148 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ 149 uint32_t BESL; 150 151 152 uint32_t lpm_active; /*!< Enable or disable the Link Power Management . 153 This parameter can be set to ENABLE or DISABLE */ 154 155 uint32_t battery_charging_active; /*!< Enable or disable Battery charging. 156 This parameter can be set to ENABLE or DISABLE */ 157 void *pData; /*!< Pointer to upper stack Handler */ 158 159 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 160 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */ 161 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */ 162 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */ 163 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */ 164 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */ 165 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */ 166 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */ 167 168 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */ 169 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */ 170 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */ 171 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */ 172 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */ 173 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */ 174 175 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */ 176 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */ 177 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 178 } PCD_HandleTypeDef; 179 180 /** 181 * @} 182 */ 183 184 /* Include PCD HAL Extended module */ 185 #include "stm32l4xx_hal_pcd_ex.h" 186 187 /* Exported constants --------------------------------------------------------*/ 188 /** @defgroup PCD_Exported_Constants PCD Exported Constants 189 * @{ 190 */ 191 192 /** @defgroup PCD_Speed PCD Speed 193 * @{ 194 */ 195 #if defined (USB_OTG_HS) 196 #define PCD_SPEED_HIGH 0U 197 #define PCD_SPEED_HIGH_IN_FULL 1U 198 #endif 199 #define PCD_SPEED_FULL 2U 200 /** 201 * @} 202 */ 203 204 /** @defgroup PCD_PHY_Module PCD PHY Module 205 * @{ 206 */ 207 #define PCD_PHY_ULPI 1U 208 #define PCD_PHY_EMBEDDED 2U 209 #define PCD_PHY_UTMI 3U 210 /** 211 * @} 212 */ 213 214 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value 215 * @{ 216 */ 217 #ifndef USBD_FS_TRDT_VALUE 218 #define USBD_FS_TRDT_VALUE 5U 219 #endif /* USBD_HS_TRDT_VALUE */ 220 /** 221 * @} 222 */ 223 224 /** @defgroup PCD_Error_Code_definition PCD Error Code definition 225 * @brief PCD Error Code definition 226 * @{ 227 */ 228 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 229 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */ 230 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 231 232 /** 233 * @} 234 */ 235 236 /** 237 * @} 238 */ 239 240 /* Exported macros -----------------------------------------------------------*/ 241 /** @defgroup PCD_Exported_Macros PCD Exported Macros 242 * @brief macros to handle interrupts and specific clock configurations 243 * @{ 244 */ 245 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 246 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 247 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 248 249 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 250 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) 251 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U) 252 253 254 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ 255 ~(USB_OTG_PCGCCTL_STOPCLK) 256 257 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK 258 259 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE)) & 0x10U) 260 261 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE 262 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) 263 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) 264 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE 265 266 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 267 do { \ 268 EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE); \ 269 EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE; \ 270 } while(0U) 271 #endif /* USB_OTG_FS || USB_OTG_HS */ 272 273 #if defined (USB) 274 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance) 275 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance) 276 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) 277 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__)) 278 279 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE 280 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE) 281 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE) 282 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE 283 284 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \ 285 do { \ 286 EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE); \ 287 EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE; \ 288 } while(0U) 289 290 #endif /* USB */ 291 292 /** 293 * @} 294 */ 295 296 /* Exported functions --------------------------------------------------------*/ 297 /** @addtogroup PCD_Exported_Functions PCD Exported Functions 298 * @{ 299 */ 300 301 /* Initialization/de-initialization functions ********************************/ 302 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions 303 * @{ 304 */ 305 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); 306 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd); 307 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); 308 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); 309 310 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) 311 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition 312 * @brief HAL USB OTG PCD Callback ID enumeration definition 313 * @{ 314 */ 315 typedef enum 316 { 317 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */ 318 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */ 319 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */ 320 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */ 321 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */ 322 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */ 323 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */ 324 325 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */ 326 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */ 327 328 } HAL_PCD_CallbackIDTypeDef; 329 /** 330 * @} 331 */ 332 333 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition 334 * @brief HAL USB OTG PCD Callback pointer definition 335 * @{ 336 */ 337 338 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */ 339 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */ 340 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */ 341 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */ 342 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */ 343 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */ 344 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */ 345 346 /** 347 * @} 348 */ 349 350 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback); 351 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID); 352 353 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback); 354 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd); 355 356 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback); 357 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd); 358 359 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback); 360 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd); 361 362 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback); 363 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd); 364 365 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback); 366 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd); 367 368 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback); 369 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd); 370 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ 371 /** 372 * @} 373 */ 374 375 /* I/O operation functions ***************************************************/ 376 /* Non-Blocking mode: Interrupt */ 377 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions 378 * @{ 379 */ 380 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); 381 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); 382 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); 383 384 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); 385 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); 386 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); 387 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); 388 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); 389 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); 390 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); 391 392 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 393 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 394 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 395 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); 396 /** 397 * @} 398 */ 399 400 /* Peripheral Control functions **********************************************/ 401 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions 402 * @{ 403 */ 404 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); 405 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); 406 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); 407 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); 408 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 409 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 410 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); 411 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 412 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 413 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 414 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); 415 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 416 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); 417 /** 418 * @} 419 */ 420 421 /* Peripheral State functions ************************************************/ 422 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions 423 * @{ 424 */ 425 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); 426 /** 427 * @} 428 */ 429 430 /** 431 * @} 432 */ 433 434 /* Private constants ---------------------------------------------------------*/ 435 /** @defgroup PCD_Private_Constants PCD Private Constants 436 * @{ 437 */ 438 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt 439 * @{ 440 */ 441 #if defined (USB_OTG_FS) || defined (USB_OTG_HS) 442 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE 0x08U 443 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE 0x0CU 444 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE 0x10U 445 446 #ifndef LL_EXTI_LINE_18 447 #define LL_EXTI_LINE_18 0x00040000U 448 #endif 449 450 #ifndef LL_EXTI_LINE_20 451 #define LL_EXTI_LINE_20 0x00100000U 452 #endif 453 454 #define USB_OTG_FS_WAKEUP_EXTI_LINE LL_EXTI_LINE_18 /*!< External interrupt line 17 Connected to the USB EXTI Line */ 455 #endif /* USB_OTG_FS || USB_OTG_HS */ 456 457 #if defined (USB) 458 #ifndef LL_EXTI_LINE_18 459 #define LL_EXTI_LINE_18 0x00040000U 460 #endif 461 462 #define USB_WAKEUP_EXTI_LINE LL_EXTI_LINE_18 /*!< External interrupt line 17Connected to the USB EXTI Line */ 463 #endif /* USB */ 464 465 /** 466 * @} 467 */ 468 469 #if defined (USB) 470 /** @defgroup PCD_EP0_MPS PCD EP0 MPS 471 * @{ 472 */ 473 #define PCD_EP0MPS_64 DEP0CTL_MPS_64 474 #define PCD_EP0MPS_32 DEP0CTL_MPS_32 475 #define PCD_EP0MPS_16 DEP0CTL_MPS_16 476 #define PCD_EP0MPS_08 DEP0CTL_MPS_8 477 /** 478 * @} 479 */ 480 481 /** @defgroup PCD_ENDP PCD ENDP 482 * @{ 483 */ 484 #define PCD_ENDP0 0U 485 #define PCD_ENDP1 1U 486 #define PCD_ENDP2 2U 487 #define PCD_ENDP3 3U 488 #define PCD_ENDP4 4U 489 #define PCD_ENDP5 5U 490 #define PCD_ENDP6 6U 491 #define PCD_ENDP7 7U 492 /** 493 * @} 494 */ 495 496 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind 497 * @{ 498 */ 499 #define PCD_SNG_BUF 0U 500 #define PCD_DBL_BUF 1U 501 /** 502 * @} 503 */ 504 #endif /* USB */ 505 /** 506 * @} 507 */ 508 509 /* Private macros ------------------------------------------------------------*/ 510 /** @defgroup PCD_Private_Macros PCD Private Macros 511 * @{ 512 */ 513 #if defined (USB) 514 /* SetENDPOINT */ 515 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue)) 516 517 /* GetENDPOINT */ 518 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(&(USBx)->EP0R + ((bEpNum) * 2U))) 519 520 /* ENDPOINT transfer */ 521 #define USB_EP0StartXfer USB_EPStartXfer 522 523 /** 524 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0]) 525 * @param USBx USB peripheral instance register address. 526 * @param bEpNum Endpoint Number. 527 * @param wType Endpoint Type. 528 * @retval None 529 */ 530 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \ 531 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType)))) 532 533 /** 534 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0]) 535 * @param USBx USB peripheral instance register address. 536 * @param bEpNum Endpoint Number. 537 * @retval Endpoint Type 538 */ 539 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD) 540 541 /** 542 * @brief free buffer used from the application realizing it to the line 543 * toggles bit SW_BUF in the double buffered endpoint register 544 * @param USBx USB device. 545 * @param bEpNum, bDir 546 * @retval None 547 */ 548 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \ 549 if ((bDir) == 0U) \ 550 { \ 551 /* OUT double buffered endpoint */ \ 552 PCD_TX_DTOG((USBx), (bEpNum)); \ 553 } \ 554 else if ((bDir) == 1U) \ 555 { \ 556 /* IN double buffered endpoint */ \ 557 PCD_RX_DTOG((USBx), (bEpNum)); \ 558 } \ 559 } while(0) 560 561 /** 562 * @brief gets direction of the double buffered endpoint 563 * @param USBx USB peripheral instance register address. 564 * @param bEpNum Endpoint Number. 565 * @retval EP_DBUF_OUT, EP_DBUF_IN, 566 * EP_DBUF_ERR if the endpoint counter not yet programmed. 567 */ 568 #define PCD_GET_DB_DIR(USBx, bEpNum) do { \ 569 if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U) \ 570 { \ 571 return(PCD_EP_DBUF_OUT); \ 572 } \ 573 else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U) \ 574 { \ 575 return(PCD_EP_DBUF_IN); \ 576 } \ 577 else \ 578 { \ 579 return(PCD_EP_DBUF_ERR); \ 580 } \ 581 } while(0) 582 583 /** 584 * @brief sets the status for tx transfer (bits STAT_TX[1:0]). 585 * @param USBx USB peripheral instance register address. 586 * @param bEpNum Endpoint Number. 587 * @param wState new state 588 * @retval None 589 */ 590 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \ 591 register uint16_t _wRegVal; \ 592 \ 593 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \ 594 /* toggle first bit ? */ \ 595 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \ 596 { \ 597 _wRegVal ^= USB_EPTX_DTOG1; \ 598 } \ 599 /* toggle second bit ? */ \ 600 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \ 601 { \ 602 _wRegVal ^= USB_EPTX_DTOG2; \ 603 } \ 604 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 605 } while(0) /* PCD_SET_EP_TX_STATUS */ 606 607 /** 608 * @brief sets the status for rx transfer (bits STAT_TX[1:0]) 609 * @param USBx USB peripheral instance register address. 610 * @param bEpNum Endpoint Number. 611 * @param wState new state 612 * @retval None 613 */ 614 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \ 615 register uint16_t _wRegVal; \ 616 \ 617 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \ 618 /* toggle first bit ? */ \ 619 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \ 620 { \ 621 _wRegVal ^= USB_EPRX_DTOG1; \ 622 } \ 623 /* toggle second bit ? */ \ 624 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \ 625 { \ 626 _wRegVal ^= USB_EPRX_DTOG2; \ 627 } \ 628 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 629 } while(0) /* PCD_SET_EP_RX_STATUS */ 630 631 /** 632 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0]) 633 * @param USBx USB peripheral instance register address. 634 * @param bEpNum Endpoint Number. 635 * @param wStaterx new state. 636 * @param wStatetx new state. 637 * @retval None 638 */ 639 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \ 640 register uint16_t _wRegVal; \ 641 \ 642 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \ 643 /* toggle first bit ? */ \ 644 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \ 645 { \ 646 _wRegVal ^= USB_EPRX_DTOG1; \ 647 } \ 648 /* toggle second bit ? */ \ 649 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \ 650 { \ 651 _wRegVal ^= USB_EPRX_DTOG2; \ 652 } \ 653 /* toggle first bit ? */ \ 654 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \ 655 { \ 656 _wRegVal ^= USB_EPTX_DTOG1; \ 657 } \ 658 /* toggle second bit ? */ \ 659 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \ 660 { \ 661 _wRegVal ^= USB_EPTX_DTOG2; \ 662 } \ 663 \ 664 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX); \ 665 } while(0) /* PCD_SET_EP_TXRX_STATUS */ 666 667 /** 668 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0] 669 * /STAT_RX[1:0]) 670 * @param USBx USB peripheral instance register address. 671 * @param bEpNum Endpoint Number. 672 * @retval status 673 */ 674 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT) 675 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT) 676 677 /** 678 * @brief sets directly the VALID tx/rx-status into the endpoint register 679 * @param USBx USB peripheral instance register address. 680 * @param bEpNum Endpoint Number. 681 * @retval None 682 */ 683 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID)) 684 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID)) 685 686 /** 687 * @brief checks stall condition in an endpoint. 688 * @param USBx USB peripheral instance register address. 689 * @param bEpNum Endpoint Number. 690 * @retval TRUE = endpoint in stall condition. 691 */ 692 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \ 693 == USB_EP_TX_STALL) 694 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \ 695 == USB_EP_RX_STALL) 696 697 /** 698 * @brief set & clear EP_KIND bit. 699 * @param USBx USB peripheral instance register address. 700 * @param bEpNum Endpoint Number. 701 * @retval None 702 */ 703 #define PCD_SET_EP_KIND(USBx, bEpNum) do { \ 704 register uint16_t _wRegVal; \ 705 \ 706 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 707 \ 708 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \ 709 } while(0) /* PCD_SET_EP_KIND */ 710 711 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \ 712 register uint16_t _wRegVal; \ 713 \ 714 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \ 715 \ 716 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 717 } while(0) /* PCD_CLEAR_EP_KIND */ 718 719 /** 720 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register. 721 * @param USBx USB peripheral instance register address. 722 * @param bEpNum Endpoint Number. 723 * @retval None 724 */ 725 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 726 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 727 728 /** 729 * @brief Sets/clears directly EP_KIND bit in the endpoint register. 730 * @param USBx USB peripheral instance register address. 731 * @param bEpNum Endpoint Number. 732 * @retval None 733 */ 734 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum)) 735 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum)) 736 737 /** 738 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register. 739 * @param USBx USB peripheral instance register address. 740 * @param bEpNum Endpoint Number. 741 * @retval None 742 */ 743 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \ 744 register uint16_t _wRegVal; \ 745 \ 746 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \ 747 \ 748 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal); \ 749 } while(0) /* PCD_CLEAR_RX_EP_CTR */ 750 751 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \ 752 register uint16_t _wRegVal; \ 753 \ 754 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \ 755 \ 756 PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal); \ 757 } while(0) /* PCD_CLEAR_TX_EP_CTR */ 758 759 /** 760 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register. 761 * @param USBx USB peripheral instance register address. 762 * @param bEpNum Endpoint Number. 763 * @retval None 764 */ 765 #define PCD_RX_DTOG(USBx, bEpNum) do { \ 766 register uint16_t _wEPVal; \ 767 \ 768 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 769 \ 770 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \ 771 } while(0) /* PCD_RX_DTOG */ 772 773 #define PCD_TX_DTOG(USBx, bEpNum) do { \ 774 register uint16_t _wEPVal; \ 775 \ 776 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \ 777 \ 778 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \ 779 } while(0) /* PCD_TX_DTOG */ 780 /** 781 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register. 782 * @param USBx USB peripheral instance register address. 783 * @param bEpNum Endpoint Number. 784 * @retval None 785 */ 786 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \ 787 register uint16_t _wRegVal; \ 788 \ 789 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 790 \ 791 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\ 792 { \ 793 PCD_RX_DTOG((USBx), (bEpNum)); \ 794 } \ 795 } while(0) /* PCD_CLEAR_RX_DTOG */ 796 797 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \ 798 register uint16_t _wRegVal; \ 799 \ 800 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \ 801 \ 802 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\ 803 { \ 804 PCD_TX_DTOG((USBx), (bEpNum)); \ 805 } \ 806 } while(0) /* PCD_CLEAR_TX_DTOG */ 807 808 /** 809 * @brief Sets address in an endpoint register. 810 * @param USBx USB peripheral instance register address. 811 * @param bEpNum Endpoint Number. 812 * @param bAddr Address. 813 * @retval None 814 */ 815 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \ 816 register uint16_t _wRegVal; \ 817 \ 818 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \ 819 \ 820 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \ 821 } while(0) /* PCD_SET_EP_ADDRESS */ 822 823 /** 824 * @brief Gets address in an endpoint register. 825 * @param USBx USB peripheral instance register address. 826 * @param bEpNum Endpoint Number. 827 * @retval None 828 */ 829 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD)) 830 831 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 832 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U))) 833 834 /** 835 * @brief sets address of the tx/rx buffer. 836 * @param USBx USB peripheral instance register address. 837 * @param bEpNum Endpoint Number. 838 * @param wAddr address to be set (must be word aligned). 839 * @retval None 840 */ 841 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \ 842 register uint16_t *_wRegVal; \ 843 register uint32_t _wRegBase = (uint32_t)USBx; \ 844 \ 845 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 846 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \ 847 *_wRegVal = ((wAddr) >> 1) << 1; \ 848 } while(0) /* PCD_SET_EP_TX_ADDRESS */ 849 850 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \ 851 register uint16_t *_wRegVal; \ 852 register uint32_t _wRegBase = (uint32_t)USBx; \ 853 \ 854 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 855 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \ 856 *_wRegVal = ((wAddr) >> 1) << 1; \ 857 } while(0) /* PCD_SET_EP_RX_ADDRESS */ 858 859 /** 860 * @brief Gets address of the tx/rx buffer. 861 * @param USBx USB peripheral instance register address. 862 * @param bEpNum Endpoint Number. 863 * @retval address of the buffer. 864 */ 865 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum))) 866 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum))) 867 868 /** 869 * @brief Sets counter of rx buffer with no. of blocks. 870 * @param pdwReg Register pointer 871 * @param wCount Counter. 872 * @param wNBlocks no. of Blocks. 873 * @retval None 874 */ 875 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \ 876 (wNBlocks) = (wCount) >> 5; \ 877 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | (0x1U << 15)); \ 878 } while(0) /* PCD_CALC_BLK32 */ 879 880 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \ 881 (wNBlocks) = (wCount) >> 1; \ 882 if (((wCount) & 0x1U) != 0U) \ 883 { \ 884 (wNBlocks)++; \ 885 } \ 886 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \ 887 } while(0) /* PCD_CALC_BLK2 */ 888 889 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \ 890 uint32_t wNBlocks; \ 891 if ((wCount) == 0U) \ 892 { \ 893 *(pdwReg) &= (uint16_t)~(0x73U << 10); \ 894 *(pdwReg) |= (0x1U << 15); \ 895 } \ 896 else if((wCount) < 62U) \ 897 { \ 898 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \ 899 } \ 900 else \ 901 { \ 902 PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \ 903 } \ 904 } while(0) /* PCD_SET_EP_CNT_RX_REG */ 905 906 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \ 907 register uint32_t _wRegBase = (uint32_t)(USBx); \ 908 uint16_t *pdwReg; \ 909 \ 910 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 911 pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 912 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \ 913 } while(0) 914 915 /** 916 * @brief sets counter for the tx/rx buffer. 917 * @param USBx USB peripheral instance register address. 918 * @param bEpNum Endpoint Number. 919 * @param wCount Counter value. 920 * @retval None 921 */ 922 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \ 923 register uint32_t _wRegBase = (uint32_t)(USBx); \ 924 uint16_t *_wRegVal; \ 925 \ 926 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 927 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \ 928 *_wRegVal = (uint16_t)(wCount); \ 929 } while(0) 930 931 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \ 932 register uint32_t _wRegBase = (uint32_t)(USBx); \ 933 uint16_t *_wRegVal; \ 934 \ 935 _wRegBase += (uint32_t)(USBx)->BTABLE; \ 936 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 937 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \ 938 } while(0) 939 940 /** 941 * @brief gets counter of the tx buffer. 942 * @param USBx USB peripheral instance register address. 943 * @param bEpNum Endpoint Number. 944 * @retval Counter value 945 */ 946 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU) 947 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU) 948 949 /** 950 * @brief Sets buffer 0/1 address in a double buffer endpoint. 951 * @param USBx USB peripheral instance register address. 952 * @param bEpNum Endpoint Number. 953 * @param wBuf0Addr buffer 0 address. 954 * @retval Counter value 955 */ 956 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \ 957 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \ 958 } while(0) /* PCD_SET_EP_DBUF0_ADDR */ 959 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \ 960 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \ 961 } while(0) /* PCD_SET_EP_DBUF1_ADDR */ 962 963 /** 964 * @brief Sets addresses in a double buffer endpoint. 965 * @param USBx USB peripheral instance register address. 966 * @param bEpNum Endpoint Number. 967 * @param wBuf0Addr: buffer 0 address. 968 * @param wBuf1Addr = buffer 1 address. 969 * @retval None 970 */ 971 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \ 972 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \ 973 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \ 974 } while(0) /* PCD_SET_EP_DBUF_ADDR */ 975 976 /** 977 * @brief Gets buffer 0/1 address of a double buffer endpoint. 978 * @param USBx USB peripheral instance register address. 979 * @param bEpNum Endpoint Number. 980 * @retval None 981 */ 982 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum))) 983 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum))) 984 985 /** 986 * @brief Gets buffer 0/1 address of a double buffer endpoint. 987 * @param USBx USB peripheral instance register address. 988 * @param bEpNum Endpoint Number. 989 * @param bDir endpoint dir EP_DBUF_OUT = OUT 990 * EP_DBUF_IN = IN 991 * @param wCount: Counter value 992 * @retval None 993 */ 994 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \ 995 if ((bDir) == 0U) \ 996 /* OUT endpoint */ \ 997 { \ 998 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \ 999 } \ 1000 else \ 1001 { \ 1002 if ((bDir) == 1U) \ 1003 { \ 1004 /* IN endpoint */ \ 1005 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \ 1006 } \ 1007 } \ 1008 } while(0) /* SetEPDblBuf0Count*/ 1009 1010 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \ 1011 register uint32_t _wBase = (uint32_t)(USBx); \ 1012 uint16_t *_wEPRegVal; \ 1013 \ 1014 if ((bDir) == 0U) \ 1015 { \ 1016 /* OUT endpoint */ \ 1017 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \ 1018 } \ 1019 else \ 1020 { \ 1021 if ((bDir) == 1U) \ 1022 { \ 1023 /* IN endpoint */ \ 1024 _wBase += (uint32_t)(USBx)->BTABLE; \ 1025 _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \ 1026 *_wEPRegVal = (uint16_t)(wCount); \ 1027 } \ 1028 } \ 1029 } while(0) /* SetEPDblBuf1Count */ 1030 1031 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \ 1032 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 1033 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \ 1034 } while(0) /* PCD_SET_EP_DBUF_CNT */ 1035 1036 /** 1037 * @brief Gets buffer 0/1 rx/tx counter for double buffering. 1038 * @param USBx USB peripheral instance register address. 1039 * @param bEpNum Endpoint Number. 1040 * @retval None 1041 */ 1042 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum))) 1043 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum))) 1044 1045 #endif /* USB */ 1046 1047 /** 1048 * @} 1049 */ 1050 1051 /** 1052 * @} 1053 */ 1054 1055 /** 1056 * @} 1057 */ 1058 1059 #endif /* defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS) */ 1060 1061 #ifdef __cplusplus 1062 } 1063 #endif 1064 1065 #endif /* __STM32L4xx_HAL_PCD_H */ 1066 1067 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 1068
