1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_nor.h 4 * @author MCD Application Team 5 * @brief Header file of NOR HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 10 * 11 * Redistribution and use in source and binary forms, with or without modification, 12 * are permitted provided that the following conditions are met: 13 * 1. Redistributions of source code must retain the above copyright notice, 14 * this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 ****************************************************************************** 34 */ 35 36 /* Define to prevent recursive inclusion -------------------------------------*/ 37 #ifndef __STM32L4xx_HAL_NOR_H 38 #define __STM32L4xx_HAL_NOR_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif 43 44 #if defined(FMC_BANK1) 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32l4xx_ll_fmc.h" 48 49 50 /** @addtogroup STM32L4xx_HAL_Driver 51 * @{ 52 */ 53 54 /** @addtogroup NOR 55 * @{ 56 */ 57 58 /* Exported typedef ----------------------------------------------------------*/ 59 /** @defgroup NOR_Exported_Types NOR Exported Types 60 * @{ 61 */ 62 63 /** 64 * @brief HAL SRAM State structures definition 65 */ 66 typedef enum 67 { 68 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */ 69 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */ 70 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */ 71 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */ 72 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */ 73 }HAL_NOR_StateTypeDef; 74 75 /** 76 * @brief FMC NOR Status typedef 77 */ 78 typedef enum 79 { 80 HAL_NOR_STATUS_SUCCESS = 0U, 81 HAL_NOR_STATUS_ONGOING, 82 HAL_NOR_STATUS_ERROR, 83 HAL_NOR_STATUS_TIMEOUT 84 }HAL_NOR_StatusTypeDef; 85 86 /** 87 * @brief FMC NOR ID typedef 88 */ 89 typedef struct 90 { 91 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ 92 93 uint16_t Device_Code1; 94 95 uint16_t Device_Code2; 96 97 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. 98 These codes can be accessed by performing read operations with specific 99 control signals and addresses set.They can also be accessed by issuing 100 an Auto Select command. */ 101 }NOR_IDTypeDef; 102 103 /** 104 * @brief FMC NOR CFI typedef 105 */ 106 typedef struct 107 { 108 /*!< Defines the information stored in the memory's Common flash interface 109 which contains a description of various electrical and timing parameters, 110 density information and functions supported by the memory */ 111 112 uint16_t CFI_1; 113 114 uint16_t CFI_2; 115 116 uint16_t CFI_3; 117 118 uint16_t CFI_4; 119 }NOR_CFITypeDef; 120 121 /** 122 * @brief NOR handle Structure definition 123 */ 124 typedef struct 125 { 126 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ 127 128 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ 129 130 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ 131 132 HAL_LockTypeDef Lock; /*!< NOR locking object */ 133 134 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ 135 }NOR_HandleTypeDef; 136 /** 137 * @} 138 */ 139 140 /* Exported constants --------------------------------------------------------*/ 141 /* Exported macro ------------------------------------------------------------*/ 142 /** @defgroup NOR_Exported_Macros NOR Exported Macros 143 * @{ 144 */ 145 /** @brief Reset NOR handle state 146 * @param __HANDLE__ specifies the NOR handle. 147 * @retval None 148 */ 149 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) 150 /** 151 * @} 152 */ 153 154 /* Exported functions --------------------------------------------------------*/ 155 /** @addtogroup NOR_Exported_Functions NOR Exported Functions 156 * @{ 157 */ 158 159 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions 160 * @{ 161 */ 162 163 /* Initialization/de-initialization functions ********************************/ 164 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); 165 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); 166 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); 167 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); 168 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); 169 /** 170 * @} 171 */ 172 173 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions 174 * @{ 175 */ 176 177 /* I/O operation functions ***************************************************/ 178 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); 179 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); 180 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 181 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); 182 183 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); 184 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); 185 186 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); 187 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); 188 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); 189 /** 190 * @} 191 */ 192 193 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions 194 * @{ 195 */ 196 197 /* NOR Control functions *****************************************************/ 198 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); 199 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); 200 /** 201 * @} 202 */ 203 204 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions 205 * @{ 206 */ 207 208 /* NOR State functions ********************************************************/ 209 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); 210 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); 211 /** 212 * @} 213 */ 214 215 /** 216 * @} 217 */ 218 219 /* Private types -------------------------------------------------------------*/ 220 /* Private variables ---------------------------------------------------------*/ 221 /* Private constants ---------------------------------------------------------*/ 222 /** @defgroup NOR_Private_Constants NOR Private Constants 223 * @{ 224 */ 225 /* NOR device IDs addresses */ 226 #define MC_ADDRESS ((uint16_t)0x0000U) 227 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001U) 228 #define DEVICE_CODE2_ADDR ((uint16_t)0x000EU) 229 #define DEVICE_CODE3_ADDR ((uint16_t)0x000FU) 230 231 /* NOR CFI IDs addresses */ 232 #define CFI1_ADDRESS ((uint16_t)0x61U) 233 #define CFI2_ADDRESS ((uint16_t)0x62U) 234 #define CFI3_ADDRESS ((uint16_t)0x63U) 235 #define CFI4_ADDRESS ((uint16_t)0x64U) 236 237 /* NOR operation wait timeout */ 238 #define NOR_TMEOUT ((uint16_t)0xFFFFU) 239 240 /* NOR memory data width */ 241 #define NOR_MEMORY_8B ((uint8_t)0x0U) 242 #define NOR_MEMORY_16B ((uint8_t)0x1U) 243 244 /* NOR memory device read/write start address */ 245 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000U) 246 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000U) 247 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000U) 248 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000U) 249 /** 250 * @} 251 */ 252 253 /* Private macros ------------------------------------------------------------*/ 254 /** @defgroup NOR_Private_Macros NOR Private Macros 255 * @{ 256 */ 257 /** 258 * @brief NOR memory address shifting. 259 * @param __NOR_ADDRESS NOR base address 260 * @param __NOR_MEMORY_WIDTH_ NOR memory width 261 * @param __ADDRESS__ NOR memory address 262 * @retval NOR shifted address value 263 */ 264 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ 265 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ 266 ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \ 267 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) 268 269 /** 270 * @brief NOR memory write data to specified address. 271 * @param __ADDRESS__ NOR memory address 272 * @param __DATA__ Data to write 273 * @retval None 274 */ 275 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \ 276 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \ 277 __DSB(); \ 278 } while(0) 279 280 /** 281 * @} 282 */ 283 284 /** 285 * @} 286 */ 287 288 /** 289 * @} 290 */ 291 292 #endif /* FMC_BANK1 */ 293 294 #ifdef __cplusplus 295 } 296 #endif 297 298 #endif /* __STM32L4xx_HAL_NOR_H */ 299 300 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 301
